AW5008L1FDR

AW5008L1FDR Jan 2019 V1.1 Low Noise Amplifier for LTE Low Band FEATURES GENERAL DESCRIPTION             The AW5008L1 is a Low Noise Amplifier designed l Operating frequency 728MHz to 960MHz Noise figure(NF) =0.7dB High power gain =16.4dB In band IIP3=+2.7dBm Input 1dB compression point=-1dBm Supply voltage: 1.5V to 3.1V Supply current 7.6mA Input and output DC decoupled Requires only one input matching inductor Integrated matching for the output FCDFN 1.1mmX0.7mmX0.37mm -6L package 2kV HBM ESD protection (including RFIN and RFOUT pin) ti a for LTE receiver applications. The AW5008L1 requires only one external input matching inductor, reduces assembly complexity and the PCB area, enabling a cost-effective solution. n The AW5008L1 achieves low noise figure, high e linearity, high gain, over a wide range of supply voltages from 1.5V up to 3.1V. All these features fi d make AW5008L1 an excellent choice for LTE LNA as it improves sensitivity with low noise figure and high gain, provides better immunity against jammer signals APPLICATIONS with high linearity, reduces filtering n requirement of preceding stage and hence reduces the overall cost. o Cell phones Tablets Other RF front-end modules C    The AW5008L1 is available in a small lead-free, RoHS-Compliant, FCDFN 1.1mmX0.7mmX0.37 mm -6L package. ic TYPICAL APPLICATION CIRCUIT in GND 6 EN LOGIC CONTROL BIAS R1 VCC SUPPLY VOLTAGE 5 2 RFIN RF INPUT L1 C1 (optional) RF OUTPUT RFOUT 3 4 GND a w AW5008L1 1 C1, R1 Closed to LNA Figure 1 Typical Application Circuit of AW5008L1 All trademarks are the property of their respective owners. www.awinic.com.cn 1 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 PIN CONFIGURATION AND TOP MARK AW5008L1FDR Marking (Top View) 6 EN 1 VCC 2 5 RFIN 2 RFOUT 3 4 GND 3 6 l 1 FX GND ti a AW5008L1FDR (Top View) 5 4 Pin Configuration and Top Mark fi d Figure 2 e n F– AW5008L1FDR X– Production Tracing Code n PIN DEFINITION NAME 1 GND Ground. 2 VCC Supply connection. 3 RFOUT 4 GND 5 RFIN C ic EN RF output Ground RF input EN (high level) supports 1.8V/2.8V IO with internal 150kohm pull-down resistor. a w in 6 DESCRIPTION o No. www.awinic.com.cn 2 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 FUNCTIONAL BLOCK DIAGRAM 6 EN l AW5008L1 1 GND 5 RFIN RFOUT 3 4 GND n 2 Figure 3 Functional Block Diagram Environmental Information Delivery Form F MSL1 ROHS+HF 3000 units/Tape & o -40℃～85℃ Package C AW5008L1FDR Marking Moisture Sensitivity Level FCDFN 1.1mmX 0.7mm -6L Reel ic Temperature n ORDERING INFORMATION Part Number fi d e VCC ti a BIAS in AW5008L1 Shipping R: Tape & Reel a w Package Type FD: FCDFN www.awinic.com.cn 3 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 Supply voltage VCC -0.3V to 3.6V EN pin voltage -0.3V to 3.6V Supply maximum current ICC 30mA RF input power Pin 10dBm Maximum Junction temperature TJMAX 150℃ Storage temperature TSTG -65℃ to 150℃ Operating free-air temperature range e -40℃ to 85℃ Lead temperature (Soldering 10 Seconds) 260℃ fi d ESD[2] HBM CDM n Latch-up l RANGE ti a PARAMETERS n ABSOLUTE MAXIMUM RATINGS[1] o Standard: JEDEC STANDARD NO.78D NOVEMBER 2011 ±2kV ±1kV +IT: +200mA -IT: -200mA C [1] Conditions out of those ranges listed in “absolute maximum ratings” may cause permanent damages to the device. In spite of the limits above, functional operation conditions of the device should within the ranges listed in “recommended operating conditions”. Exposure to absolute-maximum-rated conditions for prolonged periods may affect device reliability. a w in ic [2] The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Test method: MIL-STD-883J Method 3015.9. The CDM test method: JEDEC EIA/JESD22-C101F. www.awinic.com.cn 4 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 ELECTRICAL CHARACTERISTICS TA=+25°C , VCC=2.8V, EN=2.8V, frequency=728MHz to 960MHz. Input matched to 50Ω using a 18nH[3] inductor in series. (unless otherwise noted). Test Condition Min Typ 1.5 - DC Electrical Characteristic Supply Voltage VCC Digital Input-Logic High 0.8 0.45 Gain Mode Supply Current 8.6 [4] f=882MHz [5] 16.4 f=943MHz [6] 16.2 [4] -5.5 [5] -11 [6] -12.5 [4] -6 [5] -12.0 [6] -12.0 f=740MHz [4] -34.0 f=882MHz [5] -30.0 f=943MHz [6] -30.0 f=740MHz [4][7] 0.7 f=882MHz [5][7] 0.7 f=943MHz [6][7] 0.75 In-band input f=740MHz [4] -1 1dB-compression point f=882MHz [5] -5 f=943MHz [6] -5 In-band input f=740MHz [4] 1.8 3rd-order intercept point f=882MHz [5] 2.7 f=943MHz [6] 2.6 fi d f=740MHz Input Return Loss RLin f=882MHz f=740MHz RLout Output Return Loss f=882MHz ISL Reverse Isolation Noise Figure in IP1dB ic NF a w IIP3ib C o f=943MHz n f=943MHz V V mA 15.3 e f=740MHz Power Gain 3.1 n Digital Input-Logic Low Gp Units V VEN ICC Max l Parameter ti a Symbol dB dB dB dB dB dBm dBm ton turn-on time time from VEN ON to 90% of the gain 1.5 μs toff turn-off time time from VEN OFF to 10% of the gain 0.5 μs [3] High quality‐factor 18nH inductor. [4] E-UTRA operating band 17(734MHz to 746MHz) , input power is -25dBm. [5] E-UTRA operating band 5(869MHz to 894MHz) , input power is -25dBm. [6] E-UTRA operating band 8(925MHz to 960MHz) , input power is -25dBm. [7] PCB losses are subtracted. www.awinic.com.cn 5 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 TA=+25°C , VCC=1.8V, EN=1.8V, frequency=728MHz to 960MHz. Input matched to 50Ω using a 18nH[3] inductor in series. (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units 1.5 - 3.1 V Supply Voltage Digital Input-Logic High 0.8 V ti a VCC l DC Electrical Characteristic VEN Digital Input-Logic Low 0.45 Gain Mode Supply Current Input Return Loss RLin [4] f=882MHz [5] f=943MHz [6] f=740MHz [4] -6.0 f=882MHz [5] -11.0 f=943MHz RLout Output Return Loss [4] -7.0 [5] -12.5 [6] -13.0 [4] -33.0 [5] -30.0 f=943MHz [6] -29.0 f=740MHz [4][7] 0.7 f=882MHz [5][7] 0.7 f=943MHz [6][7] 0.75 f=740MHz [4] -8.0 f=882MHz [5] -9.0 f=943MHz [6] -9.0 f=740MHz [4] 2.0 f=882MHz [5] 2.5 f=943MHz [6] 2.0 f=882MHz NF Noise Figure IP1dB 1dB-compression point in In-band input IIP3ib w ton toff o ic In-band input C Reverse Isolation f=882MHz n f=740MHz 3rd-order intercept point dB 16.0 -12.0 f=943MHz ISL 16.0 [6] f=740MHz mA 15.0 n f=740MHz e Power Gain Gp 7.6 fi d ICC V dB dB dB dB dBm dBm turn-on time time from VEN ON to 90% of the gain 1.5 μs turn-off time time from VEN OFF to 10% of the gain 0.5 μs a [3] High quality‐factor 18nH inductor. [4] E-UTRA operating band 17(734MHz to 746MHz), input power is -25dBm. [5] E-UTRA operating band 5(869MHz to 894MHz) , input power is -25dBm. [6] E-UTRA operating band 8(925MHz to 960MHz) , input power is -25dBm. [7] PCB losses are subtracted. www.awinic.com.cn 6 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 fi d e n ti a l AW5008L1 APPLICATION BOARD a w in ic C o n Figure 4 AW5008L1 EVB www.awinic.com.cn 7 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 MEASUREMENT DIAGRAM AW5008L1 1 6 EN LOGIC CONTROL ti a GND BIAS R1 VCC SUPPLY VOLTAGE 5 RFIN L1 C1 RFOUT 4 GND fi d 3 e (optional) RF OUTPUT RF INPUT n 2 l Test DC Characteristics(Current & Power Consumption) C1, R1 Closed to LNA n AW5008L1 DC Test Diagram o Figure 5 C Test S-Parameter AW5008L1 EVB RF OUTPUT a w in ic RF INPUT www.awinic.com.cn NetWork Analyzer Figure 6 AW5008L1 S-parameter Measurement Diagram 8 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 Test Noise Figure RF INPUT RF ti a l AW5008L1 EVB OUTPUT Figure 7 n Noise Analyzer AW5008L1 Noise Figure Measurement Diagram Signal Generator Power Combiner fi d e Test IIP3 RF INPUT Signal Analyzer n Signal Generator AW5008L1 EVB RF OUTPUT a w in ic C o Figure 8 AW5008L1 IIP3 Measurement Diagram www.awinic.com.cn 9 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 APPLICATION INFORMATION Choice of components output of AW5008L1 is internally matched to 50 ohm and a DC blocking capacitor is The AW5008L1 requires only one external l integrated on-chip, thus no external component is inductor for input matching. If the device/phone filtering on their boards, the bypass capacitor ti a required at the output. manufacturers implement very good power supply 3. mentioned in this application circuit may be optional. The AW5008L1 should be placed close to the diversity antenna with the input-matching inductor. With the power supply decoupling capacitor, better Use 50 ohm micro-strip lines to connect RF performance would be received, like a little higher n INPUT and RF OUTPUT. Bypass capacitor need gain, etc. The value is optimized for the key be located close to the device. For long VCC lines, performance, such as higher power gain, lower it may be necessary to add more decoupling noise figure, and better return loss. Typical value of capacitors. Proper grounding of the GND pins is inductor is 18nH with high quality factor, and very important. fi d capacitor is 1nF. The typical application circuit The e 1. 2. can n refer to Figure1. Following tables show recommended inductor and capacitor values. Typical(nH) Q(min) C Part o Inductor Selection Table LQW15A 18 Frequency(MHz) MFR Size 250 Murata 0402 25 Capacitor Selection Table Typical(pF) Voltage(V) MFR Size GRM155 1000 50 Murata 0402 a w in ic Part www.awinic.com.cn 10 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 PACKAGE DESCRIPTION 0.7±0.1 n 1.1±0.1 ti a l Pin1 Corner n 0.1REF 0.37±0.03 0.03MAX fi d e TOP VIEW C o SIDE VIEW 6x(0.2±0.05) SYMM ℄ 0.8 TYP 0.4 TYP SYMM ℄ w in ic 6x(0.2±0.05) a 0.4 TYP BOTTOM VIEW Unit：mm Figure 9 Package Outline www.awinic.com.cn 11 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 LAND PATTERN 6x0.30 3x0.20 1 3 ti a n 0.40 0.80 6x0.20 l 6 fi d e 4 n 0.50 0.05min 0.05max Solder Mask opening o Solder Mask opening C Metal Solder Mask Defined Unit: mm Figure 10 Land Pattern a w in ic Non-solder Mask Defined Metal Under solder mask www.awinic.com.cn 12 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 TAPE & REEL DESCRIPTION TAPE DIMENSIONS P1 P2 P0 ti a K0 l REEL DIMENSIONS W B0 n D1 A0 e Cavity fi d A0：Dimension designed to accommodate the component width B0：Dimension designed to accommodate the component length K0：Dimension designed to accommodate the component thickness W：Overall width of the carrier tape P0：Pitch between successive cavity centers and sprocket hole P1：Pitch between successive cavity centers P2：Pitch between sprocket hole D0：Reel width D1：Reel diameter o n D0 C QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Sprocket Holes Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q3 Q4 Q3 Q4 Q3 Q4 Q3 Q4 ic Q1 User Direction of Feed a w in Pocket Quadrants www.awinic.com.cn Figure 11 13 Tape & Reel Description Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW5008L1FDR Jan 2019 V1.1 Date Change Record V1.0 Sept 2018 Officially Released V1.1 Jan 2019 Update FCDFN ti a Version l REVISION HISTORY DISCLAIMER e n Information in this document is believed to be accurate and reliable. However, Shanghai AWINIC Technology Co., Ltd (AWINIC Technology) does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. fi d AWINIC Technology reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. Customers shall obtain the latest relevant information before placing orders and shall verify that such information is current and complete. This document supersedes and replaces all information supplied prior to the publication hereof. C o n AWINIC Technology products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an AWINIC Technology product can reasonably be expected to result in personal injury, death or severe property or environmental damage. AWINIC Technology accepts no liability for inclusion and/or use of AWINIC Technology products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. ic Applications that are described herein for any of these products are for illustrative purposes only. AWINIC Technology makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 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Information of third parties may be subject to additional restrictions. a Resale of AWINIC components or services with statements different from or beyond the parameters stated by AWINIC for that component or service voids all express and any implied warranties for the associated AWINIC component or service and is an unfair and deceptive business practice. AWINIC is not responsible or liable for any such statements. www.awinic.com.cn 14 Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD