AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
Over-Voltage Protection Load Switch with Surge Protection
GENERAL DESCRIPTION
The AW328XX family OVP load switch features
surge protection, an internal clamp circuit protects
the device from surge voltages up to 100V.
IEC 61000-4-5: > 100V
Integrated low Rdson nFET switch: typical 28mΩ
4.5A continuous current capability
Default Over-Voltage Protection (OVP) threshold
AW32801: 5.95V
AW32805: 6.8V
AW32809: 9.98V
AW32812: 14V
OVP threshold adjustable range: 4V to 20V
Input system ESD protection
The default OVP threshold is 5.95V (AW32801),
6.8V (AW32805), 9.98V (AW32809) and 14V
(AW32812), the OVP threshold can be adjusted
from 4V to 20V through external OVLO pin.
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IEC 61000-4-2 Contact discharge: ±8kV
IEC 61000-4-2 Air gap discharge: ±15kV
Input maximum voltage rating: 29VDC
Fast turn-off response: typical 125ns
Over-Temperature Protection (OTP)
Under-Voltage Lockout (UVLO)
1.34mm × 1.78mm WLCSP-12 package
n
o
Tablets
5V to 20V Charging Ports
This device features over-temperature protection
that prevents itself from thermal damaging.
The AW328XX is available in a RoHS compliant
12-bump 1.34mm × 1.78mm WLCSP.
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Smartphones
The device features an open-drain output ACOK,
when VIN_UVLO < VIN < VIN_OVLO and the switch is
on, ACOK will be driven low to indicate a good
power input, otherwise it is high impedance.
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APPLICATIONS
The AW328XX features an ultra-low 28m (typ.)
Rdson nFET load switch. When input voltage
exceeds the OVP threshold, the switch is turned off
very fast to prevent damage to the protected
downstream devices. The IN pin is capable of
withstanding fault voltages up to 29VDC.
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Surge protection
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FEATURES
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USB
Port
in
TYPICAL APPLICATION CIRCUIT
CIN
0.1µF
50V
TVS
AW32801
AW32805
AW32809
AW32812
R1
OVLO
R2
Optional
EN
Optional
Figure 1
Charger
OUT
IN
VIO
COUT
1µF
Battery
PMIC
10kΩ
ACOK
Controller
GND
Typical Application Circuit of AW328XX
Note: R1 and R2 are used for OVP threshold adjustment, to use default OVP threshold, connect OVLO to ground.
All trademarks are the property of their respective owners.
www.awinic.com.cn
1
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
DEVICE COMPARISON TABLE
VIN_OVLO (V)
Min.
Typ.
Max.
AW32805
VIN rising
6.66
6.80
6.94
150
AW32809
VIN rising
9.78
9.98
10.18
210
AW32812
VIN rising
13.7
14.0
14.3
AW32801
VIN rising
5.83
5.95
6.07
AW328XX Pin Configuration
(TOP VIEW)
3
4
A
EN
OUT
OUT
GND
B
ACOK
OUT
IN
GND
C
OVLO
IN
IN
GND
2
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3
4
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1
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2
28XX
YYYY
A
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B
C
C
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100
AW328XX MARKING
(TOP VIEW)
1
Figure 2
300
n
PIN CONFIGURATION AND TOP MARK
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Condition
VIN_OVLO
hysteresis (mV)
Device
28XX – AW32801/AW32805/AW32809/AW32812
YYYY – Production Tracking Code
Pin Configuration and Top Mark
in
PIN DEFINITION
NAME
A1
EN
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PIN
DESCRIPTION
Enable pin, active low
ACOK
Power good flag, active-low, open-drain
C1
OVLO
OVP threshold adjustment pin
C2, C3, B3
IN
A2, A3, B2
OUT
Switch output
A4, B4, C4
GND
Device ground
a
B1
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Switch input and device power supply
2
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
FUNCTIONAL BLOCK DIAGRAM
OUT
Clamp
Detect
OV comp
ACOK
UV&OT comp
Oscillator
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Bandgap
& Ibias
EN
GND
FUNCTIONAL BLOCK DIAGRAM
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C
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Figure 3
Logic Control
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Gate Driver &
Charge pump
VIN Divider
Selection
OVLO
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IN
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3
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
TYPICAL APPLICATION CIRCUITS
VIO
AW32801
AW32805
AW32809
AW32812
OVLO
Optional
EN
COUT
1µF
Battery
PMIC
10kΩ
Controller
ACOK
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CIN
0.1µF
50V
TVS
Charger
OUT
IN
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USB
Port
GND
USB
Port
OUT
IN
OVLO
R2
Optional
VIO
AW32801
AW32805
AW32809
AW32812
R1
EN
COUT
1µF
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CIN
0.1µF
50V
TVS
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Figure 4 AW328XX Application Circuit
(Using default OVP threshold by connecting OVLO to ground)
Charger
Battery
PMIC
10kΩ
ACOK
n
GND
Controller
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Notice for Typical Application Circuits:
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Figure 5 AW328XX Application Circuit
(Using external OVP threshold by connecting OVLO to R1 and R2)
1. When the default OVP threshold is used, connect OVLO pin to GND directly or through a 0Ω resistor.
OVLO pin cannot be left floating.
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2. If R1 and R2 are used to adjust the OVP threshold, in order to speed up the OVP response, R 1 + R2 <
100kΩ is recommended. It is better to use 1% precision resistors to improve the OVP threshold precision.
in
3. If ACOK is not used, it can be left floating, or short to GND.
4. CIN = 0.1μF is recommended for typical application, larger CIN is also acceptable. The rated voltage of CIN
should be larger than the TVS maximum clamping voltage, if no TVS is applied and only AW 328XX is
used, the rated voltage of CIN should be 50V.
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5. COUT = 1μF is recommended for typical application, larger C OUT is also acceptable. The rated voltage of
COUT should be larger than the OVP threshold. For example, if the OVP threshold is 6.8V, the rated
voltage of COUT should be 10V or higher.
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6. If the input of AW328XX is required to pass surge voltage greater than 100V, external TVS is needed, the
maximum clamping voltage of the TVS should be below 42V.
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4
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
Temperature
Package
Marking
Moisture
Sensitivity
Level
Environmental
Information
Delivery Form
AW32801CSR
-40°C~85°C
WLCSP
1.34×1.78-12B
2801
MSL1
ROHS+HF
3000 units/
Tape and Reel
AW32805CSR
-40°C~85°C
WLCSP
1.34×1.78-12B
2805
MSL1
ROHS+HF
3000 units/
Tape and Reel
AW32809CSR
-40°C~85°C
WLCSP
1.34×1.78-12B
2809
MSL1
ROHS+HF
3000 units/
Tape and Reel
AW32812CSR
-40°C~85°C
WLCSP
1.34×1.78-12B
2812
MSL1
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Part Number
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ORDERING INFORMATION
3000 units/
Tape and Reel
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ROHS+HF
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AW328XX
Shipping
R: Tape & Reel
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C
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Package Type
CS: CSP
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Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
PARAMETERS
RANGE
Supply Voltage Range VIN
-0.3V to 29V
-0.3V to 29V
EN
-0.3V to 6V
Output Voltage Range
ACOK
-0.3V to 6V
OUT
See(NOTE 2)
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OVLO
Input Voltage Range
Maximum Input Peak Pulse Voltage VIN_PUL (20μs pulse width, repeat
100 times)
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42V
Maximum Continuous Current From IN to OUT ISW(NOTE 3)
4.5A
Operating Free-air Temperature Range
Maximum Junction Temperature TJMAX
1.5A
85°C/W
-40°C to 85°C
165°C
-65°C to 150°C
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Storage Temperature TSTG
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Junction-to-ambient Thermal Resistance θJA(NOTE 4)
8A
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Peak Current From IN to OUT IPEAK (10ms)
Maximum Continuous Forward Current Through the Switch Body Diode
IDIODE
260°C
Contact Discharge
±8kV
Air Gap Discharge
±15kV
Lead Temperature (Soldering 10 Seconds)
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ABSOLUTE MAXIMUM RATINGS(NOTE1)
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IEC61000-4-2 System ESD on IN (NOTE 5)
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ESD
±4kV
Charged Device Model (All pins, per JEDEC EIA/JESD22-C101F)
±1.5kV
Machine Model (All pins, per JEDEC EIA/JESD22-A115)
±400V
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Human Body Model (All pins, per MIL-STD-883J Method 3015.9) (NOTE 6)
Latch-Up
in
Test Condition: JEDEC STANDARD No.78C SEPTEMBER 2011
+IT:800mA
-IT:-800mA
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NOTE1: Conditions out of those ranges listed in "absolute maximum ratings" may cause permanent damages
to the device. In spite of the limits above, functional operation conditions of the device should within the
ranges listed in "recommended operating conditions". Exposure to absolute-maximum-rated conditions for
prolonged periods may affect device reliability.
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NOTE2: -0.3V to 29V or VIN + 0.3V, whichever is smaller.
NOTE3: Limited by thermal design.
NOTE4: Thermal resistance from junction to ambient is highly dependent on PCB layout.
NOTE5: Test is under CIN = 1μF.
NOTE6: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
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6
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
ELECTRICAL CHARACTERISTICS
TA = -40°C to 85°C unless otherwise noted. Typical values are guaranteed for V IN = 5V, CIN = 0.1μF, IIN≤ 4.5A
and TA = 25°C.
VIN_CLAMP
Input Clamp Voltage
VIN
Input Voltage Range
IIN = 10mA
TYP
2.5
VIN = 5V, IOUT = 1A, TA = 25°C
28
IQ
Input Quiescent Current
VIN = 5V, IOUT = 0A
65
IIN_OVLO
Input
Current
Over-voltage Condition
VOVLO = 3V, VIN = 5V, VOUT =
0V
69
VOVLO_TH
OVLO Set Threshold
2.5V < VIN < 20V
VOVLO_RNG
OVP Threshold Adjustable
Range
2.5V < VIN < 20V
VOVLO_SEL
External
OVLO
Threshold
VIN Rising
0.3
Hysteresis
OVLO Pin Leakage Current
COUT
Output Load Capacitance
VOVLO = VOVLO_TH
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IOVLO
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Protection
1.20
4
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Select
1.16
UNIT
V
28
V
37
mΩ
100
μA
110
μA
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Switch On Resistance
at
MAX
30.3
e
Rdson
MIN
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TEST CONDITION
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PARAMETER
0.42
1.24
V
20
V
0.50
V
0.1
-0.1
VIN Rising
6.66
6.80
VIN Falling
6.51
6.65
VIN Rising
9.78
9.98
VIN Falling
9.57
9.77
VIN Rising
13.7
14.0
VIN Falling
13.4
13.7
VIN Rising
5.83
5.95
VIN Falling
5.73
5.85
0.1
μA
100
μF
6.94
C
AW32805
10.18
AW32809
VIN_OVLO
Default OVP Trip Level
V
14.3
in
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AW32812
VIN_UVLO
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TSDN
TSDN_HYS
6.07
AW32801
VIN Rising
2.25
2.40
VIN Falling
2.10
2.20
UVLO Trip Level
V
Shutdown Temperature
130
°C
Shutdown
Hysteresis
20
°C
Temperature
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Digital Logical Interface
VOL
ILEAK_ACOK
ACOK Output Low Voltage
ISINK = 1mA
ACOK Leakage Current
VIO = 5V, ACOK De-asserted
VIH
EN Input High Voltage
VIL
EN Input Low Voltage
ILEAK_EN
EN Leakage Current
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-0.5
0.4
V
0.5
μA
1.2
VEN = 5V
7
-1
V
0.5
V
10
μA
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
ELECTRICAL CHARACTERISTICS (CONTINUED)
TA = -40°C to 85°C unless otherwise noted. Typical values are guaranteed for V IN = 5V, CIN = 0.1μF, IIN≤ 4.5A
and TA = 25°C.
TEST CONDITION
MIN
TYP
Debounce Time
From VIN > VIN_UVLO to 10%
VOUT, EN Low
15
tSTAT
Start-up Time
From VIN > VIN_UVLO to ACOK
low, EN Low
30
tON
Switch Turn-on Time
RL = 100Ω, CL = 22μF, VOUT
from 10% VIN to 90% VIN
tOFF
Switch Turn-off Time
RL = 100ΩCL = 0μF, VIN >
VIN_OVLO to VOUT Stop Rising
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OVP trip level
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tON
ms
1
ms
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ns
125
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TIMING DIAGRAM
tDEB
ms
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tDEB
VOUT
UNIT
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Timing Characteristics (Figure 6)
VIN
MAX
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PARAMETER
tDEB
tON
tOFF
tSTART
tSTART
Figure 6 AW328XX Timing Diagram
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VACOK
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VEN
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Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
TYPICAL CHARACTERISTICS
TABLE OF FIGURES
FIG No.
Normalized Rdson vs. Output Current
FIGURE 7
Normalized Rdson vs. Temp. (IOUT = 1A)
FIGURE 8
Normalized Rdson vs. Input Voltage (IOUT = 1A)
FIGURE 9
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INDEX
FIGURE 10
Input Supply Current vs. Supply Voltage
FIGURE 11
Normalized External OVLO Set OVP Threshold vs. Temp.
FIGURE 12
Normalized Debounce Time vs. Temp.
FIGURE 13
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Normalized Internal OVP Threshold vs. Temp.
FIGURE 14
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Over-Voltage Response (AW32805)
Power-up (COUT = 1μF, 100mA load)
Power-up (COUT = 100μF, 100mA load)
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108V Surge Without Device
108V Surge With Device (AW32805)
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Table 1
FIGURE 15
FIGURE 16
FIGURE 17
FIGURE 18
VIN = 5V, VEN = 0V, VOVLO = 0V, CIN = 0.1μF, COUT = 1μF, and TA = 25℃ unless otherwise specified.
2.0
1.0
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Normalized to IOUT = 1A
1.5
in
Normalized Rdson
2.5
2.0
Normalized to TA = 25°
C
Normalized Rdson
C
3.0
1.5
1.0
0.5
0.5
0.0
0.0
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0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
Output Current (A)
-40
-15
10
35
60
85
Temperature (°C)
Figure 8. Normalized Rdson vs. Temp. (IOUT = 1A)
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Figure 7. Normalized Rdson vs. Output Current
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Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
TYPICAL CHARACTERISTICS (CONTINUED)
VIN = 5V, VEN = 0V, VOVLO = 0V, CIN = 0.1μF, COUT = 1μF, and TA = 25℃ unless otherwise specified.
300
1.5
1.0
0.5
2
4
6
85°
C
150
100
50
0.0
0
0
8 10 12 14 16 18 20
0
Input Voltage (V)
10
15
20
25
30
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1.10
Normalized to TA = 25°
C
1.05
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1.05
Figure 10. Input Supply Current vs. Supply Voltage
Normalized Threshold Voltage
Normalized to TA = 25°
C
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1.00
0.95
-40
-15
10
C
Normalized Threshold Voltage
1.10
0.90
35
60
1.00
0.95
0.90
85
-40
-15
10
35
60
85
Temperature (°C)
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Temperature (°C)
in
Figure 11. Normalized Internal OVP Threshold vs.
Temp.
Figure 12. Normalized External OVLO Set OVP
Threshold vs. Temp.
2.00
8V
5V
Normalized to TA = 25°
C
VIN
5V / div
1.50
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Normalized Debounce Time
5
Input Voltage (V)
Figure 9. Normalized Rdson vs. Input Voltage (IOUT = 1A)
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25°
C
200
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2.0
–40°
C
250
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Normalized to VIN = 5V
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Normalized Rdson
2.5
Input Supply Current (A)
3.0
VOUT
5V / div
1.00
ACOK
2V / div
0.50
IOUT
100mA / div
0.00
-40
-15
10
35
60
85
Temperature (°C)
10µs / div
Figure 13. Normalized Debounce Time vs. Temp.
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Figure 14. Over-Voltage Response (AW32805)
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
TYPICAL CHARACTERISTICS (CONTINUED)
VIN
5V / div
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VIN
5V / div
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VIN = 5V, VEN = 0V, VOVLO = 0V, CIN = 0.1μF, COUT = 1μF, and TA = 25℃ unless otherwise specified.
VOUT
5V / div
VOUT
5V / div
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ACOK
2V / div
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IOUT
100mA / div
ACOK
2V / div
IOUT
500mA / div
5ms / div
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5ms / div
Figure 16. Power-up (COUT = 100μF, 100mA load)
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Figure 15. Power-up (COUT = 1μF, 100mA load)
VIN
10V / div
C
VOUT
10V / div
IIN
20A / div
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20V / div
20µs / div
10µs / div
Figure 18. 108V Surge With Device (AW32805)
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Figure 17. 108V Surge Without Device
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Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
DETAILED FUNCTIONAL DESCRIPTION
Device Operation
If the AW328XX is enabled and the input voltage is between UVLO and OVP threshold, the internal charge
pump begins to work after debounce time, the gate of the nFET switch will be slowly charged high till the
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switch is fully on. ACOK will be driven low about 30ms after VIN valid, indicating the switch is on with a good
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power input. If the input voltage exceeds the OVP trip level, the switch will be turned off in about 125ns. If EN
is pulled high, or input voltage falls below UVLO threshold, or over-temperature happens, the switch will also
be turned off.
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Surge Protection
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The AW328XX integrates a clamp circuit to suppress input surge voltage. For surge voltages between
VIN_OVLO and VIN_CLAMP, the switch will be turned off but the clamp circuit will not work. For surge voltages
greater than VIN_CLAMP, the internal clamp circuit will detect surge voltage level and discharge the surge energy
to ground. The device can suppress surge voltages up to 100V.
Over-Voltage Protection
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If the input voltage exceeds the OVP rising trip level, the switch will be turned off in about 125ns. The switch
will remain off until VIN falls below the OVP falling trip level.
OVP Threshold Adjustment
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If OVLO pin is not grounded, and by connecting external resistor divider to OVLO pin as shown in the typical
application circuit, between IN and GND, the OVP threshold can be adjusted as following:
R1 +R2
VOVLO_TH
R2
The adjustment range is 4V to 20V. When the OVLO pin voltage V OVLO exceeds VOVLO_SEL(0.42V typical),
VOVLO is compared with the reference voltage VOVLO_TH (1.2V typical) to judge whether input supply is
over-voltage. For example, if we select R1 = 51kΩ and R2 = 12.4kΩ, then the new OVP threshold calculated
from the above formula is 6.14V.
in
ACOK Output
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VIN_OVLO =
The device features an open-drain output ACOK, it should be connected to the system I/O rail through a
pull-up resistor. If the device is enabled and VIN_UVLO < VIN < VIN_OVLO, ACOK will be driven low indicating the
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switch is on with a good power input. If OVP, UVLO, or OT occurs, or EN is pulled high, the switch will be
turned off and ACOK will be pulled high.
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USB On-The-Go (OTG) Operation
If VIN = 0V and OUT is supplied by OTG voltage, the body diode of the load switch conducts current from OUT
to IN and the voltage drop from OUT to IN is approximately 0.7V. When VIN > VIN_UVLO, internal charge pump
begins to open the load switch after debounce time. After switch is fully on, current is supplied through switch
channel and the voltage drop from OUT to IN is minimum.
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Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
PCB LAYOUT CONSIDERATION
To make full use of the performance of AW328XX, the guidelines below should be followed.
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1. All the peripherals should be placed as close to the device as possible. Place the input capacitor CIN on
the top layer (same layer as the AW328XX) and close to IN pin, and place the output capacitor C OUT on
the top layer (same layer as the AW328XX) and close to OUT pin.
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2. Red bold paths on figure 4 and 5 are power lines that will flow large current, please route them on PCB as
straight, wide and short as possible.
3. If R1 and R2 are used, route OVLO line on PCB as short as possible to reduce parasitic capacitance.
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4. The power trace from USB connector to AW328XX may suffer from ESD event, keep other traces away
from it to minimize possible EMI and ESD coupling.
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C
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5. Use rounded corners on the power trace from USB connector to AW328XX to decrease EMI coupling.
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Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
TAPE AND REEL INFORMATION
TAPE DIMENSIONS
REEL DIMENSIONS
P1
P2
P0
K0
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W
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B0
D1
A0
Cavity
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A0:Dimension designed to accommodate the component width
B0:Dimension designed to accommodate the component length
K0:Dimension designed to accommodate the component thickness
W:Overall width of the carrier tape
P0:Pitch between successive cavity centers and sprocket hole
P1:Pitch between successive cavity centers
P2:Pitch between sprocket hole
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D0
Q1
Q2
Q1
Q3
Q4
Q3
Q1
Q2
Q1
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Q2
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QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Q4
Q3
Q4
Q3
Sprocket Holes
Q2
Q4
User Direction of Feed
C
Pocket Quadrants
All Dimensions are normal
Quantity Per D1:Reel Diameter
Reel
(mm)
ic
Package(mm)
Pins
AW328XXCSR
WLCSP 1.34x1.78
12
3000
178.00
D0:Reel Width
(mm)
A0
(mm)
B0
(mm)
K0
(mm)
P0
(mm)
P1
(mm)
P2
(mm)
W
(mm)
Pin1 Quadrant
9.00
1.46
1.90
0.81
2.00
4.00
4.00
8.00
Q2
a
w
in
Device
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14
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
PACKAGE DESCRIPTION
BOTTOM VIEW
e2
E
Ball
A1
e4
ti
a
e3
A
l
TOP VIEW
B
e1
D
12X Ø0.268±0.020
C
Symbol
A
A1
A2
NOM
0.575
0.195
fi
d
n
2
n
1
A3
D
E
e1
0.340
0.040
1.340
1.780
0.400
e2
e3
e4
0.200
0.400
0.400
Tolerance
±0.055
±0.020
±0.025
±0.010
±0.025
±0.025
NA
NA
NA
NA
Unit: mm
a
w
in
ic
C
o
A1
A2
A3
A
SIDE VIEW
3
e
4
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15
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
LAND PATTERN DATA
1.200
0.200
0.400
n
0.800
ti
a
l
0.400
Ø0.240
Copper Pad
Diameter
fi
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e
Ø0.340
Solder Mask
Opening
a
w
in
ic
C
o
n
NSMD Pad Type
Unit: mm
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16
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
n
Reflow Note
Package Reflow Standard Profile
o
Figure 19
fi
d
e
n
ti
a
l
REFLOW
C
Average ramp-up rate (217°C to peak)
Spec
Max. 3°C /sec
60-120sec
Time to be maintained above 217°C
60-150sec
Peak Temperature
250-260°C
ic
Time of Preheat temp. (from 150°C to 200°C)
20-40sec
Ramp-down rate
Max. 4°C /sec
Time from 25°C to peak temp
Max. 8min
in
Time within 5°C of actual peak temp
w
NOTE 1: All data are compared with the package-top temperature, measured on the package surface;
a
NOTE 2: AW328XX adopted the Pb-Free assembly.
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17
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
REVISION HISTORY
Change Record
V0.9
November 2016
Datasheet v0.9 released.
V1.0
October 2016
Datasheet v1.0 released.
l
Date
1. Datasheet template changed.
2. Input voltage range modified.
3. Notice for typical application circuits added.
V1.1
February 2018
ti
a
Version
4. VIN_PUL, IPEAK, IDIODE added in absolute maximum ratings table
n
5. PCB layout consideration added.
6. Land pattern data added.
1. Typical application circuit modified.
e
7. Reflow information added.
V1.2
June 2018
fi
d
2. Notice for typical application circuits #6 added.
3. Package information in ordering information modified.
4. Tape and reel information modified.
5. Package description modified.
a
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in
ic
C
o
n
6. Reflow curve and spec modified.
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18
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW32801/AW32805/
AW32809/AW32812
June 2018 V1.2
DISCLAIMER
l
Information in this document is believed to be accurate and reliable. However, Shanghai AWINIC Technology
Co., Ltd (AWINIC Technology) does not give any representations or warranties, expressed or implied, as to
the accuracy or completeness of such information and shall have no liability for the consequences of use of
such information.
ti
a
AWINIC Technology reserves the right to make changes to information published in this document, including
without limitation specifications and product descriptions, at any time and without notice. Customers shall
obtain the latest relevant information before placing orders and shall verify that such information is current and
complete. This document supersedes and replaces all information supplied prior to the publication hereof.
e
n
AWINIC Technology products are not designed, authorized or warranted to be suitable for use in medical,
military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an
AWINIC Technology product can reasonably be expected to result in personal injury, death or severe property
or environmental damage. AWINIC Technology accepts no liability for inclusion and/or use of AWINIC
Technology products in such equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
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Applications that are described herein for any of these products are for illustrative purposes only. AWINIC
Technology makes no representation or warranty that such applications will be suitable for the specified use
without further testing or modification.
All products are sold subject to the general terms and conditions of commercial sale supplied at the time of
order acknowledgement.
o
Nothing in this document may be interpreted or construed as an offer to sell products that is open for
acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other
industrial or intellectual property rights.
C
Reproduction of AWINIC information in AWINIC data books or data sheets is permissible only if reproduction
is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices.
AWINIC is not responsible or liable for such altered documentation. Information of third parties may be subject
to additional restrictions.
a
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in
ic
Resale of AWINIC components or services with statements different from or beyond the parameters stated by
AWINIC for that component or service voids all express and any implied warranties for the associated
AWINIC component or service and is an unfair and deceptive business practice. AWINIC is not responsible or
liable for any such statements.
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19
Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD