BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
4-Data Lane Switch
GENERAL DESCRIPTION
The BCT642A is a two-data-lane, MIPI,
D-PHY, C-PHY switch. This single-pole,
double-throw (SPDT) switch is optimized for
switching between two high-speed or low-power
MIPI sources. The BCT642A is designed for the
MIPI specification and allows connection to a CSI
or DSI module.
FEATURES
APPLICATIONS
Cellular Phones, Smart Phones
Displays
Switch Type: SPDT(6x)
Signal Types: MIPI, D-PHY,C-PHY
VCC:1.65 to 4.5V
RON: 6.0Ω Typical HS MIPI
7.0Ω Typical LP MIPI
ΔRON: 0.6Ω Typical
RON_FLAT: 0.3Ω Typical
ICC: 26uA Typical
Differential Bandwidth:2.5GHz Typical
CON:5.0pF
QFN3.4x2.5-24L Package
ORDERING INFORMATION
Order Number
Package Type
Temperature
Range
BCT642AEGG-TR
QFN3.4x2.5-24L
-40°C to +85°C
Marking
QTY/Reel
642A
XXXXX
3000
Mark Note:
1. "642A" in Marking is Product code
2. "XXXXX" in Marking will be appeared as the batch code.
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
DB2N
CLKAP
CLKAN
DA1P
DA1N
DA2P
PIN CONFIGURATION
18
17
16
15
14
13
20
11
SEL
DB1N
21
10
VCC
CLKBP
22
9
GND
CLKBN
23
8
/OE
NC
24
7
NC
2
3
4
5
6
D2N
1
D2P
DB1P
D1N
DA2N
D1P
12
CLKN
19
CLKP
DB2P
Figure1. Pin Configuration(Top Through View)
PIN DESCRIPTION
PIN
NAME
FUNCTION
1, 2
CLKP, CLKN
Clock Path (Common)
3, 4
D1P, D1N
Data Path 1 (Common)
5, 6
D2P, D2N
Data Path2 (Common)
7, 24
NC
No Connect (Float)
8
/OE
Output Enable (Active Low)
9
GND
Ground
10
VCC
Power
11
SEL
Select (0=A,1=B)
12, 13
DA2N, DA2P
Data Path (A2)
14, 15
DA1N, DA1P
Data Path (A1)
16, 17
CLKAN, CLKAP
Clock Path (A)
18, 19
DB2N, DB2P
Data Path (2B)
20, 21
DB1P, DB1N
Data Path (1B)
22, 23
CLKBP, CLKBN
Clock Path (B)
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
FUNCTIONAL DIAGRAM
BCT642A
CLKAP(17)
CLKAN(16)
DA1P(15)
(1)CLKP
DA1N(14)
DA2P(13)
(2)CLKN
DA2N(12)
(3)D1P
(4)D1N
(5)D2P
(6)D2N
CLKBP(22)
CLKBN(23)
DB1P(20)
DB1N(21)
DB2P(19)
DB2N(18)
(8)/OE
SWITCH
CONTROL
(11)SEL
(10)VCC
(9)GND
Figure2. Functional Diagram
TRUTH TABLE
SEL
/OE
Function
Don’t care
HIGH
Disconnect
LOW
LOW
D1, D2, CLK=DA1, DA2, CLKA
HIGH
LOW
D1, D2, CLK=DB1, DB2, CLKB
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
TYPICAL OPERATING CIRCUIT
Camera1
D
Camera2
C
D D
C
BCT642A
D
LCD1
LCD2
D
C
D D
BCT642A
C
D
MAP Processor
Figure 3.
C
C
MAP Processor
Application Block Diagram
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
ABSOLUTE MAXIMUM RATINGS
CAUTION
Supply Voltage (VCC)…............................-0.5V to +5.25V
This integrated circuit can be damaged by ESD if you don’t
(1)
DC Input Voltage (SEL, /OE) .................-0.5V to +5.25V
pay attention to ESD protection. Broadchip recommends
DC Switch I/O Voltage...............................-0.5V to 5.25V
that all integrated circuits be handled with appropriate
DC Input Diode Current.........................................-50mA
precautions. Failure to observe proper handling and
DC Output Current ……….....................................50mA
installation procedures can cause damage. ESD damage
Storage Temperature Range..................-65℃ to +150℃
can range from subtle performance degradation to
Junction Temperature.............................................150℃
complete device failure. Precision integrated circuits may
Operating Temperature Range.................-40℃ to +85℃
be more susceptible to damage because very small
Lead Temperature (Soldering, 10 sec)....................260℃
parametric changes could cause the device not to meet its
ESD Susceptibility
published specifications.
All Pins......................................................................2KV
Broadchip reserves the right to make any change in circuit
design, specification or other related things if necessary
without notice at any time. Please contact Broadchip sales
office to get the latest datasheet.
RECOMMENDED OPERATING CONDTIONS
The Recommended Operating Conditions table defines the conditions for actual device operation.
Recommended operating conditions are specified to ensure optimal performance to the datasheet
specifications.
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply Voltage
1.65
4.5
V
VCTRL
Control Input Voltage(SEL, /OE)(2)
0
VCC
V
Switch I/O Voltage (CLKn, HS Mode
0.1
0.3
VSW
V
CLKAn, CLKBn, Dn, DAn, DBn)
LP Mode
0
1.2
℃
TA
Operating Temperature
-40
+85
Notes:
1. The input and output negative ratings maybe exceed if the input and output diode current ratings are observed.
2. The control input must be held HIGH or LOW; it must not float.
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
DC ELECTRICAL CHARACTERISTICS
( All typical values are TA = 25℃, unless otherwise specified.)
PARAMETER
SYM
Control Input Leakage(SEL,
/OE)
IIN
Input Voltage High
Input Voltage Low
VCC (V)
MIN
VSW=0 to 1.3V
1.65 to 4.5
-1
VIH
VIN=0 to VCC
1.65 to 4.5
1.0
VIL
VIN=0 to VCC
1.65 to 4.5
INO(OFF)
INC(OFF)
CLKn, Dn=0.3V;
VCC-0.3V; CLKAn, DAn,
or CLKBn;
DBn=VCC-0.3V, 0.3V, or
Floating; /OE=0V
1.65 to 4.5
IA(ON)
CLKn, Dn=0.3V;
Vcc-0.3V; CLKAn, DAn,
or CLKBn;
DBn=VCC-0.3V, 0.3V, or
Floating; /OE=0V
Power-Off Leakage Current
IOFF
CLKn, Dn or CLKAn,
DAn, or CLKBn; DBn;
VIN=0V to 4.5V; VCC=0V
Off-State Leakage
IOZ
0≤CLKn, Dn, CLKAn,
DAn, CLKBn, DBn≤
3.6V; /OE=High
Off leakage Current of Port
CLKAn, DAn, CLKBn, DBn
On leakage Current of
Common Ports(CLKAn, Dn)
CONDITIONS
TYP
MAX UNITS
1
uA
V
0.4
V
-1
1
uA
1.65 to 4.5
-1
1
uA
0
-1
1
uA
4.5
-1
1
uA
ION=-10mA, /OE=0V,
RON_MIPI SEL=VCC or 0V, CLKA, B,
DBn or DAn=0.1, 0.2,
_HS
0.3
1.8--4.5
6.0
Ω
ION=-10mA, /OE=0V,
Switch On Resistance for LP RON_MIPI
SEL=VCC or 0V, CLKA, B,
MIPI Applications(3)
_LP
DBn or DAn=0, 0.6, 1.2V
1.8-4.5
7.0
Ω
ION=-10mA, /OE=0V,
SEL=VCC or 0V, CLKA, B,
DBn or DAn=0.1, 0.2,
0.3
1.8-4.5
0.6
Ω
Switch On Resistance for
HS MIPI Applications(3)
On Resistance Matching
Between HS MIPI
Channels(4)
Δ
RON_MIPI
_HS
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
DC ELECTRICAL CHARACTERISTICS
( All typical values are TA = 25℃, unless otherwise specified.)
PARAMETER
CONDITIONS
VCC (V)
ION=-10mA, /OE=0V,
SEL=VCC or 0V, CLKA, B,
DBn or DAn=0.0, 0.6,
1.2V
1.8-4.5
0.6
Ω
On Resistance Flatness for RON_FLA
HS MIPI Signals(4)
T_MIPI_HS
ION=-10mA, /OE=0V,
SEL=VCC or 0V, CLKA, B,
DBn or DAn=0.1, 0.2,
0.3
1.8-4.5
0.3
Ω
On Resistance Flatness for RON_FLA
LP MIPI Signals(4)
T_MIPI_LP
ION=-10mA, /OE=0V,
SEL=VCC or 0V, CLKA, B,
DBn or DAn=0.0, 0.6,
1.2V
1.8-4.5
1.5
Ω
Quiescent Hi-Z Supply
Current
ICCZ
V/OE= VCC ,VIN=0 or VCC,
IOUT=0
4.5
Quiescent Supply Current
ICC
V/OE= 0 ,VIN=0 or VCC,
IOUT=0
2.8
26
Increase in ICC Current Per
Control Voltage and VCC
ICCT
4.5
4.0
2.5
0.1
On Resistance Matching
Between LP MIPI
Channels(4)
SYM
Δ
RON_MIPI
_LP
VSEL, /OE=1.65V
MIN
TYP
MAX UNITS
0.5
uA
uA
uA
Notes:
3. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is
determined by the lower of the voltage on the two (A or B ports).
4. Guaranteed by characterization
AC ELECTRICAL CHARACTERISTICS
( All values are for VCC=3.3V at TA=25℃ unless otherwise specified.)
PARAMETER
SYM
CONDITIONS
VCC (V)
MIN
TYP
MAX UNITS
Initalization Time VCC to
Output(5)
tINIT
RL=50Ω, CL=5pF,
VSW=1.2V
2.5 to 4.5
100
1.8
150
Enable Turn-On Time, /OE
to Output
tEN
RL=50Ω, CL=5pF,
VSW=1.2V
2.5 to 4.5
120
200
1.8
250
500
Disable Turn-off Time, /OE
to Output
tDIS
RL=50Ω, CL=5pF,
VSW=1.2V
2.5 to 4.5
25
50
1.8
50
90
Turn-On Time
SEL to Output
tON
RL=50Ω, CL=5pF,
VSW=1.2V
2.5 to 4.5
50
100
1.8
75
125
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us
ns
ns
ns
BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
AC ELECTRICAL CHARACTERISTICS
( All values are for VCC=3.3V at TA=25℃ unless otherwise specified.)
PARAMETER
SYM
CONDITIONS
Turn-Off Time
SEL to Output
tOFF
RL=50Ω, CL=5pF,
VSW=1.2V
Break-Before-Make Time
tBBM
CL=5pF, RL=50Ω,
VSW=1.2V
OIRR
f=750MHz, RL=50Ω,
/OE=VCC ,VSW =-1dBm
(200mVPP)
Xtalk
f=750MHz, RL=50Ω,
/OE=VCC ,VSW =-1dBm
(200mVPP)
(5)
Off Isolation for MIPI
Crosstalk for MIPI
(5)
Differential -3db Bandwidth(5) BW
CL=0pF, RL=50Ω
VCC (V)
MIN
TYP
MAX UNITS
2.5 to 4.5
50
200
1.8
200
325
10
ns
50
ns
1.65 to 4.5
-32
dB
1.65 to 4.5
-35
dB
2.5
GHz
3.0
2.0
Note:
5. Guaranteed by characterization.
HIGH-SPEED-RELATED AC ELECTRICAL CHARACTERISTICS
PARAMETER
Channel-to-Channel
Single-Ended Skew(6)
Skew of Opposite
Transitions of the Same
Output(6)
SYM
CONDITIONS
VCC (V)
MIN
TYP
MAX UNITS
tSK(O)
TDR-Based Method
(VSW =0.2VPP,
CL=CON)
3.3
6
20
ps
tSK(P)
TDR-Based Method
(VSW =0.2VPP,
CL=CON)
3.3
6
20
ps
Notes:
6. Guaranteed by characterization.
CAPACITANCE
PARAMETER
Control Pin Input
Capacitance(7)
SYM
CIN
CONDITIONS
VCC=0V, f=1MHz
VCC (V)
MIN
TYP
0
2.1
Output On Capacitance(7)
CON
VCC=3.3V, /OE=0V,
f=1MHz
3.3
5.0
Output Off Capacitance(7)
COFF
VCC and /OE=3.3V,
f=1MHz
3.3
2.0
MAX UNITS
pF
Note:
7. Guaranteed by characterization.
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
TEST DIAGRAMS
Figure 4. On Resistance
Figure 6. AC Test Circuit Board
Figure 8. Propagation Delay(tRtF-500ps)
Figure 5. Off Leakage
Figure 7. Turn-On/Turn-Off waveform
Figure 9. Channel to Channel Skew
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
TEST DIAGRAMS (CONTINUED)
Figure 10. Channel Off Capacitance
Figure 11. Channel On Capacitance
Figure 12. Break-Before-Make Interval Timing
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
PACKAGE OUTLINE DIMENSIONS
QFN3.4x2.5-24L
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BCT642A
2:1 MIPI D-PHY,C-PHY(2.5Gbps)
2-Data Lane Switch
RECOMMEDNED PCB LAYOUT PATTERN (UNIT:mm)
0.4
0.7
0.2
0.4
3.8
0.6
0.2
2.9
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