BTHQ21603V-STF-LV-LED YG WC

BATRON Specification for BTHQ 21603V-STF-LV-LED Y.G. with connector Version June 2003 VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 2 OF 12 DOCUMENT REVISION HISTORY 1: DOCUMENT DATE DESCRIPTION REVISION FROM TO A 2003.06.21 First Release (Based Test Specification VL-TS-BTHQ 21603VSS-XX REV.E, 2003-05-05). CHANGED BY CHECKED BY SUNNY LEE ZHOU CHUN HUA VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 3 OF 12 CONTENTS Page No. 1. GENERAL DESCRIPTION 4 2. MECHANICAL SPECIFICATIONS 4 3. INTERFACE SIGNALS 6 4. 4.1 4.2 ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25qC) ENVIRONMENTAL CONDITION 7 7 7 5. 5.1 5.2 5.3 5.4 ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS TIMING DIAGRAM OF VDD AGAINST V0 CORRESPONDENCE BETWEEN CHARACTER CODES AND CHARACTER PATTERNS (NOVATEK STANDARD NT3881D-01) 8 8 9 11 12 VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 4 OF 12 Specification of LCD Module Type Item No.: BTHQ 21603VSS-06 1. General Description x x x x x 16 characters (5x8 dots) x 2 lines STN Positive Yellow Transflective Dot Matrix LCD module. Viewing Angle: 6 O’clock direction. Driving scheme: 1/16 Duty, 1/5 bias. ‘NOVATEK’ NT3881DH-01/AI (Die form) LCD Controller and Driver or equivalent. ‘SAMSUNG’ KS0065B-PCC (Die form) 40-Channel Segment/Common Driver for Dot Matrix LCD or equivalent. x Connector: 16 pins SMD "FULLCONN" connector (CON-16X1-35). x Yellow - Green LED01 backlight. 2. Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Specifications Outline dimensions 53.0(W) x 20.0(H) x 8.0 MAX.(D) (Excluded connector) Effective viewing area 36.0(W) x 10.0(H) Active area 34.10(W) x 7.40(H) Display format 16 characters x 2 lines Character size 1.85(W) x 3.15(H) (5 x 8 dots) Character spacing 0.30(W) x 1.10(H) Character pitch 2.15(W) x 4.25(H) Dot size 0.358(W) x 0.381(H) Dot spacing 0.015(W) x 0.015(H) Dot pitch 0.373(W) x 0.396(H) Weight: Approx. 11.0 Unit mm mm mm mm mm mm mm mm mm grams VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 5 OF 12 Figure 1: Outline Drawing VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 6 OF 12 3. Interface signals Table 2 Pin No. 1 2 3 4 Symbol VSS VDD V0 RS 5 R/W 6 E 7 8 9 10 11 12 13 14 15 16 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 LED(+) LED(-) Description Ground (0V). Power supply for logic (+5V) Power supply for LCD driver Register Select Input: “High” for Data register (for read and write) “Low” for Instruction register (for write), Busy flag, address counter (for read) Read/Write signal: “High” for Read mode. “Low” for Write mode. Enable. Start signal for data read /write. Data input/output (LSB) Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output (MSB) Anode of LED backlight Cathode of LED backlight VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 7 OF 12 4. Absolute Maximum Ratings 4.1 Electrical Maximum Ratings (Ta = 25 ºC) Table 3 Parameter Symbol Min. Max. Power Supply voltage (Logic) VDD - VSS -0.3 +7.0 Power Supply voltage (LCD drive) VLCD=VDD – V0 -0.3 +13.5 Input voltage Vin -0.3 VDD +0.3 Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. All voltage values are referenced to VSS = 0V. 4.2 Environmental Condition Table 4 Item Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape Operating Storage Temperature Temperature (Topr) (Tstg) Min. Max. Min. Max. 0qC +50qC -10qC +60qC 95% max. RH for Ta d 40qC < 95% RH for Ta > 40qC Frequency: 10 a 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration : 11 ms Peak acceleration: 981 m/s2 = 100g Number of shocks : 3 shocks in 3 mutually perpendicular axes. Remark Dry no condensation 3 directions 3 directions Unit V V V VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 8 OF 12 5. Electrical Specifications 5.1 Typical Electrical Characteristics At Ta = 25 qC, VDD = 5Vr5%, VSS=0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Input signal voltage 1 for E,DB0-DB7,R/W,RS. Input signal voltage 2 for OSC1. Supply Current (Logic & LCD) Supply Current (LCD) Supply voltage of yellow green LED01 backlight Symbol Conditions VDD-VSS VLCD VDD=5.0V, Ta=0 qC, =VDD-V0 Note1. VDD=5.0V, Ta=25 qC, Note1. VDD=5.0V, Ta=50 qC, Note1. VIH1 “H” level “L” level VIL1 VIH2 “H” level VIL2 IDD I0 VLED “L” level Character mode, Note 1 Checker board mode, Note 1 Character mode, Note 1 Checker board mode, Note 1 Forward current =20mA Min. 4.75 - Typ. 5.0 4.7 Max. 5.25 - Unit V V 4.0 4.5 5.0 V - 4.2 - V 2.2 -0.3 VDD -1.0 VSS - - VDD 0.8 VDD V V V 1.3 1.5 1.0 2.0 2.2 V mA mA - 0.2 0.3 mA - 0.2 0.3 mA 3.9 4.0 4.1 V Number of LED dies =2x2=4 Note (1) : There is tolerance in optimum LCD driving voltage during production and it will be within the specified range. VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 9 OF 12 5.2 Timing Specifications At Ta = 0 qC To +50 qC, VDD = +5Vr5%, VSS = 0V. Refer to Fig. 2, the bus timing diagram for write mode. Table 6 Parameter Enable cycle time Enable ”High” level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Data output delay Data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tDS tDHR Min. 500 300 60 100 10 100 10 Max. 25 25 - Unit ns ns ns ns ns - ns ns ns Max. 25 25 - Unit ns ns ns ns ns 190 - ns ns ns Remarks 8-bit operation mode 4-bit operation mode Refer to Fig. 3, the bus timing diagram for read mode . Table 7 Parameter Enable cycle time Enable ”High” level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Read data output delay Read data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tRD tDHR Min. 500 300 60 100 10 20 Remarks 8-bit operation mode 4-bit operation mode VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 10 OF 12 Figure 2: Bus write operation sequence (Writing data from MPU to NT3881D). Figure 3: Bus read operation sequence (Reading out data from NT3881D to MPU). VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 11 OF 12 5.3 Timing Diagram of VDD against V0. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V0. VDD 95% LOGIC SUPPLY VOLTAGE V0 0V 50ms(typical) OV LCD SUPPLY VOLTAGE Figure 4: Timing diagram of VDD against V0. VL-FS-BTHQ 21603VSS-06 REV. A (BTHQ 21603V-STF-LV-LED Y.G. with connector) JUNE/2003 PAGE 12 OF 12 5.4 Correspondence between Character Codes and Character Patterns (NOVATEK Standard NT3881D-01)