BTHQ128064AVE-COG-FERE

BATRON supplied by Midas Components Ltd -- Tel : +44 1493 602602 -- www.midascomponents.co.uk Specification for BTHQ 128064AVE-FERE-06-COG Version November 2003 supplied by Midas Components Ltd -- Tel : +44 1493 602602 -- www.midascomponents.co.uk VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 2 OF 15 DOCUMENT DOCUMENT REVISION FROM TO A REVISION DATE 2003.11.28 HISTORY 1: DESCRIPTION First Release. CHANGED BY SUNNY LEE CHECKED BY PRITT LEE VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 3 OF 15 CONTENTS Page No. 1. GENERAL DESCRIPTION 4 2. MECHANICAL SPECIFICATIONS 4 3. INTERFACE 7 4. 4.1 4.2 ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25°C) ENVIRONMENTAL CONDITION 9 9 9 5. 5.1 5.2 5.3 ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS INSTRUCTION SET 10 10 11 14 6. REFERENCE APPLICATION CIRCUIT (8080) EXAMPLE 15 SIGNALS VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 4 OF 15 Specification of LCD Module Type Model No.: COG-BTHQ12864-02 1. General Description • • • • • • • 2. 128 x 64 dots FSTN Positive Black & White Reflective Dot Matrix LCD Module. Viewing Angle: 6 o’clock direction. Driving duty: 1/65 duty, 1/7 bias. ‘Epson’ SED1565D0B (COG) Dot Matrix LCD Driver. 8080 Series MPU interface (default). 6800 Series MPU interface (Optional). FPC. Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Outline dimensions View area Active area Display format Dot size Dot spacing Dot pitch Weight: Specifications 74.8(W) x 47.5(H) x 1.83(D)(Exclude FPC) 74.8(W) x 148.65(H) x 1.83(D)(Include FPC) 66.8 MIN.(W) x 35.5 MIN. (H) 63.985(W) x 31.985(H) 128 (W) x 64(H) 0.485(W) x 0.485(H) 0.015(W) x 0.015(H) 0.500(W) x 0.500(H) TBD Unit mm mm mm dots mm mm mm grams VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 5 OF 15 Figure 1: Module Specification VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 6 OF 15 COG-BTHQ12864-02 32 128 X 64 DOTS 128 32 VDD GND /CS1 /RES A0 /W R /RD D0 ~ D7 VOUT CAP3CAP1+ CAP1 CAP2- 8 DOT M ATRIX LC D DR IVER 'EPSON' SED1565D0B (COG) CAP2+ V1 V2 V3 V4 V5 VR C86 IRS Figure 2: Block Diagram VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 7 OF 15 3. Interface signals Table 2 (a) Pin Symbol No. 1 NC 2 /CS1 3 /RES 4 A0 5 /WR 6 /RD 7 8 9 10 11 12 13 14 15 16 17 D0 D1 D2 D3 D4 D5 D6 D7 VDD GND VOUT 18 19 20 21 22 Description No connection. This is the chip select signal. When /CS1 = “L”, then the chip select become active, and data/command I/O is enabled. When /RES is set to “L,” the settings are initialized. The reset operation is performed by the /RES signal level. This is connected to the least significant bit of the normal MPU address bus, and it determines whether the data bits are data or a command. A0 = “H”: Indicates that D0 to D7 are display data. A0 = “L”: Indicates that D0 to D7 are control data. When connected to an 8080 MPU, this is active LOW. This terminal connects to the 8080 MPU /WR signal. The signals on the data bus are latched at the rising edge of the /WR signal. When connected to an 8080 MPU, this is active LOW. This pin is connected to the /RD signal of the 8080 MPU, and the SED1565 series data bus is in an output status when this signal is “L”. This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit 8 standard MPU data bus. Power supply. Shared with the MPU power supply terminal VCC. Connection with ground. DC/DC voltage converter. Connect a capacitor between this terminal and GND . CAP3- DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1+ terminal. CAP1+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1terminal. CAP1- DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1+ terminal. CAP2- DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2+ terminal. CAP2+ DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2terminal. VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 8 OF 15 Table 2 (b) Pin Symbol Description No. 23~ V1,V2, This is a multi-level power supply for the liquid crystal drive. The voltage applied is 27 V3,V4, determined by the liquid crystal cell, and is changed through the use of a resistive V5 voltage divided or through changing the impedance using an op. amp. Voltage levels are determined based on VDD, and must maintain the relative magnitudes shown below. VDD (= V0) ЊV1ЊV2ЊV3 ЊV4ЊV5 Master operation: When the power supply turns ON, the internal power supply circuits produce the V1 to V4 voltages shown below. The voltage settings are selected using the LCD bias set command. For 1/7 bias: V1=(1/7)xV5, V2=(2/7)xV5, V3=(5/7)xV5, V4=(6/7)xV5. 28 VR Output voltage regulator terminal. Provides the voltage between VDD and V5 through a resistive voltage divider. These are only enabled when the V5 voltage regulator internal resistors are not used (IRS = “L”). These cannot be used when the V5 voltage regulator internal resistors are used (IRS = “H”). 29 C86 This is the MPU interface switch terminal. C86 = “H”: 6800 Series MPU interface. C86 = “L”: 8080 MPU interface. 30 IRS This terminal selects the resistors for the V5 voltage level adjustment. IRS = “H”: Use the internal resistors IRS = “L”: Do not use the internal resistors. The V5 voltage level is regulated by an external resistive voltage divider attached to the VR terminal. This pin is enabled only when the master operation mode is selected. It is fixed to either “H” or “L” when the slave operation mode is selected. VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 9 OF 15 4. 4.1 Absolute Maximum Ratings Electrical Maximum Ratings (Ta = 25 ºC) Table 3 Parameter Power Supply voltage (Logic) Symbol VDD-GND =VDD-VSS GND(=VSS2) Power supply voltage (VDD standard) Min. -0.3 Max. +7.0 Unit V -7.0 -6.0 -4.5 -18.0 +0.3 +0.3 +0.3 +0.3 V V V V With Triple set-up With Quad step-up Power Supply voltage(V5,VOUT) V5,VOUT (VDD standard) Power Supply voltage(V1~V4) V1,V2,V3,V4 V5 +0.3 V (VDD standard) Input voltage Vin -0.3 VDD+0.3 V Note: 1.)The modules may be destroyed if they are used beyond the absolute maximum ratings. 2.) Insure that the voltage levels of V1, V2, V3, and V4 are always such that VDD ЊV1 ЊV2 ЊV3 ЊV4 ЊV5. 3.) The VSS2,V1 to V5 and VOUT are relative to VDD=0V reference. 4.2 Environmental Condition Table 4 Item Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape Operating Storage Temperature Temperature (Topr) (Tstg) Min. Max. Min. Max. -20°C +70°C -30°C +80°C 95% max. RH for Ta ≤ 40°C < 95% RH for Ta > 40°C Frequency: 10 ∼ 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration: 11 ms Peak acceleration: 981 m/s2 = 100g Number of shocks: 3 shocks in 3 mutually perpendicular axes. Remark Dry no condensation 3 directions 3 directions VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 10 OF 15 5. Electrical Specifications 5.1 Typical Electrical Characteristics At Ta = 25 °C, VDD = 5V±5%, GND =0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Low-level input signal voltage High-level input signal voltage Supply Current (Logic & LCD) Symbol VDD-GND VLCD =VDD-V5 VILC Conditions VDD = +5.0V, Note (1) VIHC IDD VDD = 5V, Character mode VDD = 5V, Checker board mode Min. 4.75 Typ. 5.0 Max. 5.25 Unit V 8.6 8.9 9.2 V GND - 0.2xVDD V 0.8xVDD - VDD V - 0.5 0.7 mA - 1.1 1.3 mA Note (1): There is tolerance in optimum LCD driving voltage during production and it will be within the specified range. VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 11 OF 15 5.2 Timing Specifications Reset Timing At Ta = -20 °C to +70 °C, VDD = +5.0V± ±5%, GND = 0V. Table 6 Note: All timing is specified with 20% and 80% of VDD as the standard. /RES Figure 3:Reset Timing VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 12 OF 15 System Bus Read/Write Characteristics (8080 Series MPU) At Ta = -20 °C to +70 °C, VDD = +5.0V± ±5%, GND = 0V. Table 7 /CS1 Figure 4: MPU bus read / write timing diagram (80 family MPU) VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 13 OF 15 System Bus Read/Write Characteristics (6800 Series MPU) At Ta = -20 °C to +70 °C, VDD = +5.0V± ±5%, VSS = 0V. Table 8 /CS1 Figure 5: MPU bus read / write timing diagram (68 family MPU) VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 14 OF 15 5.3 Instruction Set Table 8 VL-FS-COG-BTHQ12864-02 REV. A (BTHQ 128064AVE-FERE-06-COG) NOV/2003 PAGE 15 OF 15 6. Reference Application Circuit (8080) Example