74HC573D

74HC573 High-Performance Silicon-Gate CMOS 74HC573N DIP-20 The 74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices 74HC573D SOP-20 ORDERING INFORMATION TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM PIN 20=VCC PIN 10 = GND FUNCTION TABLE Inputs Output Enable Latch Enable D Q L H H H L H L L L L X no change H X X Z X = don’t care Z = high impedance www.slkormicro.com 1 Output 74HC573 MAXIMUM RATINGS * Symbol Parameter Value Unit -0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin ±20 mA DC Output Current, per Pin ±35 mA ICC DC Supply Current, VCC and GND Pins ±75 mA PD Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750 500 mW -65 to +150 °C 260 °C VOUT IIN IOUT Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types tr, t f Input Rise and Fall Time (Figure 1) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min Max Unit 2.0 6.0 V 0 VCC V -55 +125 °C 0 0 0 1000 500 400 ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. www.slkormicro.com 2 74HC573 DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol Parameter Test Conditions Guaranteed Limit V 25 °C to -55°C ≤8 5 °C ≤12 5 °C Unit VIH Minimum HighLevel Input Voltage VOUT=0.1 V or VCC-0.1 V IOUT≤ 20 µA 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V VIL Maximum Low Level Input Voltage VOUT=0.1 V or VCC-0.1 V IOUT ≤ 20 µA 2.0 4.5 6.0 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V VOH MinimumHigh-Level Output Voltage VIN=VIH or VIL IOUT ≤ 20 µA 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V 4.5 6.0 3.98 5.48 3.84 5.34 3.7 5.2 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 4.5 6.0 0.26 0.26 0.33 0.33 0.4 0.4 6.0 ±0.1 ±1.0 ±1.0 µA VIN=VIH or VIL IOUT ≤ 6.0 mA IOUT ≤ 7.8 mA VOL Maximum LowLevel Output Voltage VIN= VIL or VIH IOUT ≤ 20 µA VIN= VIL or VIH IOUT ≤ 6.0 m A IOUT ≤7.8 m A VIN=VCC or GND V IIN Maximum Input Leakage Current IOZ Maximum Three State Leakage Current Output in HighImpedance State VIN =VIH or VIL VOUT= VCC or GND 6.0 ±0.5 ±5.0 ±10 µA ICC Maximum Quiescent Supply Current (per Package) VIN=VCC or GND IOUT=0µA 6.0 4.0 40 160 µA www.slkormicro.com 3 74HC573 AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input t r=t f=6.0 ns) VCC Symbol Parameter Guaranteed Limit V 25 °C to -55°C ≤85°C ≤125°C Unit tPLH, t PHL Maximum Propagation Delay, Input D to Q (Figures 1 and 5) 2.0 4.5 6.0 150 30 26 190 38 33 225 45 38 ns tPLH, t PHL Maximum Propagation Delay,Latch Enable to Q (Figures 2 and 5) 2.0 4.5 6.0 160 32 27 200 40 34 240 48 41 ns tPLZ, t PHZ Maximum Propagation Delay, Output Enable to Q (Figures 3 and 6) 2.0 4.5 6.0 150 30 26 190 38 33 225 45 38 ns tPZH, t PZL Maximum Propagation Delay, Output Enable to Q (Figures 3 and 6) 2.0 4.5 6.0 150 30 26 190 38 33 225 45 38 ns tTLH, t THL Maximum Output Transition Time, Any Output (Figures 1 and 5) 2.0 4.5 6.0 60 12 10 75 15 13 90 18 15 ns CIN Maximum Input Capacitance - 10 10 10 pF COUT Maximum Three-State Output Capacitance (Output in HighImpedance State) - 15 15 15 pF Power Dissipation Capacitance (Per Enabled Output) CPD Typical @25°C,VCC=5.0 V Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC 23 pF TIMING REQUIREMENTS (CL=50pF,Input t r=t f=6.0 ns) VCC Symbol Parameter Guaranteed Limit V 25 °C to -55°C ≤85°C ≤125°C Unit tSU Minimum Setup Time, Input D to Latch Enable (Figure 4) 2.0 4.5 6.0 50 10 9 65 13 11 75 15 13 ns th Minimum Hold Time, Latch Enable to Input D (Figure 4) 2.0 4.5 6.0 5 5 5 5 5 5 5 5 5 ns tw Minimum Pulse Width, Latch Enable (Figure 2) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns tr, tf Maximum Input Rise and Fall Times (Figure 1) 2.0 4.5 6.0 1000 500 400 1000 500 400 1000 500 400 ns www.slkormicro.com 4 74HC573 Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms Figure 4. Switching Waveforms EXPANDED LOGIC DIAGRAM Figure 5. Test Circuit Figure 6. Test Circuit www.slkormicro.com 5 74HC573 20-Pin Small Outline Package (SOP20) D�mens�ons �n Inches and (M�ll�meters) z A2 A1 A e 1.27mm b WITH PLATING c1 BASE METAL Φ R1 R L2 L L1 www.slkormicro.com 一般尺寸 (测量单位 = MILLMETER/ mm) MIN. NOM. MAX. 符号 A A1 A2 b1 b c c1 D E E1 e L L1 L2 R R1 Φ z b1 b c E E1 D (12.7mm) 6 2.465 0.100 2.100 0.366 0.356 0.234 12.500 10.206 7.450 0.800 1.303 00 - 2.515 0.150 2.300 0.426 0.406 0.254 12.700 10.306 7.500 1.27 0.864 1.403 0.274 0.300 0.200 0.660 2.565 0.200 2.500 0.486 0.456 0.274 12.900 10.406 7.550 0.900 1.503 100 - 74HC573 20-Pin Plastic Dual Inline Package (DIP20) D�mens�ons �n Inches E1 θ eA E C 0 D (1026m�l) S 120 m�l 一般尺寸 (测量单位 = INCH) A2 A 符号 L A1 e 100 m�l A A1 A2 b b1 C D E E1 e L θ0 eA S b b1 MIN. 0.015 0.125 0.016 0.058 0.008 1.012 0.290 0.245 0.090 0.120 0 0.355 - NOM. 0.13 0.018 0.060 0.010 1.026 0.300 0.250 0.100 0.130 0.355 - MAX. 0.175 0.135 0.020 0.064 0.11 1.040 0.310 0.255 0.110 0.140 15 0.375 0.075 UNIT: INCH, 1 �nch = 1000 m�l www.slkormicro.com 7