OLED DISPLAY MODULE
Product Specification
CUSTOMER
Standard
PRODUCT
NUMBER
DD-160128FC-2B
Date
CUSTOMER
APPROVAL
INTERNAL APPROVALS
Product Mgr
Doc. Control
Electr. Eng
Bazile
Peter
Bazile
Peter
Luo
Luo
Date: 15 Oct 10
Product No.
DD-160128FC-2B
Date: 15 Oct 10
REV. E
Date: 15 Oct 10
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TABLE OF CONTENTS
1
MAIN FEATURES .......................................................................................................... 4
2
MECHANICAL SPECIFICATION ............................................................................... 5
2.1
2.2
3
ELECTRICAL SPECIFICATION ................................................................................. 7
3.1
3.2
3.3
3.4
3.5
4
ABSOLUTE MAXIMUM RATINGS ....................................................................... 7
ELECTRICAL CHARACTERISTICS ...................................................................... 8
INTERFACE PIN ASSIGNMENT ............................................................................ 9
BLOCK DIAGRAM ................................................................................................ 11
TIMING CHARACTERISTICS .............................................................................. 12
OPTICAL SPECIFICATION ....................................................................................... 18
4.1
5
MECHANICAL CHARACTERISTICS .................................................................... 5
MECHANICAL DRAWING ..................................................................................... 6
OPTICAL CHARACTERISTICS ............................................................................ 18
FUNCTIONAL SPECIFICATION .............................................................................. 19
5.1
5.2
5.3
5.4
COMMANDS .......................................................................................................... 19
POWER UP/DOWN SEQUENCE ........................................................................... 19
RESET CIRCUIT ..................................................................................................... 19
ACTUAL APPLICATION EXAMPLE ................................................................... 20
6
PACKAGING AND LABELLING SPECIFICATION .............................................. 23
7
QUALITY ASSURANCE SPECIFICATION ............................................................. 24
7.1
7.2
7.3
8
RELIABILITY SPECIFICATION .............................................................................. 29
8.1
8.2
8.1
9
CONFORMITY ....................................................................................................... 24
DELIVERY ASSURANCE ..................................................................................... 24
DEALING WITH CUSTOMER COMPLAINTS .................................................... 28
RELIABILITY TESTS ............................................................................................ 29
LIFE TIME ............................................................................................................... 29
FAILURE CHECK STANDARD ............................................................................ 29
HANDLING PRECAUTIONS ...................................................................................... 30
9.1
9.2
9.3
9.4
9.5
HANDLING PRECAUTIONS ................................................................................ 30
STORAGE PRECAUTIONS ................................................................................... 31
DESIGNING PRECAUTIONS ................................................................................ 31
OTHER PRECAUTIONS ........................................................................................ 32
PRECAUTIONS WHEN DISPOSING OF THE OEL DISPLAY MODULES ....... 32
10 SUPPORTED ACCESSORIES .................................................................................... 33
10.1
10.2
10.3
10.4
DUO KIT .................................................................................................................. 33
TRANSITION BOARD CARD ............................................................................... 33
CONNECTOR BOARD CARD ............................................................................... 33
CONNECTOR ......................................................................................................... 33
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REVISION RECORD
Rev.
Date
A
22 Nov 06
B
26 Dec 10
C
07 Dec 11
D
28 Nov 12
E
24 Oct 14
Product No.
Page
Chapt.
Comment
ECR no.
First Issue
4
5
7
8
18
6
11
17
19
29
4
30
to
33
1. Overall dimensions
2. Weight
3. Driver Supply Voltage
4. Operating current for VDDH
5. Optics Characteristics
6. Mechanical Drawing
7. Block Diagram
8. Add RGB interface
9. Power up sequence
10. Low Temperature Operation
11. Operating temperature
9
10
Handling Precautions
Support Acceories
33
10
Errors on 10.1 DUO KIT
6
2
7
11
16
19
20
3.2
3.4
3.5
5.2
5.4
Revised Drawing (sticky tape
removed between glass and FPC)
Electrical characteristic
Block Diagram
Serial Interface
Power sequence
Application Example
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1 MAIN FEATURES
ITEM
CONTENTS
Display Format
160 (RGB) x 128 Dots
Overall Dimensions
Glass 39.9 x 34.0 x 1.6 mm
Colour
262,144 Colour
Active Area
33.575 x 26.864 mm
Viewing Area
35.575 x 28.864 mm
Display Mode
Passive Matrix (1.69”)
Driving Method
1/128 duty
Driver IC
SEPS525
Operating temperature
-40 ~ +70
Storage temperature
-40 ~ +80
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2 MECHANICAL SPECIFICATION
2.1 MECHANICAL CHARACTERISTICS
ITEM
CHARACTERISTIC
UNIT
160 (RGB) x 128
Dots
Glass 39.9 x 34.0 x 1.6
mm
Viewing Area
35.575 x 28.864
mm
Active Area
33.575 x 26.864
mm
Dot Size
0.045 x RGB x 0.194
mm
Dot Pitch
0.07 x RGB x 0.21
mm
4.55
g
Display Format
Overall Dimensions
Weight
IC Controller/Driver
Product No.
SEPS525F0A (COF)
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2.2 MECHANICAL DRAWING
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3 ELECTRICAL SPECIFICATION
3.1 ABSOLUTE MAXIMUM RATINGS
VSS = 0 V, Ta = 25 °C
Item
Symbol
Min
Max
Unit
VDD
-0.3
4
V
Supply Voltage for I/O Pins
VDDIO
-0.3
4
V
Driver Supply Voltage
VDDH
-0.3
16
V
Operating Temperature
Top
-40
70
°C
Storage Temperature
Tst
-40
85
°C
Supply Voltage
Static Electricity
Note
Note 1, 2
Be sure that you are grounded when handling displays.
Note 1: All the above voltages are on the basis of “VSS=0V”.
Note 2: When this module is used beyond the above absolute maximum ratings, permanent
damage to the module may occur. Also for normal operations it’s desirable to use
this module under the conditions according to Section 3.2 “Electrical
Characteristics”. If this module is used beyond these conditions the module may
malfunction and the reliability could deteriorate.
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3.2 ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
VDD
2.6
2.8
3.3
V
Supply Voltage x I/O pins
VDDIO
1.6
2.8
3.3
V
Driver Supply Voltage
VDDH
13.5
14
14.5
V
Supply Voltage
Conditions
Note 1
High Level Input
VIH
0.8xVDD
-
VDD
V
Low Level Input
VIL
0
-
0.4
V
High Level Output
VOH
IOH = -0.4mA
VDD-0.4
-
-
V
Low Level Output
VOL
IOL = -0.1mA
-
-
0.4
V
Operating current for VDD
IDD
-
2.5
3.5
mA
10.5
13.2
Note 2
Operating current for
VDDH
IDDH
Note 3
-
14.9
18.6
Note 4
-
26.2
32.8
mA
Sleep Mode Current for
3
IDD, Sleep
5
uA
VDD
Sleep Mode Current for
1
IDDH, Sleep
5
uA
VDDH
Note 1 Brightness (Lbr) and Supply Voltage for Display (VDDH) are subject to the change of
the panel characteristics and the customer’s request.
Note 2 VDD = 2.8V, VDDH = 14V, 30% Display Area Turn On
Note 3 VDD =2.8V, VDDH = 14V, 50% Display Area Turn On
Note 4 VDD = 2.8V, VDDH = 14V, 100% Display Area Turn On
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3.3 INTERFACE PIN ASSIGNMENT
Mating Connector type: 35-pin, 0.5 mm pitch FFC/FPC. Type: AVX 04-6238-035-000-800
No.
Symbol
1
N.C.
2
VSDH
3
VDDH
4
VSSH
5
IREF
6
OSCA2
7
OSCA1
8
VDDIO
9
10
11
12
VSYNCO
VSYNC
HSYNC
DOTCLK
13
ENABLE
Function
Reserved Pin (Supporting Pin).
The supporting pins can reduce the influences from stresses
on the function pins. These pins must be connected to
external ground
Ground of OEL Panel
These are the ground pins for analog circuits. It must be
connected to external ground.
VSDH: Data Driver Ground
Power supply of OEL Panel
This is the most positive voltage supply pin of the chip.
It must be connected to external source.
Ground of OEL Panel
These are the ground pins for analog circuits. It must be
connected to external ground.
VSSH: Scan Driver Ground
Current reference for brightness Adjustment
This pin is segment (data) current reference pin. A 68KΏ
Resistor should be connected between this pin and VSS
Fine Adjustment for Oscillation
The frequency is controlled by external 5.1 kΏ Resistor
between OSCA1 and OSCA2. The oscillator signal is used for
system clock generation. When the external clock mode is
selected, OSCA1 is used external clock input.
Power supply for Interface logic level
This is a voltage supply pin. It should be match with MCU
interface voltage level. It must always be equal or lower than
VDD
RGB Mode functional Pins
VSYNCO : Vertical Sync
Output
VSYNC:
Vertical Sync
Input
HSYNC :
Horizontal Sync
Input
DOTCLK :
Dot Clock
Input
ENNABLE : Video Enable
Input
While using MCU interface, it must be connected to VDD.
14
CPU
15
PS
16
17
18
19
20
21
22
D17
D16
D15
D14
D13
D12
D11
Product No.
Select CPU type
Low: 80-Series High: 68-Series
Select Parallel/Serial Interface
Low: Serial High: Parallel
Host Data Input/Output Bus.
These pins are 9-bit bi-directional data bus to be connected
with MCU data bus.
PS
1
Description
8-bit Bus: D17 to D10
9-bit Bus: D17 to D9
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23
D10
24
D9
25
RS
26
CSB
27
RDB
28
WRB
29
RESETB
30
VSS
31
VDD
32
VSSH
33
VDDH
34
VSDH
35
NC
Product No.
D[17] SCL: Synchronous Clock Input
D[16] SDI: Serial Data Input
D[15] SDO: Serial Data Output
Selects Data/Command
Low: Command High: Parameter/data
Chip Select
Low: SEPS525 is selected and can be accessed
High: SEPS525 is not selected and cannot be accessed
0
Read or Read/Write enable
80-system bus interface: read strobe signal (active low )
68-system bus interface: bus enable strobe (active high)
When serial mode, fix it to VDD or VSS level
Write or Read/Write select
80-system bus interface: write strobe signal (active low)
68-system bus interface: read/write select
Low: write, High: read
When serial mode, fix it to VDD or VSS level
Power Reset for Controller and Driver
This pin is reset signal input. When the pin is low, initialization
of the chip is executed.
Ground of Logic Circuit
A reference for the logic pins. It must be connected to
external ground
Power supply for logic circuit
This is a voltage supply pin. It must be connected to external
source
Ground of OEL Panel
These are the ground pins for analog circuits. It must be
connected to external ground.
VSSH: Scan Driver Ground
Power supply of OEL Panel
This is the most positive voltage supply pin of the chip.
It must be connected to external source.
Ground of OEL Panel
These are the ground pins for analog circuits. It must be
connected to external ground.
VSDH: Data Driver Ground
Reserved Pin (Supporting Pin).
The supporting pins can reduce the influences from stresses
on the function pins. These pins must be connected to
external ground
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3.4 BLOCK DIAGRAM
Active Area 1.69”
160 x RGB x 128 Pixels
MCU Interface Selection:
Pins connected to MCU interface:
Pins connected to RGB interface:
C1, C3, C5
C2
R1:
Product No.
0.1μF
4.7μF
68kΩ
CPU, PS
D17~D9, RS, CSB, RDB, WRB, and RESETB
D17~D12, VSYNC, HSYNC, DOTCLK, and ENABLE
C4, C6
R2
DD-160128FC-2B
4.7μF/25V Tantalum Capacitor
5.1kΩ
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3.5 TIMING CHARACTERISTICS
3.5.1 AC CHARACTERISTICS
3.5.1.1 6800-Series MPU Parallel Interface Timing Characteristics
VDD = 2.8V, Ta = 25˚C
Min
Max
Unit
Port
Characteristics
Symbol
Write Timing
Address hold timing
tAH6
5
CSB
nS
Address setup timing
tAS6
5
RS
System cycle timing Write
tCYC6
100
“L” pulse width Write
tELW6
45
nS
E
“H” pulse width
tEHW6
45
Data setup timing
tDS6
40
nS
DB[17:0]
Data hold timing
tDH6
10
Read Timing
Address hold timing
tAH6
10
CSB
nS
Address setup timing
tAS6
10
RS
System cycle timing Write
tCYC6
200
nS
E
“L” pulse width Write
tELW6
90
“H” pulse width
tEHW6
90
Data setup timing (CL= 15pF)
tDS6
0
70
nS
DB[17:0]
Data hold timing (CL= 15pF)
tDH6
All the timing should be based on 10% and 90% of VDD.
Write Timing
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Read Timing
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3.5.1.2 8080-Series MPU Parallel Interface Timing Characteristics
Characteristics
Write Timing
Address hold timing
Address setup timing
System cycle timing Write
“L” pulse width Write
“H” pulse width
Data setup timing
Data hold timing
Read Timing
Address hold timing
Address setup timing
System cycle timing Write
“L” pulse width Write
“H” pulse width
Data setup timing (CL= 15pF)
Data hold timing (CL= 15pF)
Symbol
Min
tAH8
tAS8
tCYC8
tELW8
tEHW8
tDS8
tDH8
5
5
100
45
45
30
10
tAH8
tAS8
tCYC8
tELW8
tEHW8
tDS8
tDH8
10
10
200
90
90
0
Max
Unit
Port
-
nS
CSB
RS
-
nS
WRB
-
nS
DB[17:0]
-
nS
CSB
RS
-
nS
RDB
60
nS
DB[17:0]
* All the timing should be based on 10% and 90% of VDD
Write Timing
Read timing
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3.5.1.3 Serial Interface Timing Characteristics
VDD = 2.8V , Ta = 25˚C
ITEM
SYMBOL
MIN
Serial clock cycle SCL
“H” pulse width SCL
“L” pulse width
Data setup timing Data
Hold timing
CSB-SCL timing
CSB-hold timing
RSB-SCL timing
RSB-hold timing
tCYCS
tSHW
tSLW
tDSS
tDHS
tCSS
tCSH
TRSS
TRSH
100
45
45
5
5
5
5
5
5
MAX
UNIT
PORT
-
nS
SCL
-
nS
SDI
-
nS
CSB
-
nS
RS
* All the timing should be based on 10% and 90% of VDD
Serial Interface Timing
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3.5.1.4 RGB Interface Timing Characteristics:
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4 OPTICAL SPECIFICATION
4.1 OPTICAL CHARACTERISTICS
Characteristics
Symbol
Condition
Min
Typ
Max
Unit
Brightness(White)
Lbr
Note 1
60
75
-
cd/m2
0.26
0.30
0.34
(X)
C.I.E.(White)
(Y)
0.29
0.33
0.37
(X)
0.60
0.64
0.68
C.I.E.(Red)
-
C.I.E. 1931
(Y)
0.30
0.34
0.38
(X)
0.27
0.31
0.35
C.I.E.(Green)
-
C.I.E. 1931
(Y)
0.58
0.62
0.66
(X)
0.10
0.14
0.18
C.I.E.(Blue)
Dark Room
Contrast
-
C.I.E. 1931
-
C.I.E. 1931
(Y)
0.12
0.16
0.20
CR
-
>10000:1
-
-
>160
-
-
degree
Viewing Angle
Note 1: Brightness (Lbr) and Supply Voltage for Display (VDDH) are subject to the change
of the panel characteristics and the customer’s request.
Optical measurement with polarizer is taken at VDD, VDDIO = 2.8V, VDDH = 14V and the
software initial setting with section 5.4.1 Reference parameter table for normal operation
mode.
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5 FUNCTIONAL SPECIFICATION
5.1 COMMANDS
Please refer to the Technical Manual for the SEPS525
5.2 POWER UP/DOWN SEQUENCE
To protect panel and extend the panel lifetime, the driver IC power up/down routine should include a
delay period between high voltage and low voltage power sources during turn on/off. It gives the panel
enough time to complete the action of charge and discharge before/after the operation.
5.2.1 POWER UP SEQUENCE
VDD,, VDDIO ON VDDH ON Display On
1. Power up VDD & VDD IO
2. Send Display off command
3. Initialization
4. Clear Screen
5. Power up VDDH
6. Delay 100ms (When VDD & VDDIO is stable)
7. Send Display on command
VDDH
VDD
Ground
5.2.2 POWER DOWN SEQUENCE
1. Send Display off command
2. Power down VDDH
3. Delay 100ms
(When VDDH reach 0 and panel is
completely discharges)
4. Power down VDD & VDDIO
Display off VDDH off VDD,, VDDIO off
VDDH
VDD
Ground
1) Since an ESD protection circuit is connected between VDD, VDDIO and VDDH inside the driver IC, VDDH
becomes lower than VDD & VDDIO whenever VDD & VDDIO is ON and VDDH is OFF.
2) VDDH should be kept float (disable) when it is OFF.
3) Power Pins (VDD, VDDIO, VDDH) can never be pulled to ground under any circumstance.
4) VDD & VDDIO should not be power down before VDDH power down.
5.3 RESET CIRCUIT
When RESETB input is low, the chip is initialized with the following status:
1. Frame frequency: 90Hz
2. OSC: internal OSC
3. Internal OSC: ON
4. DDRAM write horizontal address: MX1 = 00h, MX2 = 9Fh
5. DDRAM write vertical address: MY1 = 00h, MY2 = 7Fh
6. Display data RAM write: HC = 1, VC = 1, HV = 0
7. RGB data swap: OFF
8. Row scan shift direction: G0, G1, … , G126, G127
9. Column data shift direction: S0, S1, … , S478, S479
10. Display ON/OFF: OFF
11. Panel display size: FX1 = 00h, FX2 = 9Fh, FY1 = 00h, FY2 = 7Fh
12. Display data RAM read column/row address: FAC = 00h, FAR = 00h
13. Pre-charge time(R/G/B): 0 clock
14. Pre-charge current(R/G/B): 0 uA 15. Driving current(R/G/B): 0 uA
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5.4 ACTUAL APPLICATION EXAMPLE
Power up Sequence
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If the noise is accidentally occurred at the displaying window during the operation, please
reset the display in order to recover the display function
Power down Sequence
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Entering Sleep mode
Exiting sleep mode
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6 PACKAGING AND LABELLING SPECIFICATION
DENSITRON
DD-160128FC-2B
TW YY MM
28 pieces per tray
15 trays per inner carton
4 inner cartons per outer
carton
Total 1680 displays
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7 QUALITY ASSURANCE SPECIFICATION
7.1 CONFORMITY
The performance, function and reliability of the shipped products conform to the Product
Specification.
7.2 DELIVERY ASSURANCE
7.2.1 DELIVERY INSPECTION STANDARDS
IPC-AA610, class 2 electronic assemblies standard
7.2.2 Zone definition
A Active
B Outside Active
7.2.3 Visual inspection
Test and measurement to be conducted under following conditions:
Temperature:
23±5℃
Humidity:
55±15%RH
Fluorescent lamp:
30 W
Distance between the Panel & Eyes of the Inspector:
≧30cm
Distance between the Panel & the lamp:
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≧50cm
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7.2.4 Standard of appearance inspection
Units: mm
Class
Item
Criteria
Minor
Critical
Packing &
Label
Major
Dimension
Outside & inside package Presence of product no., lot no., quantity
Product must not be mixed with others and quantity must not be different from
that indicated on the label
Product dimensions must be according to specification and drawing
Major
Electrical
Product electrical characteristics must be according to specification
Critical
OLED
Display
Black spot,
white spot,
dust
Minor
Missing lines, short circuits or wrong patterns on OLED display are not
allowed
Round type: as per following drawing
= (X+Y)/2
Acceptable quantity
Size
Zone A
Zone B
Any number