OLED DISPLAY MODULE
Product Specification
CUSTOMER
Standard
PRODUCT
NUMBER
DD-9664WE-3A
Date
CUSTOMER
APPROVAL
INTERNAL APPROVALS
Product Mgr
Doc. Control
Electr. Eng
Bazile
Peter
Bazile
Peter
Luo
Luo
Date: 21/12/09
Date: 21/12/09
Date: 21/12/09
Copyright ©2009 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
TABLE OF CONTENTS
1
MAIN FEATURES .......................................................................................................... 4
2
MECHANICAL SPECIFICATION............................................................................... 5
2.1
2.2
3
ELECTRICAL SPECIFICATION................................................................................. 7
3.1
3.2
3.3
3.4
3.5
4
CONFORMITY ....................................................................................................... 21
DELIVERY ASSURANCE ..................................................................................... 21
DEALING WITH CUSTOMER COMPLAINTS .................................................... 25
RELIABILITY SPECIFICATION .............................................................................. 26
8.1
8.2
8.3
9
LABELLING & MARKING.................................................................................... 21
QUALITY ASSURANCE SPECIFICATION ............................................................. 21
7.1
7.2
7.3
8
COMMANDS .......................................................................................................... 18
POWER UP/DOWN SEQUENCE........................................................................... 18
RESET CIRCUIT..................................................................................................... 18
ACTUAL APPLICATION EXAMPLE ................................................................... 19
PACKAGING AND LABELLING SPECIFICATION.............................................. 20
6.1
7
OPTICAL CHARACTERISTICS............................................................................ 17
FUNCTIONAL SPECIFICATION .............................................................................. 18
5.1
5.2
5.3
5.4
6
ABSOLUTE MAXIMUM RATINGS ....................................................................... 7
ELECTRICAL CHARACTERISTICS ...................................................................... 8
INTERFACE PIN ASSIGNMENT ............................................................................ 9
BLOCK DIAGRAM ................................................................................................ 11
AC CHARACTERISTICS ....................................................................................... 12
OPTICAL SPECIFICATION....................................................................................... 17
4.1
5
MECHANICAL CHARACTERISTICS .................................................................... 5
MECHANICAL DRAWING ..................................................................................... 6
RELIABILITY TESTS ............................................................................................ 26
LIFE TIME............................................................................................................... 26
FAILURE CHECK STANDARD ..................................................................................... 26
PRECAUTIONS............................................................................................................. 27
9.1
9.2
9.3
9.4
9.5
HANDLING................................................................................................................. 27
STORAGE ............................................................................................................... 28
DESIGNING ............................................................................................................ 28
DISPOSING ................................................................................................................. 28
OTHER ....................................................................................................................... 28
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REV. A
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REVISION RECORD
Rev.
Date
A
21 December
09
Product No.
Page
Chapt.
Comment
ECR no.
First Issue
DD-9664WE-3A
REV. A
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1 MAIN FEATURES
ITEM
CONTENTS
Display Format
96 x 64 Dots
Overall Dimensions(W*H*T)
24.90×22.95×1.40 mm
Active Area(W*H)
19.953 × 13.424 mm
Viewing Area(W*H)
21.953 x 15.424 mm
Display Mode
Passive Matrix
Display Colour
White Colour
Driving Method
1 / 64 duty
Driver IC
SSD1305
Operating temperature
-30Ԩ ~ +70Ԩ
Storage temperature
-40Ԩ ~ +80Ԩ
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2 MECHANICAL SPECIFICATION
2.1 MECHANICAL CHARACTERISTICS
ITEM
CHARACTERISTIC
UNIT
96 x 64
Dots
24.90×22.95×1.40
mm
Viewing Area
21.953 x 15.424
mm
Active Area
19.953 × 13.424
mm
Dot Size
0.193 × 0.194
mm
Dot Pitch
0.208 × 0.21
mm
1.65
g
Display Format
Overall Dimensions
Weight
IC Controller/Driver
Product No.
SSD1305
DD-9664WE-3A
REV. A
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2.2 MECHANICAL DRAWING
Product No.
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3 ELECTRICAL SPECIFICATION
3.1 ABSOLUTE MAXIMUM RATINGS
VSS = 0 V, Ta = 25 °C
Item
Symbol
Min
Max
Unit
Note
VDD
-0.3
4
V
Note 1, 2
Supply Voltage for I/O Pins
VDDIO
-0.3
VDD
+0.5
V
Note 1, 2
Supply Voltage for Display
VCC
0
15
V
Note 1, 2
Operating Temperature
Top
-30
70
°C
Storage Temperature
Tstg
-40
80
°C
Supply Voltage for Logic
Note 1: All the above voltages are on the basis of “VSS=0V”.
Note 2: When this module is used beyond above absolute maximum ratings, permanent
breakage of the module may occur. Also for normal operations it’s desirable to use
this module under the conditions according to Section 3.2 “Electrical Characteristics”
and section 4 “optical characteristic. If this module is used beyond these conditions
the malfunction of the module can occur and the reliability of the module may
deteriorate.
Copyright ©2009 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
3.2 ELECTRICAL CHARACTERISTICS
3.2.1 DC Characteristics
Characteristics
Symbol
Supply Voltage for Logic
VDD
Supply Voltage for
Display
VCC
Supply Voltage for I/O
Pins
VIH
Low Level Input
VIL
High Level Output
VOH
Low Level Output
VOL
Operating Current for
VDD
IDD
Sleep Mode Current for
VCI
Sleep Mode Current for
VCC
Min
Typ
Max
Unit
2.4
2.8
3.5
V
10.5
11.0
11.5
V
1.6
1.8
VDD
V
0.8xVDDIO
-
VDDIO
V
0
-
0.2xVDDIO
V
0.9xVDDIO
-
VDDIO
V
0
-
0.1xVDDIO
V
-
180
300
µA
180
300
µA
Note 3
VDDIO
High Level Input
Operating Current for
VCC
Conditions
Iout=100μA,3.3
MHz
Iout=100μA,3.3
MHz
Iout=100μA,3.3
MHz
Iout=100μA,3.3
MHz
Note 4
Note 5
Note 4
-
5.3
6.7
mA
Note 5
-
8.0
10.0
mA
IDD, SLEEP
-
-
1
5
µA
ICC, SLEEP
-
-
1
5
µA
ICC
Note 3: Brightness (Lbr) and Supply Voltage for Display (Vcc) are subject to the change of
the panel characteristics and customer’s request.
Note 4 VDD= 2.8V, VCC = 11.0V, 50% Display area turned on.
Note 5 VDD = 2.8V, VCC = 11.0V, 100% Display area turned on
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3.3 INTERFACE PIN ASSIGNMENT
No.
Symbol
I/O
1
N.C. (GND)
-
Reserved Pin (Supporting Pin)
The supporting pin can reduce the influence from stress on the
function pins. This pin must be connected to external ground.
2
VCC
P
Power Supply for OEL Panel
This is the most positive voltage supply pin of the chip. It must
be supplied externally.
3
VSS
P
4
VDD
P
5
6
VDDIO
P
Function
Ground of Logic Circuit
This is a ground pin. It acts as a reference for the logic pins. It
must be connected to external ground.
Power Supply for Core Logic Operation
This is a voltage supply pin. It must be connected to
external source
Power Supply for Interface Logic Level
This is a voltage supply pin. It should be match with MCU
interface voltage level. VDDIO must always be equal or lower
than VDD.
I
Communicating Protocol Select
These pins are MCU interface selection input. See the
following table:
BS1
BS2
I2C
1
0
Serial
0
0
68XX-parallel
0
1
80XX-parallel
1
1
BS1
7
BS2
8
CS#
I
Chip Select
This pin is the chip select input. The chip is enabled for MCU
communication only when CS# is pulled low.
9
RES#
I
Power Reset for Controller and Driver
This pin is reset signal input. When the pin is low, initialization
of the chip is executed.
10
D/C#
I
Data/Command Control
This pin is Data/Command control pin. When the pin is pulled
high, the input at D7~D0 is treated as display data.
When the pin is pulled low, the input at D7~D0 will be
transferred to the command register. For detail
relationship to MCU interface signals, please refer to the
Timing Characteristics Diagrams.
When the pin is pulled high and serial interface mode is selected,
the data at SDIN is treated as data. When it is pulled low, the data
at SDIN will be transferred to the command register. In I2C
mode, this pin acts as SA0 for slave address selection.
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No.
Symbol
I/O
Function
Read/Write Select or Write
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as
Read/Write (R/W#) selection input. Pull this pin to
“High” for read mode and pull it to “Low” for write mode.
11
R/W#
I
When 80XX interface mode is selected, this pin will be the Write
(WR#) input. Data write operation is initiated when this pin is
pulled low and the CS# is pulled low.
When serial interface is selected, this pin must be connected
VSS.
Read/Write Enable or Read
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as the
Enable (E) signal. Read/write operation is initiated when this pin
is pulled high and the CS# is pulled low.
12
E/RD#
13~20
D0~D7
I
I/O
21
IREF
I
22
VCOMH
O
23
VCC
P
24
VLSS
25
N.C. (GND)
Product No.
-
DD-9664WE-3A
When connecting to an 80XX-microprocessor, this pin receives
the Read (RD#) signal. Data read operation is initiated when this
pin is pulled low and CS# is pulled low.
When serial interface is selected, this pin must be connected to
VSS.
Host Data Input/output Bus
These pins are 8-bit bi-directional data bus to be connected to the
microprocessor’s data bus. When serial mode is selected, D1 will
be the serial data input SDIN and D0 will be the serial clock
input SCLK.
When I2C mode is selected, D2 & D1 should be tied together and
serve as SDAout & SDAin in application and D0 is the serial
clock input SCL.
Current Reference for Brightness Adjustment
This pin is segment current reference pin. A resistor should be
connected between this pin and VSS. Set the current lower than
10.0μA.
Voltage Output High Level for COM Signal
This pin is the input pin for the voltage output high level for
COM signals. A capacitor should be connected between this pin
and VSS.
Power Supply for OEL Panel
This is the most positive voltage supply pin of the chip. It must
be supplied externally.
Ground of Analogue Circuit
This is an analogue ground pin. It should be connected to VSS
externally.
Reserved Pin (Supporting Pin)
The supporting pin can reduce the influence from stress on the
function pins. This pin must be connected to external ground.
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3.4 BLOCK DIAGRAM
MCU Interface Selection:
Pins connected to MCU interface:
BS1 and BS2
CS#, RES#, D/C#, R/W#, E/RD#, and
D0~D7
C1, C3, C5:
C2, C4:
C6:
C7:
R1:
0.1μF
4.7μF
10μF
4.7μF / 25V Tantalum Capacitor
910kΩ, R1 = (Voltage at IREF – VSS) / IREF
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3.5 AC CHARACTERISTICS
3.5.1 68XX-Series MPU Parallel Interface Timing Characteristics
Characteristics
Symbol
Min
Max
Unit
Clock Cycle Time
tcycle
300
-
ns
Address Setup Time
tAS
0
-
ns
Address Hold Time
tAH
0
-
ns
Write Data Setup Time
tDSW
40
-
ns
Write Data Hold Time
tDHW
7
-
ns
Read Data Hold Time
tDHR
20
-
ns
Output Disable Time
tOH
-
70
ns
Access Time
tACC
-
140
ns
Chip Select Low Pulse Width (Read)
Chip Select Low Pulse Width (Write)
PWCSL
120
60
-
ns
Chip Select High Pulse Width (Read)
Chip Select High Pulse Width (Write)
PWCSH
60
60
-
ns
Rise Time
tR
-
15
ns
Fall Time
tF
-
15
ns
(VDD ~ VSS = 2.4 to 3.5 V, VDDIO =VDD, Ta = 25°C)
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3.5.2 8080-Series MPU Parallel Interface Timing Characteristics
Characteristics
Symbol
Min
Max
Unit
Clock Cycle Time
tcycle
300
-
ns
Address Setup Time
tAS
10
-
ns
Address Hold Time
tAH
0
-
ns
Write Data Setup Time
tDSW
40
-
ns
Write Data Hold Time
tDHW
7
-
ns
Read Data Hold Time
tDHR
20
-
ns
Output Disable Time
tOH
-
70
ns
Access Time
tACC
-
140
ns
Read Low Time
tPWLR
120
-
ns
Write Low Time
tPWLW
60
-
ns
Read High Time
tPWHR
60
-
ns
Write High Time
tPWHW
60
-
ns
Chip Select Setup Time
tCS
0
-
ns
Chip Select Hold Time to Read Signal
tCSH
0
-
ns
Chip Select Hold Time
tCSF
20
-
ns
Rise Time
tR
-
15
ns
Fall Time
tF
-
15
ns
(VDD ~ VSS = 2.4 to 3.5 V, VDDIO =VDD, Ta = 25°C)
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3.5.3 Serial Interface Timing Characteristics
Characteristics
Symbol
Min
Max
Unit
Clock Cycle Time
tcycle
250
-
ns
Address Setup Time
tAS
150
-
ns
Address Hold Time
tAH
150
-
ns
Chip Select Setup Time
tCSS
120
-
ns
Chip Select Hold Time
tCSH
60
-
ns
Write Data Setup Time
tDSW
50
-
ns
Write Data Hold Time
tDHW
15
-
ns
Clock Low Time
tCLKL
100
-
ns
Clock High Time
tCLKH
100
Rise Time
tR
-
15
ns
Fall Time
tF
-
15
ns
ns
(VDD ~ VSS = 2.4 to 3.5 V, VDDIO =VDD, Ta = 25°C)
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3.5.4 I2C Timing Characteristics
Characteristics
Clock Cycle Time
Start Condition Hold Time
Data Hold Time (for “SDAOUT” Pin)
Data Hold Time (for “SDAIN” Pin)
Data Setup Time
Symbol
Min
Max
Unit
tcycle
2.5
-
us
tHSTART
0.6
-
us
-
us
tHD
0
300
tSD
100
-
us
Start Condition Setup Time
(Only relevant for a repeated Start
condition)
tSSTART
0.6
-
us
Stop Condition Setup Time
tSSTOP
0.6
-
us
Rise Time for Data and Clock Pin
tR
-
300
ns
Fall Time for Data and Clock Pin
tF
-
300
ns
Idle Time before a New Transmission
tIDLE
can Start
(VDD ~ VSS = 2.4 to 3.5 V, VDDIO =VDD, Ta = 25°C)
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4 OPTICAL SPECIFICATION
4.1 OPTICAL CHARACTERISTICS
Characteristics
Symbol
Condition
Min
Typ
Max
Unit
Brightness
Lbr
With Polarizer
(Note 3)
60
80
-
cd/m2
0.28
0.32
0.36
(X)
C.I.E.(White)
Dark Room
Contrast
Without Polarizer
-
(Y)
0.29
0.33
0.37
CR
-
>2000:1
-
-
>160
-
-
degree
Viewing Angle
Optical measurement taken at VDD = 2.8V, VCC = 11.0V
Software configuration follows Section 5.4 Initialization.
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5 FUNCTIONAL SPECIFICATION
5.1 COMMANDS
Please refer to the Technical Manual for the SSD1305
5.2 POWER UP/DOWN SEQUENCE
To protect panel and extend the panel lifetime, the driver IC power up/down routine should
include a delay period between high voltage and low voltage power sources during turn on/off.
It gives the panel enough time to complete the action of charge and discharge before/after the
operation.
5.2.1 POWER UP SEQUENCE
VDD ON VCC ON Display On
1. Power up VDD /VDDIO
2. Send Display off command
3. Initialization
4. Clear Screen
5. Power up VCC
6. Delay 100ms
(When VDD /VDDIO is stable)
7. Send Display on command
VCC
VDD/VDDIO
VSS/Ground
5.2.2 POWER DOWN SEQUENCE
1. Send Display off command
2. Power down VCC
3. Delay 100ms
(When VCC is reach 0 and panel is
completely discharges)
4. Power down VDD /VDDIO
Display off VCC off VDD off
VCC
VDD /VDDIO
VSS/Ground
5.3 RESET CIRCUIT
When RES# input is low, the chip is initialized with the following status:
1. Display is OFF
2. 132×64 Display Mode
3. Normal segment and display data column and row address mapping (SEG0 mapped
to column address 00h and COM0 mapped to row address 00h)
4. Shift register data clear in serial interface
5. Display start line is set at display RAM address 0
6. Column address counter is set at 0
7. Normal scan direction of the COM outputs
8. Contrast control register is set at 80h
9. Normal display mode (Equivalent to A4h command)
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5.4 ACTUAL APPLICATION EXAMPLE
Command usage and explanation of an actual example
If the noise is accidentally occurred at the displaying window during the operation, please
reset the display in order to recover the display function.
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6 PACKAGING AND LABELLING SPECIFICATION
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6.1 LABELLING & MARKING
DENSITRON
DD-9664WE-3A
TW YY MM
7 QUALITY ASSURANCE SPECIFICATION
7.1 CONFORMITY
The performance, function and reliability of the shipped products conform to the Product
Specification.
7.2 DELIVERY ASSURANCE
7.2.1 DELIVERY INSPECTION STANDARDS
IPC-AA610, class 2 electronic assembly’s standard
7.2.2 Zone definition
A Active
B Outside Active
7.2.3 Visual inspection
Test and measurement to be conducted under following conditions
Temperature:
23±5
Humidity:
55±15%RH
Fluorescent lamp:
30 W
Distance between the Panel & Eyes of the Inspector:
30cm
Distance between the Panel & the lamp:
50cm
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7.2.4 Standard of appearance inspection
Units: mm
Class
Item
Criteria
Minor
Critical
Packing &
Label
Major
Dimension
Outside & inside package Presence of product no., lot no., quantity
Product must not be mixed with others and quantity must not be different from
that indicated on the label
Product dimensions must be according to specification and drawing
Major
Electrical
Product electrical characteristics must be according to specification
Critical
OLED
Display
Black spot,
white spot,
dust
Minor
Missing lines, short circuits or wrong patterns on OLED display are not
allowed
Round type: as per following drawing
= (X+Y)/2
Acceptable quantity
Size
Zone A
Zone B
Any number