FEMDRW008G-88A39

7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 5:34 5-26 1 0 21- 1B D7D 6 4 990B ® .D s r se u 受控 Industrial eMMC Datasheet A-00043 5:34 D1B 1 B46D7 6 FEMDRW008G-88A39 2 D990 05 1 . Version s 202 1.1 er s u C A 受控 15:34 05-26 2021- AC 4E B 1 D LONGSYS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. ELECTRONICS ser u and specifications herein for reference purposes only. All information discussed are discussed herein is provided on an “AS IS” Products trademarks without warranties of trademarks and registered belong to their respective names, 受控 owners. any kind. All brand basis, This document and all information discussed herein remain the sole and exclusive property of Longsys Electronics. No license of any trademark mask right intellectual or any other property is granted by one party to the other party under this work, patent, copyright, document, by implication, or other-wise. estoppel information about 4 nearest Longsys office. contact 3your Longsys products, : or additional For updates 5 1 26reserved. Longsys Electronics 5 2020 Shenzhen All rights Co.,1Ltd. 0 rs 2 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 1 A-00043 4 3 : 26 15 -05- FORESEE 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 History Revision 5:34 Editor 5-Rev.26 1 Date Changes 0 21- 1.0 2020/07/06 Document Create. MSG 1B 1.1 2020/07/20 the PN code. MSG D7D Update 6 4 990B .D s r se u 受控 5:34 D1B 1 B46D7 6 2 D990 05 1 . s 202 er s u C A 受控 15:34 05-26 2021- AC 4E B 1 D r use 受控 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 2 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 CONTENTS 5:34 1 2 6 Revision 2 History ............................................................................................................................................................ 05 21- CONTENTS .................................................................................................................................................................... 3 1B 1 INTRODUCTION D57D 6 ..................................................................................................................................................... 4 990B LIST ...................................................................................................................................................... 2 PRODUCT 5 .D s r se u 3 KEY FEATURES ...................................................................................................................................................... 5 PACKAGE 6 CONFIGURATIONS 4 受控 .............................................................................................................................. Pin Configuration .................................................................................................................................... 6 4.1 Ball 8 Dimension ....................................................................................................................................... 4.2 Package 9 D1B 34 SPECIFICATIONS................................................................................................................................. 5 PRODUCT : 5 1 B46D7 6 2 5.1 9 Write/Read D990 05 Performance ............................................................................................................................... 1 2 . 0 users 9 5.22 Power Consumption ....................................................................................................................................... AC Power 5.2.1 Active Consumption During Operation ...................................................................................... 9 控 受 5.2.2 Low power mode (stand-by) ................................................................................................................ 10 5.2.3 Low power mode (sleep) ...................................................................................................................... 10 15:34 6 Technical 5-26 11 Notes................................................................................................................................................... 11 1-0 ................................................................................................................................. 6.1 Functional Description 2 0 2 6.2 Interface timing mode .................................................................................................................................. 12 C A E 4 Architecture 12 ..................................................................................................................................... D1B 6.3 System er 6.4 Partition Management ................................................................................................................................. 13 s u Sleep 6.5 Automatic Mode................................................................................................................................. 15 控 受 6.6 Sleep (CMD5) ................................................................................................................................................ 16 6.7 H/W Reset operation.................................................................................................................................... 16 5:34 6.8 Initial Data Acceleration(IDA) 16 ...................................................................................................................... 1 26 High-speed mode selection ......................................................................................................................... 17 6.9 5 0 21 6.10 0 Bus width selection .................................................................................................................................. 17 rs 2 se u C 6.11 Partition 17 EAConfiguration ............................................................................................................................. 4 B 1 D 46D7 受控 3 BEverything for Memory 0 9 Copyright 9 Longsys / 33 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 控 6.12 Reference 18 ............................................................................................................................. Schematics 受 REGISTER VALUE 19 ................................................................................................................................................ 7 4 19 3 7.1 CID5register : ................................................................................................................................................... 1 6 57.2 2 CSD register .................................................................................................................................................. 0 20 21- register ................................................................................................................................. Extended 22 CSD 7.3 1B D OCR 7 7.4 D Register................................................................................................................................................. 4630 B 0 D99 . 7.5 Field firmware update(FFU) ......................................................................................................................... 31 s r e s - CMD sequence u 7.5.1 Longsys eMMC (FEMDRW008G-88A39) Field F/W update flow .......................... 31 SUPPORTED_MODE 受控 Only) ................................................................................................ 7.5.2 (Read 31 [493] FFU_FEATURE 32 7.5.3 [492] (Read Only) ......................................................................................................... 32 FFU_ARG 7.5.4 [490-487] (Read Only) .......................................................................................................... D1B 34 7.5.5 : 5 1 FW_CONFIG[169] (R/W) ........................................................................................................................ B46D327 6 2 D990 05 7.5.6 1-FFU_STATUS [26] (R/W/E_P) ............................................................................................................... 32 . s 202 er 33 s 7.5.7 OPERATION_CODES_TIMEOUT[491](Read Only) ............................................................................... u C A 33 (W/E_P) 7.5.8 MODE_OPERATION_CODES[29] ............................................................................................ 受控 Health Report 7.6 33 ............................................................................................................................. S.M.A.R.T. 15:34 05-26 2021- AC 4E B 1 D r use 受控 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 4 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 1 INTRODUCTION 5:34 in the 1 is designed eMMC The FORESEE 6 FORESEE eMMC an embedded storage solution BGA package. 2 the interface 05 controller. wear and of NAND flash eMMC The controller could manage protocols, 21- consists 1B bad management and ECC. block leveling, D eMMC FORESEE cost, high competitive high quality and low power consumption, and6D7 at a performance has 4 standard 990B JEDEC is compatible eMMC 5.1 specifications. eMMC with .D s r se u LIST 2 PRODUCT 受控 1. Product List Table Density Capacity Part Number Package Size(mm) Package Type 1B 34 NAND Flash Type User : 5 1 7.28GB 11.5 8GB FEMDRW008G-88A39 64Gb x1 13.0 1.0 D7D 153BFBGA 6 6 2 4 D990 05 1 . s 202 er s u C A 3 KEY FEATURES 受控  eMMC5.1 compatibility specification - Backward compatible eMMC4.41/4.5/5.0 firmware backup mechanism 34  Unique to : 5 1  Global-wear-leveling 5-26 0  Bus mode  Supported features. bus2width: HS200 - Data 0211 bit (default), 4 bits, 8 bits HS400, up to A-CData transfer rate: 400MB/s (HS400) - Partitioning, RPMB 0~200MHz 4E - MMC B I/F Clock frequency: - Boot feature, boot partition 1 D - HW Reset/SW Reset ser - Discard,  Operating voltage range Trim, Erase, Sanitize u operations, - V (NAND): - Background ~ 3.6V HPI 2.7 reliable write 受控 ~ 1.95V 2.7 ~ 3.6V - V (Controller): - Enhanced / 1.7 - S.M.A.R.T. Health Report  Temperature FFU - - Sleep / awake 5:34 ~ +85℃ -40℃ Operation: 1  Others 26 without - Storage 5 operation: -40℃ ~ +85℃ 0 - Compliance with the RoHS Directive s 21  Sudden-Power-Loss 0 2 safeguard er s u AC engine E  Hardware ECC 4 B 受控 46D7D1 B 5 / 33 Longsys Copyright 990 Everything for Memory A-00043 34 : 26 15 -05- CC CCQ 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 CONFIGURATIONS 4 PACKAGE 5:34 5-26 1 04.1 Ball Pin Configuration 21- 1B D7D 6 4 990B .D s r se u 受控 5:34 D1B 1 B46D7 6 2 D990 05 1 . s 202 er s u C A 受控 15:34 05-26 2021- Figure 1. Ball Array (Top View through package) AC 4E B 1 D Table Ball Array Description Pin2. Pin Name Description No. ser u A3 DAT0 These Only控 A4 DAT1 DAT signals data signal. are bidirectional The operate in push-pull mode. 受 the device or the A5 DAT2 default, host is driving these signals time. By after power up or reset, only DAT0 is used for data at a transfer. A wider data bus can be configured for data transfer, using either DAT0-DAT3 or DAT0-DAT7, B2 DAT3 by the eMMC host controller. The eMMC device includes internal pull-ups for data lines DAT1-DAT7. 34the device disconnects the after entering of lines DAT1, DAT4 internal pull ups : B3 5 Immediately the 4-bit mode, 1 disconnects 26 immediately after DAT2, B4 DAT5 and DAT3. Correspondingly, entering to the 8-bit mode the device 5 0 1- of lines DAT1–DAT7 rs the internal 2pull-ups B5 DAT6 0 2 se u DAT7AC B6 E 4 B K5 D1 RSTN Hardware Reset Input 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 6 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 Pin No. Pin Name Description 受控 C6 VCCQ 4 5:VCCQ 3 M4 VCCQ is the supply line for host interface, two power mode: High power mode:2.7V~3.6V; have power VCCQ 5-2N46 1 Lower power mode:1.7V~1.95V. 0 VCCQ 21- P3 P5 VCCQ D1B 7 D VCC E6 90B46 VCC D9 . F5 s r voltage range flash eis:2.7V~3.6V. line VCC is the power supply for internal memory, its power s u J10 VCC K9 VCC 受控 internal power node, not the power supply. Connect 1uF capacitor VDDi to ground. C2 VDDi VDDi is and This signal is a bidirectional command channel used for device initialization command transfer. the host. responses Commands are sent from the host to the device, and are sent from the device to 4 has 2 operation modes: 1B M5 CMD The15CMD open :3Signal drain for initialization, and push-pull for command B46D7D 6 transfer. 2 990 mode. Data 05 Data Strobe signal. Newly assigned pin for HS400 Strobe is generated from to host. 1 D eMMC . s 2H502 DS In HS400 mode, r e read data and CRC response are synchronized with Data Strobe. us a of this Each AC cycle signal directs one-bit transfer on the command and either a one-bit (1x) or a two 控 M6 CLK all the bits transfer (2x) on data lines. 受 J5 VSS 4 VSS A6 3 VSS 6 15: C4 -2 5 0 E7 VSS 1 02 2VSS G5 AC E 4 H10 VSS Ground connections D1B K8 VSS er N2 VSS s u VSS 受控 N5 P4 VSS P6 VSS 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 7 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 Dimension 4.2 Package 5:34 5-26 1 0 21- 1B D7D 6 4 990B .D s r se u 受控 5:34 D1B 1 B46D7 6 2 D990 05 1 . s 202 er s u C A Figure 2. Package Dimension 受控 15:34 05-26 2021- AC 4E B 1 D r use 受控 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 8 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 SPECIFICATIONS 5 PRODUCT 5:34 5-26 1 05.1 Write/Read Performance 21- 1B Performance Table 3. Write/Read D7D 6 Part 4 Read 0B Number 9 Write 9 D . Up to 105 MB/s Up to s 230 MB/s r FEMDRW008G-88A39 e s u Note: 受控 Bus width x8, 200MHz DDR, 512KB data transfer, w/o file system overhead, measured on internal board. Test Condition: Test tool: uBOOT O/S) (Without Chunk size: 1MB of LBA. D1B 34 Test area: 100MB/ Full-range : 5 1 B46D7 6 2 D990 05 1 2 . 0 s 2 5.2 Power Consumption er s u C A Active Power Consumption During Operation 受控 Table 4. Active Power During Operation Consumption I I Part Number 15:34 5-26 100mA 130mA FEMDRW008G-88A39 1-0 202 Note:AC E 4 Measurement configuration =x8 @200MHz DDR, conditions: Bus 23 . D1B Power VCCQ = VCC = 3.3V & 1.8V. over current er The measurement for max RMS is the average RMS current consumption a period of 100ms. s u 受控 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 9 A-00043 4 3 : 26 15 -05- CC CCQ 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 Low power (stand-by) 受控 mode 5. Low power mode (stand-by) Table 4 I I 3 Number 5:Part 50uA 120uA 5-26 1FEMDRW008G-88A39 0 21- 1B Note: D7D 6 4 Power Measurement conditions: Bus configuration =x8 @200MHz DDR, 23 . 990B Standby: NAND Flash VCC & Controller VCCQ power supply is switched on. .D s r The se RMS current is the average RMS current consumption over a period for max of 100ms. measurement u 受控 Low power mode (sleep) Table 6. Low power (sleep) mode Part Number I I 5:34 D1B 0 120uA 46D7 6 1 2 FEMDRW008G-88A39 990B 5 0 21 rs.D 0 2 e Note: us Bus configuration AC Power Measurement conditions: =x8 @200MHz DDR, 23 . on) 控 Flash Sleep: NAND VCC power supply is switched off (Controller VCCQ 受 measurement RMS current is average RMS over of 100ms. for max a period The current consumption the 4 3 6 15: -2 5 0 1 202 AC E 4 D1B er s u 受控 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 10 A-00043 4 3 : 26 15 -05- CC CCQ CC CCQ 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 Notes 6 Technical 5:34 5-26 1 06.1 Functional Description 21- L2P algorithm to Physical) eMMC with powerful (Logical NAND Flash management provides unique D1B FORESEE D7 6 4 functions: 90B 9 D s. independence r ⚫ Host e of operating NAND flash s from details u The eMMC technologies such as data storage and Flash includes Controller already management defect 控Host can be free retrieval, and diagnostics, from considering and power management. 受 handling NAND Flash data operating. about ECC ⚫ Internal defect in NAND flash to correct corruption 5:34code (ECC) function, which data The hardware error correction can prevent data corruption is D1B 1 B46D7 6 controller. 2 included in the eMMC D990 05 1 . 02 s 2 er ⚫ Sudden-Power-Loss Safeguard s u C Safeguard is A named To prevent data loss, Sudden-Power-Loss added in the eMMC. In a mechanism from cycling. of 控after work properly sudden power-failure, eMMC would power the 受 the case 34 Global-wear-leveling ⚫ Wear Leveling equips To achieve this eMMC 5: endurance, algorithm. 6and1device best stability the Global the 2 area, such as It ensures that not only the frequently accessed would be 5-normal area, but also FAT, 0 1 2 erased evenly. programmed 20and AC E 4 ⚫ IDA (Initial Data Acceleration) D1B The eMMC prevents the pre-burned data from data-loss with IDA, in case of our customer had pre-burned being er data to eMMC, before the eMMC SMT. s u 受控 ⚫ Cache the data written performance with Cache, with which our customer would get more enhanced The eMMC endurance and reliability. 5:34 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 11 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 timing mode 6.2 Interface 4 1.8V 3 : FORESEE eMMC support supports high speed DDR interface timing mode up to 400MB/s at 200MHz with 5 1 6 I/O supply. 2 05 21- 1B : DEVICE_TYPE Type Value [196]) (EXT_CSD register D Table 7. Device SupportabilityB46D7 Bit Device Type eMMC 990 HS400 D 7 Dual Data Rate at 200 MHz – 1.2 V I/O Not support . rs Support 6 e Rate eMMC s HS400 Dual Data at 200 MHz – 1.8 V I/O u 5 Rate eMMC Single Data at 200 MHz - 1.2 V I/O Not support HS200 4 MHz - 1.8受V 控 HS200 Rate eMMC at 200 I/O Single Data Support 3 High-Speed Dual Data Rate eMMC at 52 MHz - 1.2 V I/O Not support at 52 MHz - 1.8 V or 3.3 V Dual Data Rate eMMC I/O Support 21 High-Speed device voltage(s) High-Speed Support D1B 34 eMMC at 52 MHz - at rated 0 : 5 eMMC at 26 MHz device Support 1 voltage(s) - at rated D7 6 High-Speed 6 2 4 D990B 05 1 sers. 202 u Architecture AC 6.3 System 控 by The can be operated in 1-bit, 4-bit, or 8-bit mode. NAND 受 flash memory is managed a controller eMMC integration easy manages The inside, ECC, wear and bad block management. eMMC provides leveling which 4 hassles process with the host that all flash management are invisible to the host. 3 6 15: -2 5 0 1 202 AC E 4 D1B er s u 受控 5:34 1 26 5 0 Figure 3. eMMC System Architecture rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 12 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 Management 6.4 Partition 4 3 : The embedded device offers also the possibility of configuring by the host additional split local memory 5 logical 1with independent starting different 6 partitions addressable space from address 0x00000000 for usage 2 be changed is 4096 05 as Default size of each Boot Area Partition KB and can by Vendor Command 21- models. * 1B size of Boot partition is calculated as (128KB BOOT_SIZE_MULTI) The size of Boot Area area 128KB. multiple 1 Partition and 2 cannot be set independently is set as same value Boot area partition which is enhanced D7D and 6 4 area scan is classified 990B memory Therefore, partition. follows: as block .D s r se u ⚫ Factory configuration supplies boot partitions. ⚫ The RPMB partition is 4MB. 受控 ⚫ The host is free to configure one segment in the User Data Area to be implemented as enhanced storage location and size in terms of Write Protect attributes Groups. media, and its starting The of this to specify (one-time User Data Area can be programmed during Enhanced only once the device life-cycle 5:34 D1B programmable). 1 7 D 6 6 2 ⚫ 4 Up to four General be configured to store user data or sensitive 0 data, B or for 5 Purpose Area Partitions can 0 9 9 s.Dgroup. Size 1 of is a other The size of these partitions multiple the write protect and 202 host usage models. r e us Each (one-time life-cycle attributes can be programmed in device programmable). General once of the AC technological with enhanced Purpose Partitions be implemented features. can Area 控 受 4 3 6 15: -2 5 0 1 202 AC E 4 D1B er s u 受控 4 area configuration 5user 3data : Figure 4 Partitions and 1 26 5 0 rs 21 0 2 se u AC E 4 B 1 D 控 7 46D 受 B 0 9 / 33 Copyright 9 Everything for Memory Longsys 13 A-00043 4 3 : 26 15 -05- 7D D 6 4 B D990 Industrial eMMC Datasheet . s user FEMDRW008G-88A39 受控 In boot mode, the master can read data from slave (device) by keeping CMD line low the boot or operation sending CMD0 argument + 0xFFFFFFFA, before issuing The be read from either boot area with4 data can CMD1. 3 : or user area 5 depending on register setting. 1 6 Table 2 05 8. Boot ack, boot data and initialization Time 21- Timing Factor Value 1B D7D ACK Time < 50 ms 6 Boot 4 990B Boot Data Time < 1 s .D s r e s u Initialization Time