FM86C0

富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Features switch for antenna TRX application. ⚫ The FM86C0 is compatible with MIPI control, which Excellent insertion loss - 0.80dB Insertion Loss at 2.7GHz P0.1dB = 34dBm Multi-Band operation 700MHz to 3000MHz RFFE serial control interface Compact 2.5mm x 2.5mm in QFN-20 package No DC blocking capacitors required (unless external DC is applied to the RF ports) ⚫ ⚫ ⚫ ⚫ ⚫ Applications ⚫ is a key requirement for many cellular transceivers. This part is packaged in a compact 2.5mm x 2.5mm, 20-pin, QFN package which allows for a small solution size with no need for external DC blocking capacitors (when no external DC is applied to the device ports). 2G/3G/4G antenna TRX Application Cellular modems and USB Devices ⚫ Functional Block Diagram and Pin Description RF12 RF2 RF3 RF4 ANT 6 5 4 3 2 1 RF1 RF2 RF3 RF5 RF4 RF6 RF7 RF8 RF9 RF10 RF11 RF12 VDD 7 VIO 8 VDD VIO 20 GND 19 RF9 Ground Paddle 9 18 RF10 10 17 GND 12 13 14 15 16 RF8 RF7 RF6 RF5 ANT 11 RF1 SCLK RF11 SDATA SCLK SDATA Figure 1 Figure NC The FM86C0 is a low loss, high isolation SP12T 1. Functional Block and Pin Diagram Figure 1 Functional Block Diagram and Pin Configuration Version 1.0 Page 1 Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Application Circuit SCLK 10 VDD Ground Paddle 8 7 6 18 RF10 RF10 19 RF9 RF9 20 GND 5 4 3 2 1 ANT RF4 RF3 RF2 RF12 NC VDD VIO SDATA SCLK 16 17 GND SDATA 9 VIO RF5 15 RF5 14 RF6 13 RF6 RF7 12 RF7 RF8 11 RF8 C4 DN1 RF1 RF11 C3 DN1 RF1 RF11 C2 C1 100pF 33nF ANT RF4 RF3 RF2 RF12 Figure 2 Evaluation Board Schematic Table 1. Pin Description Pin No. Name Description Pin No. Name Description 1 ANT Antenna port 11 RF11 RF port11 2 RF4 RF port4 12 RF1 RF port1 3 RF3 RF port3 13 RF8 RF port8 4 RF2 RF port2 14 RF7 RF port7 5 RF12 RF port12 15 RF6 RF port6 6 NC Not Connect 16 RF5 RF port5 7 VDD Power supply 17 GND Ground 8 VIO Supply voltage for MIPI 18 RF10 RF port10 9 SDATA MIPI data input/output 19 RF9 RF port9 10 SCLK MIPI clock 20 GND Ground Ground GND Ground Paddle Note: Bottom ground paddles must be connected to ground. Version 1.0 Page 2 Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Truth Table Table 2. State Mode 1 Register_0 D7 D6 D5 D4 D3 D2 D1 D0 ISO x 0 0 0 0 0 0 0 2 ISO x 0 0 0 1 1 1 1 3 RF1 on x 0 0 0 0 1 0 0 4 RF2 on x 0 0 0 0 1 1 1 5 RF3 on x 0 0 0 1 0 0 1 6 RF4 on x 0 0 0 1 0 1 1 7 RF5 on x 0 0 0 1 1 0 0 8 RF6 on x 0 0 0 0 0 0 1 9 RF7 on x 0 0 0 0 0 1 0 10 RF8 on x 0 0 0 0 0 1 1 11 RF9 on x 0 0 0 1 0 1 0 12 RF10 on x 0 0 0 1 0 0 0 13 RF11 on x 0 0 0 0 1 0 1 14 RF12 on x 0 0 0 0 1 1 0 Recommended Operation Range Table 3. Recommended Operation Condition Parameters Symbol Min Typ Max Units Operation Frequency f1 0.7 - 3.0 GHz Power supply VDD 2.5 2.8 3.6 V Power supply for MIPI VIO 1.65 1.8 1.95 V MIPI Control Voltage High VH 0.8*VIO 1.8 1.95 V MIPI Control Voltage Low VL 0 0 0.3 V Specifications Table 4. Electrical Specifications Parameter Symbol Supply voltage VDD Supply current IDD VIO supply voltage VIO VIO Supply current IIO Version 1.0 Test Condition DC Specifications Min Typical 2.5 2.8 3.0 100 150 1.8 1.95 4 10 1.65 Page 3 Max Copyright©2021, ShenZhen FM Co.ltd Units V uA V uA 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) SDATA, SCLK control voltage: High Low Switch with MIPI for LTE TRX 0.8* VIO 0 VCTL_H VCTL_L Switching Speed, one RF to another 10% to 90% RF VIO 0 2 1.95 0.3 3 V V uS RF Specifications Insertion loss (ANT pin to IL RF1/2/3/4/5/6/7/8/9/10/11/12 pins) 0.60 1.0 to 2.0 GHz 2.0 to 2.7 GHz 0.70 0.80 0.1 to 1.0 GHz 35 40 1.0 to 2.0 GHz 2.0 to 2.7 GHz 25 18 30 20 RL 0.1 to 1.0 GHz 1.0 to 2.0 GHz 2.0 to 2.7 GHz 20 15 12 25 20 15 P0.1dB 0.7 GHz to 3.0 GHz Isolation (ANT pin to Iso RF1/2/3/4/5/6/7/8/9/10/11/12 pins) Input return loss (ANT pin to RF1/2/3/4/5/6/7/8/9/10/11/12 pins) 0.1 dB Compression Point (ANT pin to RF1/2/3/4/5/6/7/8/9/10/11/12 pins) 0.1 to 1.0 GHz +34 dB dB dB dB dB dB dB dB dB dBm MIPI Read and Write Timing MIPI supports the following Command Sequences: ⚫ Register Write ⚫ Register_0 Write ⚫ Register Read Figures 3 and 4 provide the timing diagrams for register write commands and read commands, respectively. Figure 5 shows the Register 0 Write Command Sequence. Refer to the MIPI Alliance Specification for RF FrontEnd Control Interface (RFFE), v1.10 (26 July 2011) for additional information on MIPI USID programming sequences and MIPI bus specifications. Figure 3 Register Write Command Sequence Version 1.0 Page 4 Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Figure 4 Register Read Command Sequence In the timing figures, SA[3:0] is slave address. A[4:0] is register address. D[7:0] is data. “P” is odd parity bit. Register 0 Write Command Sequence Figure shows the Register 0 Write Command Sequence. The Command Sequence starts with an SSC, followed by the Register 0 Write Command Frame containing the Slave address, a logic one, and a seven bit word to be written to Register 0. The Command Sequence ends with a Bus Park Cycle Figure 5 Register 0 Write Command Sequence Version 1.0 Page 5 Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Register definition Table 5. Register definition table Register Address Register Name BROADC Data Bits R/W Function Description Default AST_ID Trigger support support 0x00 REGISTER_0 0x001B GROUP_SID 7:0 R/W RF Control 7:4 R RESERVED 3:0 R/W GSID Register_0 truth Table: Table 2 Group Slave ID 0x00 No Yes 0x0 No No 0x0 No No 0b10 Yes No 00: Normal Operation (ACTIVE) 01: Reset all registers to default settings (STARTUP) 7:6 R/W PWR_MODE 10: Low power (LOW POWER) 11: Reserved Note: Write PWR_MODE=2’h1 will reset all register, and puts the device into STARTUP state. 5 R/W Trigger_Mask_2 If this bit is set, trigger 2 is disabled 0 No No 4 R/W Trigger_Mask_1 If this bit is set, trigger 1 is disabled 0 No No 0 No No 0 Yes No 0 Yes No 0 Yes No No No No No No No No No No No If this bit is set, trigger 0 is disabled 0x001C PM_TRIG Note: When all triggers are disabled, writing to a 3 R/W Trigger_Mask_0 register that is associated with trigger 0, 1, or 2, causes the data to go directly to the destination register. 2 W Trigger_2 A write of a one to this bit loads trigger 2's registers 1 W Trigger_1 A write of a one to this bit loads trigger 1's registers A write of a one to this bit loads trigger 0's registers Note: Trigger processed immediately then cleared. 0 W Trigger_0 Trigger 0, 1, and 2 will always read as 0. 0x001D 0x001E PRODUCT_ID MANUFACTU 7:0 R 7:0 R RER_ID 0x001F Product Number 0x5F MANUFACTUR Lower eight bits of MIPI registered Manufacturer ID 0x78 ER_ID[7:0] 7:6 R 5:4 R MAN_USID 3:0 Version 1.0 PRODUCT_ID R/W 0b00 RESERVED MANUFACTUR Upper two bits of MIPI registered ER_ID[9:8] Manufacturer ID USID USID of the device. Page 6 0b4 0xA Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Absolute Maximum Ratings Table 6. Maximum ratings Symbol Minimum Maximum Units Supply voltage Supply voltage for MIPI MIPI Control voltage (SDATA, SCLK) RF input power Parameters VDD VIO VCTL PIN +1.6 +1.0 0 +4.2 +2.0 +2.0 +36 V V V dBm Operating temperature Storage temperature TOP TSTG –20 –40 +85 +125 ℃ ℃ Electrostatic Discharge Human body model (HBM), Class 1C Machine Model (MM), Class A Charged device model (CDM), Class III 1000 ESD_HBM 100 ESD_MM ESD_CDM V 1000 Note: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with o nly one parameter set at the limit and all other parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device Power ON and OFF sequence Here is the recommendation about power-on/off sequence in order to avoid damaging the device. Power ON 1) Apply voltage supply - VDD 2) Apply logic supply - VIO 3) Wait 10μs or greater and then apply MIPI bus signals – SCLK and SDATA 4) Wait 5μs or greater after MIPI bus goes idle and then apply the RF Signal Power OFF 5) Remove the RF Signal 6) Remove MIPI bus – SCLK and SDATA 7) Remove logic supply - VIO 8) Remove voltage supply - VDD Version 1.0 Page 7 Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Note: VIO can be applied to the device before VDD or removed after VDD. It is important to wait 10μs after VIO & VDD are applied before sending SDATA to ensure correction data transmission. The minimum time between a power up and power down sequence (and vice versa) is ≥ 100us. Version 1.0 Page 8 Copyright©2021, ShenZhen FM Co.ltd 富满微电子集团股份有限公司 FINE MADE MICROELECTRONICS GROUP CO., LTD. FM86C0 (文件编号：S&CIC2056) Switch with MIPI for LTE TRX Reflow Chart Figure 7 Recommended Lead-Free Reflow Profile Table 7. Reflow condition Profile Parameter Ramp-up rate（TSmax to Tp） Preheat temperature（TSmin to TSmax） Preheat time（ts） Time above TL , 217℃（tL） Peak temperature（Tp） Time within 5℃ of peak temperature(tp) Ramp-down rate Time 25℃ to peak temperature Lead-Free Assembly, Convection, IR/Convection 3℃/second max. 150℃ to 200℃ 60 - 180 seconds 60 - 150 seconds 260℃ 20 - 40 seconds 6℃/second max. 8 minutes max. ESD Sensitivity Integrated circuits are ESD sensitive and can be damaged by static electric charge. Proper ESD protection techniques should be used when handling these devices. RoHS Compliant This product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBB) and polybrominated diphenyl ethers (PBDE), and are considered RoHS compliant. Version 1.0 Page 9 Copyright©2021, ShenZhen FM Co.ltd