FX2N7002KMFH-06S3G

FX2N7002KMFH-06S3G N-Channel 60V(DS)MOSFET-ESD Protected General Description The FX2N7002KMFH-06S3G is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits and low in-line power loss are needed in a very small outline surface mount package. PIN Configuration Features Applications ● RDS(ON) ≦3Ω@VGS=10V ● Power Management in Note book ● RDS(ON) ≦4Ω@VGS=4.5V ● Portable Equipment ● RDS(ON) ≦4.5Ω@VGS=3V ● Load Switch ● ESD Protection HBM >2KV ● Battery Powered System ● Super high density cell design for extremely low ● DSC RDS(ON) ● Exceptional on-resistance and maximum DC current capability Absolute Maximum Ratings(TA=25oC Unless Otherwise Noted) Symbol Maximum Ratings Unit Drain-Source Voltage VDS 60 V Gate-Source Voltage VGS ±20 V TA=25℃ ID 0.27 TA=70℃ ID 0.22 IDM 1.1 TA=25℃ PD 0.4 TA=70℃ PD 0.2 TJ -55 to 150 ℃ RθJA 350 ℃/W Parameter Continuous Drain A Pulsed Drain Current Maximum Power Dissipation A W Operating Junction Temperature Thermal Resistance-Junction to Ambient* * The device mounted on 1in2 FR4 board with 2 oz copper Mar, 2021 1/6 FX2N7002KMFH, V1 FX2N7002KMFH-06S3G N-Channel 60V(DS)MOSFET-ESD Protected Electrical Characteristics (TA =25℃ Unless Otherwise Specified) Symbol Parameter Conditions Min. Typ. Max. Unit STATIC BVDSS Drain-Source Breakdown Voltage VGS=0, ID=10uA 60 VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 1 IGSS Gate Body Leakage VGS= ±20V , VDS=0V IDSS Zero Gate Voltage Drain Current VDS=60V, VGS=0V RDS(ON) VSD Drain-Source On-State Resistance Diode Forward Voltage V 2.5 V ±10 uA 1 uA VGS=10V, ID=500mA 1.8 3 VGS=4.5V, ID=200mA 2.3 4 VGS=3V, ID=10mA 3.8 4.5 IS=200mA, VGS=0V 0.82 1.3 Ω V Dynamic Qg Total Gate Charge VDS=30V,VGS=10V,ID=200mA 3.7 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge 0.2 Ciss Input Capacitance 15 Coss Output Capacitance Crss Reverse Transfer Capacitance td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time 1.4 VDS=30V,VGS=4.5V,ID=200mA VDS=25V, VGS=0V, f=1MHz 2 2 nC pF 1 VDS=30V, RL =150Ω VGS=10V,RGS=10Ω ID=200mA 3.7 21.7 5.9 Ns 21.4 Notes：a. Pulse test: pulse width≦ 300us, duty cycle≦ 2%, Guaranteed by design, not subject to production testing. b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice. Mar, 2021 2/6 FX2N7002KMFH, V1 FX2N7002KMFH-06S3G N-Channel 60V(DS)MOSFET-ESD Protected Typical Characteristics (TJ =25℃ Noted) Mar, 2021 3/6 FX2N7002KMFH, V1 FX2N7002KMFH-06S3G N-Channel 60V(DS)MOSFET-ESD Protected Mar, 2021 4/6 FX2N7002KMFH, V1 FX2N7002KMFH-06S3G N-Channel 60V(DS)MOSFET-ESD Protected Package Outline Dimensions Small SOT-23 Package Mar, 2021 5/6 FX2N7002KMFH, V1 FX2N7002KMFH-06S3G N-Channel 60V(DS)MOSFET-ESD Protected Legal Disclaimer Notice Limited warranty and liability - Lingyange Semiconductor, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “LYG”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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