FIR7N60FG
Advanced N-Ch Power MOSFET-I
PIN Connection
General Description
FIR7N60FG is an N-channel enhancement mode
MOS field effect transistor which is
proprietary
F-Cell
TM
structure
TO-220F
power
produced using
VDMOS
technology.
The
improved planar stripe cell and the improved guard ring
terminal have been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulse in the avalanche and commutation
G
D
mode.
These devices are widely used in AC-DC power suppliers, DCDC converters and H-bridge PWM motor drivers.
S
Schematic diag ram
D
Features
•
•
•
•
•
7A,600V,RDS(on)(typ)= 1.0 Ω@VGS=10V
Low gate charge
G
Low Crss
S
Fast switching
Improved dv/dt capability
Marking Diagram
YAWWVT
FIR7N60F
Y
= Year
A
= Assembly Location
WW
= Work Week
VT
= Version & Thickness
FIR7N60F = Specific Device Code
Absolute Maximum Ratings (Ta = 25o C unless otherwise noted )
Symbol
Ratings
Unit
Drain-Source Voltage
VDS
600
V
Gate-Source Voltage
VGS
±30
V
Characteristics
TC=25°C
Drain Current
TC=100°C
Drain Current Pulsed
ID
A
4.0
28
A
45
W
0.36
W/°C
EAS
489
mJ
Operation Junction Temperature Range
TJ
-55~+150
°C
Storage Temperature Range
Tstg
-55~+150
°C
Power Dissipation(TC=25°C)
-Derate above 25°C
Single Pulsed Avalanche Energy (Note 1)
@ 2018 Copyright By American First Semiconductor
IDM
7.0
PD
REV:1.0
Page 1/7
FIR7N60FG
Thermal Characteristics
Symbol
Ratings
Unit
Thermal Resistance, Junction-to-Case
RθJC
2.78
°C/W
Thermal Resistance, Junction-to-Ambient
RθJA
120
°C/W
Characteristics
Electrical Characteristics (Ta = 25oC unless otherwise noted )
Characteristics
Symbol
Drain -Source Breakdown Voltage
BVDSS
Drain-Source Leakage Current
Gate-Source Leakage Current
Gate Threshold Voltage
Static Drain- Source On State
Resistance
IDSS
IGSS
Test conditions
Min.
Typ.
Max.
25 °C, VGS=0V, ID=250µA
600
-- .
-- .
V
125 °C, VGS=0V, ID=250µA
600
--
--
V
25 °C, VDS=600V, VGS=0V
--
--
1
uA
125 °C, VDS=600V, VGS=0V
--
--
50
uA
150 °C, VDS=600V, VGS=0V
--
--
100
uA
VGS=±30V, VDS=0V
--
--
±100
nA
2.5
--
3.8
.0
V
--
1
1.4
Ω
--
885
--
--
104
--
--
3.8
--
VDD=300V,ID=7.0A,
--
27.33
--
RG=25Ω
--
58.40
--
--
42.13
--
--
31.20
--
VGS(th)
VGS= VDS, ID=250µA
RDS(on)
VGS=10V, ID=3.5A
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-on Delay Time
td(on)
Turn-on Rise Time
tr
Turn-off Delay Time
td(off)
VDS=25V,VGS=0V,
f=1.0MHZ
(Note 2,3)
Turn-off Fall Time
tf
Total Gate Charge
Qg
VDS=480V,ID=7.0A,
--
15.16
--
Gate-Source Charge
Qgs
VGS=10V
--
5.08
--
Gate-Drain Charge
Qgd
--
4.95
--
Min.
Typ.
Max.
--
--
7.0
--
--
28
(Note 2,3)
Unit
pF
ns
nC
Source-Drain Diode Ratings And Characteristics
Characteristics
Symbol
Test conditions
Integral
Reverse
Junction
Diode
Continuous Source Current
IS
Pulsed Source Current
ISM
Diode Forward Voltage
VSD
IS=7.0A,VGS=0V
--
--
1.2
V
Reverse Recovery Time
Trr
IS=7.0A,VGS=0V,
--
500
--
ns
Reverse Recovery Charge
Qrr
dIF/dt=100A/µS
--
3.4
--
µC
MOSFET
in
P-N
Unit
the
A
Notes:
1.
L=30mH,IAS=5.16A, VDD=159V, RG=25Ω,starting TJ=25°C;
2. Pulse Test: Pulse width ≤300μs,Duty cycle≤2%;
3. Essentially independent of operating temperature.
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Page 2/7
FIR7N60FG
Typical Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
100
Variable
VGS=4.5V
VGS=5V
VGS=5.5V
VGS=6V
VGS=7V
Drain Current – ID(A)
Drain Current – ID(A)
10
VGS=8V
1
VGS=10V
VGS=15V
Notes:
1.250µS pulse test
2.TC=25°C
0.1
0.1
1
10
-55°C
25°C
150°C
10
1
0.1
100
Notes:
1.250µS pulse test
2.VDS=50V
0
Drain-Source Voltage – VDS(V)
Figure 3. On-Resitance Variation vs.
Drain Current and Gate Voltage
1.1
1.0
Note: TJ=25°C
2
4
8
6
10
8
9
10
0
0.25
0.50
0.75
1.00
1.25
1.50
Source-Drain Voltage– VSD(V)
Figure 6. Gate Charge Characteristics
12
1600
Gate-Source Voltage– VGS(V)
Ciss=Cgs+Cgd(Cds=shorted)
Coss=Cds+Cgd
Crss=Cgd
1800
Capasistance(pF)
7
Notes:
1.250µS pulse test
2.VGS=0V
Figure 5. Capacitance Characteristics
1400
1200
1000
Ciss
Coss
Crss
Notes:
1. VGS=0V
2. f=1MHz
400
200
0
0.1
6
1
0.1
10
2000
800
5
-55°C
25°C
150°C
Drain Current – ID(A)
600
4
100
1.2
0.9
0
3
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
VGS=10V
VGS=20V
1.3
2
Gate-Source Voltage– VGS(V)
Reverse Drain Current – IDR(A)
Drain-Source On-Resistance
– RDS(ON)(Ω)
1.4
1
VDS=480V
VDS=300V
VDS=120V
10
8
6
4
2
Note: ID=7.0A
0
1
10
100
Drain-Source Voltage – VDS(V)
0
4
8
12
16
Total Gate Charge – Qg(nC)
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Page 3/7
7/7
FIR7N60FG
1.2
Figure 7. Breakdown Voltage Variation
vs. Temperature
1.1
1.0
0.9
0.8
-100
Notes:
1. VGS=0V
2. ID=250µA
-50
0
50
100
150
2.5
2.0
1.5
1.0
Notes:
1. VGS=10V
2. ID=3.5A
0.5
0.0
-100
200
Junction Temperature – TJ(°C)
102
Figure 8. On-resistance Variation
vs. Temperature
3.0
Drain-Source On-Resistance
– RDS(ON)(Normalized)
Drain-Source Breakdown Voltage–
BVDSS(Normalized)
Typical Characteristics(Continued)
-50
0
50
100
150
200
Junction Temperature – TJ(°C)
Figure 9 . Max. Safe Operating
Area(FIR7N60FG)
Figure 10. Maximum Drain Current vs.
Case Temperature
8
Operation in This Area is
Limited by RDS(ON)
1ms
Drain Current - ID(A)
Drain Current - ID(A)
100µs
101
10ms
10
0
10-1
10-2
100
DC
Notes:
1.TC=25°C
2.Tj=150°C
3.Single Pulse
101
102
103
6
4
2
0
25
Drain Source Voltage - VDS(V)
50
75
100
125
150
Case Temperature – TC(°C)
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Page 4/7
FIR7N60FG
Typical Test Circuit
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
10V
VDS
200nF
12V
300nF
Qgs
Qgd
VGS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveform
RL
VDS
VDS
90%
VGS
VDD
RG
DUT
10%
VGS
10V
td(on)
tr
ton
td(off)
tf
toff
Unclamped Inductive Switching Test Circuit & Waveform
EAS =
L
VDS
BVDSS
1
2
2 LIAS BVDSS - VDD
BVDSS
ID
IAS
RG
DUT
10V
ID(t)
VDD
VDS(t)
VDD
tp
tp
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Time
Page 5/7
FIR7N60FG
Package Dimensions
TO−220F
A
A1
Units:mm
A2
θ
θ
H1
θ
6°±1°
A4
θ
c
A3
θ1
θ
θ
A4
θ
θ
θ
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Page 6/7
FIR7N60FG
Declaration
z FIRST reserves the right to change the specifications, the same specifications of products due to different
packaging line mold, the size of the appearance will be slightly different, shipped in kind, without notice!
Customers should obtain the latest version information before ordering, and verify whether the relevant
information is complete and up-to-date.
z Any semiconductor product under certain conditions has the possibility of failure or failure,The buyer has the
responsibility to comply with safety
standards and take safety measures when using FIRST products for system design and manufacturing,To
avoid To avoid potential failure risks, which may cause personal injury or property damage!
z Product promotion endless, our company will wholeheartedly provide customers with better products!
ATTACHMENT
Revision History
Date
2018.01.01
REV
1.0
Description
Page
Initial release
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Page 7/7
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