FIR4N65LG
Advanced N-Ch Power MOSFET-H
PIN Connection TO-252(D-PAK)
General Description
FIR4N65LG , the silicon N-channel Enhanced
VDMOSFETs, is obtained by the self-aligned planar Technology
D
which reduce the conduction loss, improve switching
G
performance and enhance the avalanche energy. The transistor
S
can be used in various power switching circuit for system
miniaturization and higher efficiency. The package form is
TO-252 , which accords with the RoHS standard.
Schematic diag ram
D
Features
G
l Fast Switching
S
l ESD Improved Capability
l Low Gate Charge
Marking Diagram
l Low Reverse transfer capacitances
YAWWVA
l 100% Single Pulse avalanche energy Test
FIR4N65L
Y
= Year
A
= Assembly Location
WW
= Work Week
VA
= Version &Assembly plant
FIR4N65L = Specific Device Code
Absolute Maximum Ratings (Ta = 25o C unless otherwise noted; reference only )
Symbol
Ratings
Unit
Drain-Source Voltage
VDS
650
V
Gate-Source Voltage
VGS
±30
V
Characteristics
TC=25°C
Drain Current
TC=100°C
Drain Current Pulsed
Power Dissipation(TC=25°C)
-Derate above 25°C
ID
IDM
PD
4.0
A
2.5
16
A
75
W
0.6
W/°C
Single Pulsed Avalanche Energy(Note 1)
EAS
200
mJ
Operation Junction Temperature Range
TJ
-55~+150
°C
Storage Temperature Range
Tstg
-55~+150
°C
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REV:1.0
Page 1/7
FIR4N65LG
Thermal Characteristics
Symbol
Ratings
Unit
Thermal Resistance, Junction-to-Case
RθJC
1.67
°C/W
Thermal Resistance, Junction-to-Ambient
RθJA
110
°C/W
Characteristics
Electrical Characteristics (Ta = 25o C unless otherwise noted; reference only )
Characteristics
Symbol
Drain -Source Breakdown Voltage
BVDSS
Drain-Source Leakage Current
Gate-Source Leakage Current
Gate Threshold Voltage
Static Drain- Source
On State Resistance
Test conditions
Min.
Typ.
Max.
Unit
25 °C, VGS=0V, ID=250µA
650
--
--
V
125 °C, VGS=0V, ID=250µA
650
--
--
V
25 °C, VDS=650V, VGS=0V
--
--
1
uA
125 °C, VDS=520V, VGS=0V
--
--
100
uA
150 °C, VDS=520V, VGS=0V
--
--
100
uA
IGSS
VGS=±30V, VDS=0V
--
--
±100
nA
VGS(th)
VGS= VDS, ID=250µA
2.0
--
4.0
V
RDS(on)
VGS=10V, ID=2A
--
2.4
2.8
Ω
pF
IDSS
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-on Delay Time
td(on)
Turn-on Rise Time
tr
Turn-off Delay Time
td(off)
610
VDS=25V,VGS=0V,
--
53
--
--
3.5
--
VDD=325V,ID=4.0A,
--
14
--
RG=10Ω
--
16
--
--
32
--
--
11
--
f=1.0MHZ
(Note 2,3)
Turn-off Fall Time
tf
Total Gate Charge
Qg
VDS=520V,ID=4.0A,
--
14.5
--
Gate-Source Charge
Qgs
VGS=10V
--
3
--
Gate-Drain Charge
Qgd
--
6.5
--
(Note 2,3)
ns
nC
Source-Drain Diode Ratings And Characteristics
Characteristics
Symbol
Test conditions
Integral Reverse P-N
Min.
Typ.
Max.
Unit
--
--
4.0
--
--
16
1.5
V
Continuous Source Current
IS
Pulsed Source Current
ISM
Diode Forward Voltage
VSD
IS=4.0A,VGS=0V
--
--
Reverse Recovery Time
Trr
IS=4.0A,VGS=0V,
--
256
--
ns
Reverse Recovery Charge
Qrr
dIF/dt=100A/µs
--
1.2
--
µC
Junction Diode in the
MOSFET
A
Notes:
1.
L=10mH,IAS= 6.3 A,VDD=100V, RG=10Ω, starting TJ=25°C;
2.
Pulse Test: Pulse width ≤300μs,Duty cycle≤2%;
3.
Essentially independent of operating temperature.
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Page 2/7
FIR4N65LG
Characteristics Curve
80
10
100us
1
OPERATION IN THIS AREA
MAY BE LIMITED BY RDS(ON)
TJ=MAX RATED
TC=25℃ Single Pulse
0 .1
1ms
10ms
PD , Power Dissipation
Id , Drain Current , Amps
Watts
100
60
40
20
DC
0
0 .0 1
1
0
10
100
V d s , D r a in - t o - S o u r c e V o lta g e , V o lts
1000
6
8
Id , Drain Current , Amps
3
2
150
250us Pluse Test
Tc = 25℃
5
4
125
Figure 2 Maximum Power Dissipation vs Case Temperature
Figure 1 Maximum Forward Bias Safe Operating Area
Id , Drain Current , Amps
75
50
100
TC , Case Temperature , C
25
VGS=10V
6
VGS=7V
4
VGS=5V
VGS=6V
VGS=4V
2
1
0
0
0
25
75
100
125
50
TC , C ase Tem perature , C
150
0
Figure 3 Maximum Continuous Drain Current vs Case Temperature
Fi
5
25
Figure 4 Typical Output Characteristics
e 5 Maximum Effective Thermal Im endance
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10
15
20
Vds , Drain-to-Source Voltage , Volts
unction to Case
Page 3/7
FIR4N65LG
8
Isd, Reverse Drain Current , Amps
Id , Drain Current , Amps
9
250us Pulse Test
VDS=10V
7.5
6
4.5
+25℃
3
+150℃
1.5
7
6
5
4
1
0
4
6
8
Vgs , Gate to Source Voltage , Volts
2
Figure
6
10
0
Typical Transfer Characteristics
Rds(on), Drain to Source ON Resistance,
Nomalized
PULSE
DURATION = 10μs
DUTY CYCLE= 0.5%MAX
Tc =25 ℃
3.5
VGS=10V
3
2.5
0.4
0.6
0.8
1
Vsd , Source - Drain Voltage , Volts
7
1.2
Typical Body Diode Transfer Characteristics
2.5
PULSE
DURATION = 10μs
DUTY CYCLE= 0.5%MAX
VGS=10V ID=2A
2.25
2
1.75
1.5
1.25
1
0.75
2
0.5
0
1
Figure
8
2
3
Id , Drain Current , Amps
-50
4
0
Figure
Typical Drain to Source ON Resistance
vs Drain Current
9
50
100
Tj, Junction temperature , C
150
Typical Drian to Source on Resistance
vs Junction Temperature
1.15
1.15
Bvdss,Drain to Source
Breakdown Voltage, Normalized
1.1
1.05
1
0.95
0.9
VGS=0V
ID=250μA
0.85
0.8
0.75
1.05
VGS=0V
ID=250μA
0.95
0.85
0.7
0.65
-75
-50
Figure
10
-25
0
25
50
75
100
Tj, Junction temperature , C
125
150
175
Typical Theshold Voltage vs Junction Temperature
0.75
-55
Figure
Ciss
100
Coss
VGS=0V , f=1MHz
Ciss=Cgs+Cgd
Coss=Cds+Cgd
Crss=Cgd
Vgs , Gate to Source Voltage ,Volts
1000
10
-30
11
-5
20
45
70
95
120
Tj, Junction temperature , C
145
170
Typical Breakdown Voltage vs Junction Temperature
12
10000
Capacitance , pF
0.2
Figure
4
Rds(on), Drain to Source ON
Resistance, Ohms
+25℃
2
0
Vgs(th),Threshold Voltage, Nomalized
+150℃
3
10
VDS=520V
VDS=325V
VDS=130V
8
6
4
2
Crss
ID=4A
0
1
0.1
Figure
1
10
Vds , Drain - Source Voltage , Volts
12
100
Typical Capacitance vs Drain to Source Voltage
0
Figure
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3
13
6
9
Qg , Total Gate Charge , nC
12
15
Typical Gate Charge vs Gate to Source Voltage
Page 4/7
FIR4N65LG
Typical Test Circuit
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Page 5/7
FIR4N65LG
Package Dimensions
TO-252
"
Units:mm
1
2
"
SYMBOL
A
A1
b
b2
b3
c
D
D1
E
E1
e
H
L
L2
L3
L4
INCHES
MIN
MAX
0.086
0.094
0.005
0.025
0.035
0.033
0.045
0.205
0.215
0.018
0.024
0.241
0.249
0.205
0.250
0.265
0.190
0.090 BSC.
0.380
0.410
0.055
0.070
0.020 BSC.
0.035
0.050
0.025
0.040
0°
8°
MILLIMETERS
MIN
MAX
2.19
2.38
0.13
0.64
0.89
0.84
1.14
5.21
5.46
0.46
0.61
6.12
6.32
5.21
6.35
6.73
4.83
2.29 BSC.
9.65
10.41
1.40
1.78
0.51 BSC.
0.89
1.27
0.64
1.01
0°
8°
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NOTES
Page 6/7
FIR4N65LG
Declaration
z FIRST reserves the right to change the specifications, the same specifications of products due to different
packaging line mold, the size of the appearance will be slightly different, shipped in kind, without notice!
Customers should obtain the latest version information before ordering, and verify whether the relevant
information is complete and up-to-date.
z Any semiconductor product under certain conditions has the possibility of failure or failure,The buyer has the
responsibility to comply with safety
standards and take safety measures when using FIRST products for system design and manufacturing,To
avoid To avoid potential failure risks, which may cause personal injury or property damage!
z Product promotion endless, our company will wholeheartedly provide customers with better products!
ATTACHMENT
Revision History
Date
2018.01.01
REV
1.0
Description
Page
Initial release
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Page 7/7