B20N15D

B20N15D B20N15D N- Channel 150-V (D-S) MOSFET Version: A06 Please read the notice stated in this preamble carefully before accessing any contents of the document attached. Admission of BiTEK’s statement therein is presumed once the document is released to the receiver. B20N15D Notice: Firstly, the information furnished by Beyond Innovation Technology Co. Ltd. (BiTEK) in this document is believed to be accurate and reliable and subject to BiTEK’s amendment without prior notice. And the aforesaid information does not form any part or parts of any quotation or contract between BiTEK and the information receiver. Further, no responsibility is assumed for the usage of the aforesaid information. BiTEK makes no representation that the interconnect of its circuits as described herein will not infringe on exiting or future patent rights, nor do the descriptions contained herein imply the granting of licenses to make, use or sell equipment constructed in accordance therewith. Besides, the product in this document is not designed for use in life support appliances, devices, or systems where malfunction of this product can reasonably be expected to result in personal injury. BiTEK customers’ using or selling this product for use in such applications shall do so at their own risk and agree to fully indemnify BiTEK for any damage resulting from such improper use or sale. At last, the information furnished in this document is the property of BiTEK and shall be treated as highly confidentiality; any kind of distribution, disclosure, copying, transformation or use of whole or parts of this document without duly authorization from BiTEK by prior written consent is strictly prohibited. The receiver shall fully compensate BiTEK without any reservation for any losses thereof due to its violation of BiTEK’s confidential request. The receiver is deemed to agree on BiTEK’s confidential request therein suppose that said receiver receives this document without making any expressly opposition. In the condition that aforesaid opposition is made, the receiver shall return this document to BiTEK immediately without any delay. -Version A4 B20N15D General Description: Pin layout The B20N15D is the N-Channel logic enhancement mode power field effect transistors to provide excellent RDS(on), low gate charge and low gate resistance. It’s up to 150V operation voltage is well suited in switching mode power supply, SMPS, notebook computer power management and other battery powered circuits. D G S Features: ● RDS(ON)=95mΩ@VGS=10V ● Super high cell density design for extremely low RDS(ON) ● Exceptional on-resistance and maximum DC current Applications: ● Switching power supply, SMPS ● Telecom Power System ● DC/DC Converter ● LED Backlighting ● Load Switch ℃ unless otherwise noted): Absolute maximum ratings (TA=25 Parameter Drain-source voltage Gate source voltage Continuous drain current (TJ=150 ℃, T =25℃) C Pulsed drain current Maximum power dissipation ( TJ=150 ℃,T =25℃) (4) C Repetitive Avalanche Energy Avalanche Current (1) Single Pulse Avalanche Energy Peak Diode Recovery dv/dt Operating junction temperature (2) Thermal resistance-junction to case (2), (3) Thermal resistance-junction to ambient (1) (2) Ω Symbol Maximum Unit VDS VGS 150 ±30 V V ID 20 A IDM 40 A PD 65 W EAR 10 mJ IAS 28.8 A EAS 51.8 mJ dv/dt 5 V/ns TJ -55 to 150 RθJC 1.9 RθJA 56.3 ℃ VDD=30V, L=0.1mH, IAs=28.8A, Rg=25 , Starting TJ =25 The device mounted on 1in2 FR4 board with 2 oz copper (3) The value of RθJA is measured with the device in a still air environment with T A =25°C (4) L=0.05mH, Duty=2%, TJ (max)=150°C (2) ℃ ℃/W B20N15D Electrical characteristics (TA =25℃ ℃ unless otherwise specified): Symbol Parameter Conditions Min Typ. Max Unit STATIC VDS Drain-source breakdown voltage VGS=0V, ID=250uA 150 Gate threshold voltage VDS=VGS, ID=250uA 2.0 IGSS Gate leakage current IDSS VGS(th) RDS(ON) VSD V 3.5 4.5 V VDS=0V, VGS=±20V ±100 nA Zero gate voltage drain current VDS=150V, VGS=0V 10 uA Drain-source on-resistance Note 1 VGS=10V, ID= 10A Note 1 75 95 Diode forward voltage IS=1A 0.7 1 m Ω V DYNAMIC Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge td(on) Turn-on delay time tr td(off) tf Turn-on rise time Turn-off delay time Turn-off fall time Notes: 1. Pulse test; pulse width 2. Guaranteed by design. ≦ 300us, duty cycle≦ 2% VDS=25V, VGS=0V, f=1.0MHz, Note 2 VDS=120V, VGS=10V, ID=10A, Note 2 1250 140 pF 80 28 10 nC 8.3 18 VDS=75V, ID=10A VGS=10V RG =10 Note 2 Ω 8 ns 33 9 B20N15D ℃ Typical Characteristics (TA =25 unless otherwise specified): Transfer characteristics Capacitance On-resistance vs. Drain current On-resistance vs. Gate-to-Source Voltage Capacitance (pF) 3000 2700 2400 f=1MHz VGS=0V CISS 2100 1800 1500 COSS 1200 900 600 CRSS 300 0 0 5 10 15 20 25 30 VDs-Drain-to-Source Voltage (V) Gate Charge Characteristics On region characteristics 10 VGS(th) (volt) 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 Qg(nC) 30 35 40 45 50 B20N15D Maximum Forward Biased Safe Operating Area Body diode characteristics B20N15D Soldering information Reflow soldering: The choice of heating method may be influenced by plastic QFP package). If infrared or vapor phase heating is used and the package is not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stenciling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 270 °C depending on solder paste material. The top-surface temperature of the packages should preferable be kept below 245 °C for thick/large packages (packages with a 3 thickness 2.5 mm or with a volume 350 mm so called thick/large packages). The top-surface temperature of the packages should preferable be kept below 260 °C for thin/small packages (packages with a thickness < 2.5 mm 3 and a volume < 350 mm so called thin/small packages). ≧ ≧ Stage 1’st Ram Up Rate Preheat 2’nd Ram Up Solder Joint Peak Temp Ram Down rate Condition max3.0+/-2 /sec 150 ~200 max3.0+/-2 /sec 217 above 260 +0/-5 6 /sec max Duration 60~180 sec 60~150 sec 20~40 sec - ℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃ Temp ( ) 260 217 200 150 25 RT 60~ 180 60~150 Time(sec) Wave soldering: Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Manual soldering: Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. B20N15D Order information: B20N15D D: TO-252 Part number Beyond Innovation Technology Co., Ltd. P/N B20N15D package TO-252 MOQ 2,500 SPQ 2,500/Reel B20N15D Package information : TO-252 Package Type I B20N15D TO-252 Package Type II