INN650D02

INN650D02 INN650D02 650V GaN Enhancement-mode Power Transistor Features • Enhancement mode transistor-Normally off power switch • Ultra high switching frequency • No reverse-recovery charge D D • Low gate charge, low output charge D D • Qualified for industrial applications according to JEDEC Standards • ESD safeguard D D D D 1 Benefits S S • High efficiency power switching SK G 8 • High power density • Enables higher switching frequency • System cost savings Applications Gate 8 Drain 1,2,3,4 Kelvin Source 7 Source 5,6 • AC-DC converters • DC-DC converters • Totem pole PFC • Fast battery charging • High density power conversion • High efficiency power conversion Table 1 Key Performance Parameters at T j = 25 °C Parameter Value Unit VDS,max 650 V RDS(on),max 200 mΩ QG,typ 1.0 nC IDS,Pulse 20 A QOSS @ 400V 18 nC Qrr 0 nC Table 2 Ordering Information Type/Ordering Code Package Marking INN650D02 DFN 8X8 INN650D02 Page 1 www.innoscience.com.cn Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Table of contents Features...................................................................................................................................................................... 1 Benefits ...................................................................................................................................................................... 1 Applications ............................................................................................................................................................. 1 Table of contents ..................................................................................................................................................... 2 1 Maximum ratings ............................................................................................................................................ 3 2 Thermal characteristics ................................................................................................................................. 4 3 Electrical characteristics ............................................................................................................................. 5 4 Electrical characteristics diagrams .............................................................................................................. 7 5 Package outlines .......................................................................................................................................... 13 6 Reel information ........................................................................................................................................... 14 7 Revision history ........................................................................................................................................... 15 Page 2 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 1 Maximum ratings at Tj = 25 °C unless otherwise specified. Continuous application of maximum ratings can deteriorate transistor lifetime. For further information, contact Innoscience sales office. Table 3 Maximum ratings Parameter Values Symbol Min. Typ. Max. Unit Note/Test Condition Drain source voltage VDS,max - - 650 V VGS = 0 V, ID = 100 μA Drain source voltage transient 1 VDS(transient) - - 750 V VGS = 0 V, VDS = 750 V Continuous current, drain source ID - - 11 A Tc = 25 °C Pulsed current, drain source 2 ID,pulse - - 20 A Pulsed current, drain source 2 ID,Pulse - - 15 A -1.4 - +7 V Gate source voltage, continuous 3 VGS Tc = 25 °C; VG = 6 V; See Figure 15; Tc = 125 °C;VG = 6 V; See Figure 16; Tj = -55 °C to 150 °C Tj = -55 °C to 150 °C; Gate source voltage, pulsed VGS,pulse -20 - +10 V tPLUSE = 50 ns, f = 100 kHz open drain Power dissipation Ptot - - 97 W Operating temperature Tj -55 - +150 ˚C Storage temperature Tstg -55 - +150 ˚C Tc = 25 °C Zv 1 VDS(transient) is intended for surge rating during non-repetitive events, tPulse < 1 µs 2 Pulse = 300 µs 3 The minimum VGS is clamped by ESD protection circuit, as shown in Figure 10 Page 3 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 2 Thermal characteristics Table 4 Thermal characteristics Parameter Symbol Thermal resistance，junction-case Reflow soldering temperature Values Unit Min. Typ. Max. RthJC - - 1.28 °C/W Tsold - - 260 °C Page 4 www.innoscience.com Note/Test Condition MSL3 Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 3 Electrical characteristics at Tj = 25 °C, unless specified otherwise Table 5 Static characteristics Parameter Symbol Gate threshold voltage VGS(TH) Drain-source leakage current IDSS Gate-source leakage current IGSS Drain-source on-state resistance Gate resistance Table 6 RDS(on) RG Values Unit Note/Test Condition Min. Typ. Max. 1.2 1.7 2.2 - 2 - - 0.5 100 - 5 - - 10 - µA VGS = 6 V; VDS = 0 V - 180 200 mΩ VGS = 6 V; ID = 3 A; Tj = 25 °C - 370 - mΩ VGS = 6 V; ID = 3 A; Tj = 150 °C - 1.4 - Ω V µA ID = 11 mA; VDS = VGS; Tj = 25 °C ID = 11 mA; VDS = VGS; Tj = 125 °C VDS = 650 V; VGS = 0 V; Tj = 25 °C VDS = 650 V; VGS = 0 V; Tj = 150 °C F = 5 MHz; open drain Dynamic characteristics Parameter Symbol Values Min. Typ. Max. Unit Note/Test Condition Input capacitance Ciss - 70 - pF VGS = 0 V; VDS = 400 V; f = 100 kHz Output capacitance Coss - 18 - pF VGS = 0 V; VDS = 400 V; f = 100 kHz Reverse transfer capacitance Crss - 0.3 - pF VGS = 0 V; VDS = 400 V; f = 100 kHz Co(er) - 29 - pF VGS = 0 V; VDS = 0 to 400 V Co(tr) - 44 - pF VGS = 0 V; VDS = 0 to 400 V QOSS - 18 - nC VGS = 0 V; VDS = 0 to 400 V Effective output capacitance, energy related 1 Effective output capacitance, time related 2 Output Charge 1 CO(er) is the fixed capacitance that gives the same stored energy as COSS while VDS is rising from 0 to 400 V 2 CO(tr) is the fixed capacitance that gives the same charging time as COSS while VDS is rising from 0 to 400 V Page 5 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Table 7 Gate charge characteristics Parameter Symbol Values Min. Typ. Max. Unit Gate charge QG - 1.0 - nC Gate-source charge QGS - 0.16 - nC Gate-drain charge QGD - 0.62 - nC Gate Plateau Voltage VPlat - 2.2 - V Table 8 Note/Test Condition VGS = 0 to 6 V; VDS = 400 V; ID= 3 A VDS = 400 V; ID= 3 A Reverse conduction characteristics Parameter Symbol Values Min. Typ. Max. Unit Note/Test Condition Source-Drain reverse voltage VSD - 3 - V VGS = 0 V; ISD= 5 A Pulsed current, reverse IS,pulse - - 22 A VG = -4 V Reverse recovery charge Qrr - 0 - nC Reverse recovery time trr - 0 - ns Peak reverse recovery current Irrm - 0 - A Page 6 www.innoscience.com ISD = 5 A; VDS = 400 V Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 4 Electrical characteristics diagrams at Tj = 25 °C, unless specified otherwise Figure 1 Typ. output characteristics Figure 2 Typ. output characteristics ID = f(VDS,VGS); Tj = 25 °C ID = f(VDS,VGS); Tj = 125 °C Figure 3 Typ. Drain-source on-state resistance Figure 4 Typ. Drain-source on-state resistance RDS(on) = f(IDS,VGS); Tj = 25 °C RDS(on) = f(IDS,VGS); Tj = 125 °C Page 7 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Figure 5 Typ. channel reverse characteristics Figure 6 Typ. channel reverse characteristics ID = f(VDS,VGS); Tj= 25 °C ID = f(VDS,VGS); Tj = 125 °C Figure 7 Typ. channel reverse characteristics Figure 8 Typ. channel reverse characteristics ID = f(VDS,VGS); Tj = 25 °C ID = f(VDS,VGS); Tj = 125 °C Page 8 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Figure 9 Typ. transfer characteristics Figure 10 Typ. Gate-to-Source leakage ID = f(VGS); VDS= 3 V IG = f(VGS); Ig reverse turn on by ESD unit Figure 11 Drain-source leakage characteristics IDSS = f(VDS); VGS = 0 V Page 9 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Figure 12 Gate threshold voltage Figure 13 Drain-source on-state resistance VTH = f(Tj); VGS = VDS; ID = 11 mA RDS(on) = f(Tj); ID = 3 A; VG=6V Figure 14 Power dissipation Figure 15 Max.transient thermal impedance Ptot = f(TC) ZthJC = f(tP, D) Page 10 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Figure 16 Safe operating area Figure 17 Safe operating area Drain Current Id [A] 100 10 Limit by Rdson 1us 10us 1 DC 100us 1ms 10ms 0.1 BVDSS 0.01 0.1 1 10 100 Drain-Source Voltage Vds [V] ID = f(VDS); TC = 25 °C ID = f(VDS); TC = 125 °C Figure 18 Typ. gate charge Figure 19 Typ. capacitances VGS = f(QG); VDCLINK = 400 V; ID = 3 A CXSS = f(VDS)；Freq. = 100 kHz Page 11 www.innoscience.com 1000 Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor Figure 20 Typ. output charge Figure 21 Typ. COSS stored Energy QOSS = f(VDS)；Freq. = 100 kHz EOSS = f(VDS)；Freq. = 100 kHz Page 12 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 5 Package outlines SYMBOL A A1 A2 b D D1 D2 E E1 E2 E3 e L MIN 0.80 0.00 --0.95 6.84 0.40 0.90 3.10 2.70 0.40 DIMENSION NOM 0.90 0.02 0.203 Ref 1.00 8.00 B.S.C 6.94 0.50 8.00 B.S.C 1.00 3.20 2.80 2.00 B.S.C 0.50 MAX 1.00 0.05 --1.05 7.04 0.60 1.10 3.30 2.90 0.60 NOTE: All dimensions in mm Page 13 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 6 Reel information Type A N C D w1 w2 T K 16MM 330±2 100±2 13.1±0.2 5.6±0.5 16.4(+2,-0) 20.6(+2,-0) 2.1±0.15 1.4(+0.15,-0.1) Page 14 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10 INN650D02 650V GaN Enhancement-mode Power Transistor 7 Revision history Major changes since the last revision Revision Date Description of changes 1.0 2020-03-10 Final version release Page 15 www.innoscience.com Final Datasheet Rev. 1.0 2020/03/10