SLU5N65S

SLD5N65 5S / SLU5N65S S SLD5N65S / SLU5N65S 650V N-Channel MOSFET General Description Features This Power MOSFET is produced using Maple semi‘s advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state on state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction based on half bridge topology. - 4.5A, 650V, RDS(on) = 2.5Ω@VGS = 10 V - Low gate charge ( typical 13.3nC) - High ruggedness - Fast switching - 100% avalanche tested - Improved dv/dt capability D D I-PAK D-PAK G G S G D S S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25°C unless otherwise noted Parameter SLD5N65S / SLU5N65S Units 650 V 45 4.5 2.5 16 ±30 128 4.5 3.5 5.5 58 0.46 -55 to +150 A A A V mJ A mJ V/ns W W/℃ ℃ 300 ℃ Drain-Source Voltage Drain Current - Continuous (TC = 25℃) - Continuous (TC = 100℃) Drain Current - Pulsed Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25℃) - Derate above 25℃ Operating and Storage Temperature Range (Note 1) (Note 2) (Note 1) (Note 1) (Note 3) Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case -- 2.5 ℃/W RθJS Thermal Resistance, Case-to-Sink Typ. -- 62.5 ℃/W RθJA Thermal Resistance, Junction-to-Ambient -- 110 ℃/W Maple Semiconductor CO., LTD http://www.maplesemi.com Rev. 01 April. 2018 Symbol Parameter TC = 25°C unless otherwise noted Test Conditions Min Typ Max Units 650 -- -- V -- 0.6 -- V/℃ Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 uA △BVDSS / △TJ Breakdown Voltage Temperature Coefficient ID = 250 uA, Referenced to 25℃ IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V -- -- 25 uA VDS = 520 V, TC = 125℃ -- -- 250 uA VGS = 30 V, VDS = 0 V -- -- 100 nA VGS = -30 V, VDS = 0 V -- -- -100 nA IGSSR Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 uA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 2.0 A -- 1.8 2.5 Ω Forward Transconductance VDS = 40 V, ID = 2.0 A -- 2.5 -- S -- 590 -- pF IGSSF On Characteristics gFS (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 48 -- pF -- 5 -- pF -------- 23 33 61 200 13.3 30 3.0 4.8 -------- ns ns ns ns nC nC C nC Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge G t S Gate-Source Charge Ch Gate-Drain Charge VDD = 300 V, ID = 4.5 A, RG = 25 Ω (Note 4, 5) VDS = 480 V, ID = 4.5A, VGS = 10 V (Note 4, 5) Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 4.0 A ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 16 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 4.5A -- -- 1.4 V trr Reverse Recovery Time VGS = 0 V, IS = 4.5A -- 390 -- ns Qrr Reverse Recovery Charge dIF / dt = 100 A/us -- 1.5 -- uC (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. IAS = 4.5A,L=25mH, VDD = 50V, RG = 25Ω, Starting TJ = 25°C 3. ISD ≤ 4.5A, di/dt ≤ 200A/us, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300us, Duty cycle ≤ 2% 5. Essentially independent of operating temperature Maple Semiconductor CO., LTD http://www.maplesemi.com Rev. 01 April. 2018 SLD5N65 5S / SLU5N65S S Electrical Characteristics SLD5N65 5S / SLU5N65S S Typical Characteristics Figure 1. Typical Output Characteristics Tc=25℃ Figure 2. Typical Output Characteristics Tc=150℃ Figure 3. Normalized Resistance VS Temperature Figure 4. Typical Source-Drain Diode Forward Voltage Figure 5. Maximum Current VS Case Temperature Figure 6. Maximum Safe Operating Area Maple Semiconductor CO., LTD http://www.maplesemi.com Rev. 01 April. 2018 SLD5N65 5S / SLU5N65S S Gate Charge Test Circuit & Waveform Current Regulator 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS Qgs VGS Qgd DUT 3mA R2 R1 Charge Current Sampling (IG) Current Sampling (ID) Resistor Resistor Resistive Switching g Test Circuit & Waveforms RL Vout Vout 90% VDD Vin ( 0.5 rated VDS ) RG DUT 10% Vin 10V td(on) tr td(off) t on t off tf Unclamped Inductive Switching Test Circuit & Waveforms LL EAS = VDS Vary tp to obtain required peak ID 1 ---2 LL IAS2 BVDSS -------------------BVDSS -- VDD BVDSS ID IAS RG C DUT ID (t) VDD VDS (t) VDD 10V tp tp Maple Semiconductor CO., LTD http://www.maplesemi.com Time Rev. 01 April. 2018 + DUT VDS -IS L Driver VGS RG VGS VGS ( Driver ) Same Type as DUT VDD dv/dtcontrolled controlledby by밨 RG ••dv/dt G controlledbybyDuty pulseFactor period밆? ••IISSDcontrolled Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop Maple Semiconductor CO., LTD http://www.maplesemi.com Rev. 01 April. 2018 SLD5N65 5S / SLU5N65S S Peak Diode Recovery dv/dt Test Circuit & Waveforms