LO204A-25M-100-B

LO204 Series Low Power Dual Mode EMI Reduction Oscillator Features ● ● ● ● ● FCC approved EMI attenuation Proprietary Low EMI Phase Modulated SaΦ ic™ Oscillator Dual Mode Clock Output : Low phase jitter clock or Low EMI clock RoHS compliant & Pb free AEC-Q100 G1 & G2 ● ● ● ● ● Frequency range 20MHz ~ 40MHz Supply voltage 1.62V ~ 3.63V CMOS output Operating temperature -40~125ºC SMD seam sealing ceramic package 2.0mm x 1.6mm Electrical Specifications Item Specification Frequency 20MHz ~ 40MHz Supply Voltage (VDD) 1.8V ~ 3.3V [1], ±10% Output Type CMOS Output Load 15 pF Oscillation Mode Fundamental Frequency Stability ±50 ppm [1] [2] [3] Operation Temperature Range -40ºC ~ 125ºC [1] Storage Temperature Range Output Voltage Low (VOL) -55ºC ~ 125ºC @ VDD = 3.3V, IOL = 12mA @ VDD = 1.8V, IOL = 4mA 0.2VDD Max. Output Voltage High (VOH) @ VDD = 3.3V, IOH = -12mA @ VDD = 1.8V, IOH = -4mA 0.8VDD Min. Rise(Tr) / Fall(Tf) Time [4] 6 ns Max. Dynamic Supply Current [5] 2.5mA EN=Low / 4.0mA EN=High Duty Cycle [6] 45% ~ 55% Start-Up Time 1 ms Max. Phase Jitter (12kHz~5MHz) 0.5 ps Max. [3][5] Aging (at 25ºC) ±3 ppm/year Max. Modulation Output Clock Mode Pin 1 selectable [1] Ordering options [2] Inclusive of frequency tolerance at 25°C, variations over operating temperature, supply voltage, load and 1st year aging at 25°C. [3] Modulation output clock mode is disabled. [4] Tr measure between 10% to 90%, Tf measure between 90% to 10% at 15pF load and VDD 1.8V~3.3V [5] Measure at 24MHz, VDD 1.8V [6] Measure at VDD /2 Page 1 REV: V1.3 Notice: The information in this document is subject to change without notice. www.lfc-semi.com LO204 Series Modulation Output Deviation Frequency (MHz) 20 24 25 27 VDD 1.8V ± 0.54 ± 0.62 ± 0.65 ± 0.70 [7], [8] Deviation range (%) @25ºC VDD 2.5V VDD 3.3V ± 0.36 ± 0.29 ± 0.42 ± 0.34 ± 0.45 ± 0.35 ± 0.54 ± 0.40 [7] The deviation range can vary by ±20% over voltage and temperature. [8] Modulation output mode is enabled, contact us for available frequencies and deviation range. Dimensions Pad Function 1 EN 2 GND 3 OUTPUT 4 VDD Suggested Layout (Unit: mm) Pin Definition Pin# Symbol 1 EN 2 3 4 GND OUTPUT VDD Functionality Modulation Output Clock Mode Enable Pin H (Logic "1") : Enable L (Logic "0") : Disable Internal pull-high resistor System ground reference Oscillator output System power supply Marking Duty Cycle Timing Output Rise/Fall Timing Temperature grade A Temperature range -40ºC ~ 125ºC Frequency stability (ppm) ±50 Page 2 REV: V1.3 Notice: The information in this document is subject to change without notice. www.lfc-semi.com LO204 Series Schematics Non-modulated clock output when R1=NC and, R2=0 ohm Non-modulated clock output when GPIO=Low Modulated clock output when R1=NC or 4.7K, R2=NC Modulated clock output when GPIO=High Ordering Information LO204 Product series A - 24M - Frequency in Hz Operating temperature range A : -40~125° C 50 - C Supply voltage A : 3.3V C : 1.8V Frequency stability 50: +/-50ppm Page 3 REV: V1.3 Notice: The information in this document is subject to change without notice. www.lfc-semi.com