SWPQ201BC3IXXE0-200.000000 数据手册
SWPQ201 Family of Low Phase
Noise Quartz-based PLL
Oscillators
SWPQ201
Datasheet
Description
Features
The SWPQ201 devices are low phase noise quartz-based PLL
oscillators supporting a large range of frequencies and output
interface
types. These devices are designed to operate at three different
power supplies and are available in multiple package sizes as well
as temperature grades.
▪ Frequency range: 10MHz to 1500MHz[1]
▪ Output types: LVDS, LVPECL, LVCMOS, VCXO
VCXO LVPECL, VCXO LVDS
▪ Supply voltage options: 2.5V, or 3.3V
▪ Phase jitter (12kHz to 5MHz): 2pS Max
▪ Package options:
With a patented one-time program (OTP) allowing for infinite
memory shelf life, the SWPQ201 devices can be programmed to
generate an output frequency from 10MHz to 1500MHz with a
resolution as low as 1Hz accuracy. The configuration capability of
this family of devices allows for fast delivery times for both
sample and large
production orders.
• 3.2 × 2.5 × 1.2 mm
• 5.0 × 3.2 × 1.2 mm
• 7.0 × 5.0 × 1.3 mm
▪ Frequency stability options: ±50, or ±100 ppm
• Operating temperature: -40°C to +85°C
▪ Frequency stability options: ±100 ppm
• Operating temperature: -40°C to +105°C
Pin Assignments
Note: To minimize power supply line noise, a 0.01μF bypass
capacitor should be placed between VDD (Pin 6) and GND (Pin 3).
E/D/ NC / VC 1
6 VDD
NC / E/D 2
5 OUT2 / NC
GND 3
4 OUT
Table 1. Pin Description
Pin #
Name
Description
E/D
NC
VC
Enable/Disable [a][b]
No connect
VCXO
2
NC
E/D
No connect
Enable/Disable [a][b]
3
GND
Connect to ground
4
OUT
Output
5
OUT2
NC
6
VDD
1
Complementary output
No connect
Supply voltage
[a] Pulled high internally = output enabled.
[b] Low = output disabled.
See Ordering Information for more details.
[1] There is a dead zone between 1037.5MHz to 1500MHz.
Contact support for frequencies above 1500MHz.
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SWPQ201 Datasheet
Ordering Information
SWPQ201
A
A
3
Family and ASIC
Output Type
Package
Precision
I
33
E
E
125.000000
D
Temperature Range
Voltage Supply
Feature Pin
Pull Range
Frequency
Packaging:
E : Output Enable
S: Standby
N: No Connect
V: Vcon
I: -40~+85℃
W:-40~+105℃
0 : Non
A: ±100 ppm
E: 8 mm Tape & 1ku reel
D: 8 mm Tape & 3ku reel
Y: 12/16 mm Tape & 1ku reel
Blank for Bulk
A: 7.0x 5.0 mm
B: 5.0 x 3.2 mm
C: 3.2 x 2.5 mm
A: LVPECL; Frequency:10MHz~1500MHz
B: LVDS ;Frequency:10MHz~1500MHz
C: LVCMOS;Frequency:10MHz~250MHz
D: VCXO;Frequency:10MHz~1500MHz
E: VCXO LVPECL;Frequency:10MHz~1500MHz
F: VCXO LVDS;Frequency:10MHz~1500MHz
2 5 : 2.5V
33: 3.3V
XX: 2.5V~3.3V
Frequency Code:xxx.xxxxxx
3: ±50 ppm
4: ±100 ppm
See table below for more details.
SWPQ201: Phase jitter RMS(12KHz~5MHz) 2pS Max
Table 2. Frequency Stability and Operating Temperature Decoder
“Precision” and “Temperature Range” Codes
Operating Temperature
“3” and “V”
Frequency Stability
Minimum
Maximum
Units
-40°C to +85°C
-50
+50
ppm
“4” and “V”
-40°C to +85°C
-100
+100
ppm
“3” and “W”
-40° to +105°C
-50
+50
ppm
“4” and “W”
-40° to +105°C
-100
+100
ppm
©2023 STARWAVE CORP.
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July 20, 2023
SWPQ201 Datasheet
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the device. The ratings, which are standard values for Starwave
commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Table 3. Absolute Maximum Ratings
Item
Rating
-0.5 to +5.0V
-0.5V to V DD + 0.5V
VDD
E/D
OUT
Storage Temperature
Maximum Junction Temperature
Core Current
Theta JA
Theta JB
-0.5V to V DD + 0.5V
-55°C to 125°C
105°C
30mA maximum(LVCMOS 10MHz~200MHz)
75.9 °C/W
JU6
48.6°C/W
JS6
89.6 °C/W
54.3 °C/W
ESD Compliance
Table 4. ESD Compliance
Human Body Model (HBM)
1000V
Mechanical Testing
Table 5. Mechanical Testing *
Parameter
Test Method
Mechanical Shock
Half-sine wave with 0.3ms 3000G. X, Y, Z each direction 1 time.
Mechanical Vibration
Frequency: 10 – 55MHz amplitude: 1.5mm.
Frequency: 55 – 2000Hz peak value: 20G.
Duration time: 4H for each X,Y,Z axis; total 12hours.
High Temp Operating Life (HTOL)
2000 hours at 125°C (under power).
Hermetic Seal
Gross leak (air leak test). Fine leak (Helium leak test) He-pressure: 6kgf/cm² 2 hours.
* MSL level does not apply.
Solder Reflow Profile
tP
10 seconds Max within 5°C of
260°C peak
260°C
225°C
Ramp up 3°C/s Max
50 ±10 seconds
above 225°C
reflow area
180°C
160°C
Ramp down not to
exceed 6°C/s
120 ±20 seconds in
pre-heating area
25°C
400 seconds Max from +25°C to 260°C peak
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Output Waveforms
Figure 1. LVDS Output Waveforms
Output Levels/Rise Time/Fall Time Measurements
TF
TR
OUTPUT 2
VOS
20% to 80%
VOD
OUTPUT 1
Oscillator Symmetry
VOH
OUTPUT 2
OUTPUT 1
VOL
½ Period
Period
Figure 2. LVPECL Output Waveforms
Rise Time/Fall Time Measurements
TF
TR
VOH
OUTPUT 2
20% to 80%
OUTPUT 1
VOL
Oscillator Symmetry
VOH
OUTPUT 2
OUTPUT 1
VOL
½ Period
Period
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Figure 3. VCXO Output Waveforms
Vout
Power
Supply
0.1µF
6
5
4
1
2
3
Test
Point
15pF
(including probe
and fixture
capacitance)
OE/ST Function
Vdd
Vc
tr
tf
90% Vdd
50%
10% Vdd
High Pulse
(TH)
Low Pulse
(TL)
Period
Note: Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 4. LVCMOS Output Waveforms
.
Rise Time/Fall Time Measurements
10% to 90%
20% to 80%
0V to VDD
10% to 90%
Rise Time
20% to 80%
Rise Time
90% to 10%
Fall Time
80% to 20%
Fall Time
Oscillator Symmetry
On Time
½ Period
Off Time
½ Period
50% V DD
Note:
Period
11. Duty Cycle is computed as Duty Cycle = TH/Period.
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Figure 5. VCXO LVPECL Output Waveforms
VDD
Z 0 = 50
OUT+
D+
Receiver Device
D rive D ev ice
Z0 = 5 0
OUT-
D50
50
V T T = V D D – 2.0 V
Figure 1. LVPECL Typical Termination
VDD
R1 = 100 to 150
OUT+
100 nF
Z0 = 50
D+
Receiver Device
Drive Device
100 nF
Z0 = 50
OUTR1
R1
D50
50
VTT
Figure 2. LVPECL AC Coupled Termination
VDD = 3.3V => R1 = R3 = 133 and
R2 = R4 = 82
VDD = 2.5V => R1 = R3 = 250 and
R2 = R4 = 62.5
VDD
R1
VDD
OUT+
R3
Z0 = 50
D+
Receiver
Device
Drive Device
OUT-
Z0 = 50
DR2
R4
Figure 3. LVPECL with Thevenin Typical Termination
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Figure 6. VCXO LVDS Output Waveforms
VDD
Z0 = 50
OUT+
D+
Receiver Device
100
Drive Device
Z0 = 50
OUT-
D-
Figure 4. LVDS Single Termination (Load Terminated)
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Dimensions
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Dimensions
©2023 STARWAVE CORP.
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SWPQ201 Datasheet
Dimensions
©2023 STARWAVE CORP.
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July 20, 2023
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