LP3980S-33B5F

Preliminary Datasheet LP3980S 500mA,Ultra-low noise, Small Package Ultra-Fast CMOS LDO Regulator General Description Features The LP3980S is designed for portable RF and wireless  1.6V- 5.5V Input Voltage Range  Low Dropout : 240mV @ 300mA for battery-powered systems to deliver ultra low noise  500mA Output Current and low quiescent current. Regulator ground current  High PSRR: -76dB at 1KHz  ＜1uA Standby Current When Shutdown ceramic capacitors, reducing the amount of board  Ultra-Fast Response in Line/Load transient space necessary for power applications, critical in  Current Limiting  Thermal Shutdown Protection  Available in SOT23-5 Package applications demanding performance and space requirements. The LP3980S performance is optimized increases only slightly in dropout, further prolonging the battery life. The LP3980S also works with low-ESR hand-held wireless devices. The LP3980S consumes less than 0.03µA in shutdown mode and has fast turn-on time less than 50µs. The other features include ultra low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. Order Information LP3980S F: Pb-Free Applications Package Type  Portable Media Players/MP3 players B5 : SOT23-5  Cellular and Smart mobile phone Output Voltage Type 33 : 3.3V  LCD  DSC Sensor Marking Information  Wireless Card Device Marking Shipping LP3980 LP3980S-33B5F 33YWX 3K/REEL Marking indication: Y:Year code .W: W is week code. X: X is series number. LP3980S-02 Sep.-2021 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 8 Preliminary Datasheet LP3980S Typical Application Circuit VIN VOUT VIN 1uF VOUT 1uF EN EN NC GND Functional Pin Description Package Type Pin Configurations SOT23-5 VIN 1 GND 2 EN 3 5 VOUT 4 NC SOT23-5 (Top View) Pin Description Pin No. Name 1 VIN Power Input voltage. 2 GND Ground. 3 EN Enable pin. 4 NC No connect. 5 VOUT LP3980S-02 Sep.-2021 Description Output voltage. Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 8 Preliminary Datasheet LP3980S Function Block Diagram Vin VOUT Current-Limit and Thermal Protection MOS Driver Shutdown and logic control + - EN NC VREF GND Absolute Maximum Ratings Note 1  Input to GND ------------------------------------------------------------------------------------------------------------ -0.3V to 6V  EN to GND -------------------------------------------------------------------------------------------------------------- -0.3V to 6V  Output Voltage to GND ----------------------------------------------------------------------------------- -0.3V to (VIN+0.3V)  Maximum Junction Temperature ----------------------------------------------------------------------------------------- 150℃  Operating Ambient Temperature Range (TA) --------------------------------------------------------------- -40℃ to 85℃  Maximum Soldering Temperature (At leads, 10 sec) --------------------------------------------------------------- 260℃ Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Information  Maximum Power Dissipation (SOT23-5, PD, TA=25℃) ----------------------------------------------------------- 400mW  Thermal Resistance (SOT23-5, θJA) -------------------------------------------------------------------------------- 250℃/W ESD Susceptibility  HBM(Human Body Mode) ---------------------------------------------------------------------------------------------------- 2KV  MM(Machine Mode) ---------------------------------------------------------------------------------------------------------- 200V LP3980S-02 Sep.-2021 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 8 Preliminary Datasheet LP3980S Electrical Characteristics VIN = VOUT + 1V, CIN = COUT = 1µF , TA = 25℃, unless otherwise specified. Symbol Parameter VIN Input Voltage VOUT Output Voltage IOUT = 1mA ΔVOUT Output Voltage Accuracy IOUT = 1mA ILIM Current Limit RLOAD = 1Ω 650 mA IQ Quiescent Current VEN ≥ 1.2V, IOUT = 0mA 20 μA IOUT = 200mA 160 200 mV IOUT = 300mA 240 300 mV IOUT = 500mA 400 500 mV 0.1 % 0.6 % VDROP Test Conditions Min Typ 1.6 Dropout Voltage Max 5.5 3.3 −1 Units -- VIN = (VOUT + 1V) to 5.5V, IOUT = V +1 % ΔVLINE Line Regulation ΔVLOAD Load Regulation 1mA < IOUT < 300mA ISTBY Standby Current VEN = GND, Shutdown 0.03 1 μA IIBSD EN Input Bias Current VEN = GND or VIN 0.1 1 uA 0.4 V Logic-Low VIL EN Threshold VIH Voltage Logic-High Voltage - PSRR 1mA Output Noise Voltage Power Supply f=217Hz Rejection Rate f=1KHz TSD LP3980S-02 VIN = 3V to 5.5V, Shutdown VIN = 3V to 5.5V, Start-Up f = 10Hz to 100kHz, IOUT = 0mA VOUT = 2.8V COUT = 1µF, IOUT = 50mA Thermal Shutdown Temperature Sep.-2021 1.4 Email: marketing@lowpowersemi.com V 100 uVRMS −80 dB −76 dB 150 ℃ www.lowpowersemi.com Page 4 of 8 Preliminary Datasheet LP3980S Typical Operating Characteristics Quiescent Current VS. Input Voltage Standby Current VS.Input Voltage 30 0.20 LP3980S-33B5F Load=0mA TJ=25℃ Quiescent Current(uA) 26 24 LP3980S-33B5F TJ=25℃ 0.18 Standby Current(uA) 28 22 20 18 16 0.16 0.14 0.12 0.10 0.08 0.06 14 0.04 12 0.02 0.00 10 3 3.5 4 4.5 Input voltage(V) 5 5.5 1.5 6 3.5 4.5 Input Voltage(V) 5.5 6.5 Dropout Voltage VS. Load Current Output Voltage VS.Input Voltage 450 3.4 LP3980S-33B5F Load=1mA TJ=25℃ 3.4 LP3980S-33B5F TJ=25℃ 400 350 Dropout Voltage(mV) 3.4 Output Voltage(V) 2.5 3.3 3.3 3.3 3.3 3.3 300 250 200 150 100 3.2 50 3.2 0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 0 Input Voltage(V) LP3980S-02 Sep.-2021 100 200 300 400 500 600 Load Current(mA) Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 8 Preliminary Datasheet LP3980S Applications Information Like any low-dropout regulator, the external capacitors used with the LP3980S must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1µF on the LP3980S input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements Enable Function The LP3980S features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.4 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the LP3980S have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. Thermal Considerations for minimum amount of capacitance and ESR in all Thermal protection limits power dissipation in LDOs designed LP3980S. When the operation junction temperature specifically to work with low ESR ceramic output exceeds 150℃, the OTP circuit starts the thermal capacitor performance shutdown function turn the pass element off. The consideration. Using a ceramic capacitor whose pass element turns on again after the junction value is at least 1µF with ESR is > 25mΩ on the temperature cools by 20℃. For continue operation, LP3980S output ensures stability. The LP3980S still do not exceed absolute maximum operation junction works well with output capacitor of other types due to temperature 125℃. application. in The LP3980S space-saving and is the wide stable ESR range. Output capacitor of larger capacitance can reduce noise and improve The power dissipation definition in device is : PD = (VIN−VOUT) x IOUT + VIN x IQ load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 The maximum power dissipation depends on the inch from the VOUT pin of the LP3980S and returned thermal resistance of IC package, PCB layout, the to a clean analog ground. rate of surroundings airflow and temperature difference between junctions to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) − TA ) / θJA LP3980S-02 Sep.-2021 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 6 of 8 Preliminary Datasheet LP3980S Where TJ(MAX) is the maximum operation junction temperature 125℃, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of LP3980S, where TJ(MAX) is the maximum junction temperature of the die (125℃) and TA is the maximum ambient temperature. The junction to ambient thermal resistance (θJA is layout dependent) for SOT23-5 package is 250℃/W. PD(MAX) = (125℃ − 25℃) / 250 = 400mW (SOT23-5) The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. LP3980S-02 Sep.-2021 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 8 Preliminary Datasheet LP3980S Packaging Information SOT23-5 A D A1 C B b 1.00 2.60 e H 0.95 0.6 L Recommended Land Pattern SYMBOL A A1 B b C D e H L LP3980S-02 Sep.-2021 MIN 0.889 0.000 1.397 0.28 2.591 2.692 0.080 0.300 Dimensions In Millimeters NOM 1.100 0.050 1.600 0.35 2.800 2.920 0.95BSC 0.152 0.450 Email: marketing@lowpowersemi.com MAX 1.295 0.152 1.803 0.559 3.000 3.120 0.254 0.610 www.lowpowersemi.com Page 8 of 8