EA9103D28T5R

500mA, Ulotra-Low IQ, Ultra-Fast LDO Regulator EA9103D Datasheet General Description The EA9103D is designed for portable RF and wireless applications with demanding performance and space requirements. The EA9103D performance is optimized for battery-powered systems to deliver ultra low quiescent current. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The EA9103D also works with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. The EA9103D consumes less than 0.1uA in shutdown mode. The other features include ultra low dropout voltage, high output accuracy, current limiting protection and high ripple rejection ratio. The EA9103D is available in the SOT23-5 and DFN 1x1-4L packages. Features           0.3uA Ultra-Low Quiescent Current 2V to 7V Input Voltage Range Low Dropout: 200mV@200mA 500mA Output Current 1.2V/1.8V/2.8V/2.5V/3.3V Output Voltage High PSRR: -70dB at 1KHz < 0.1uA Standby Current When Shutdown Fast Discharge Current Limiting and Thermal Shutdown Protection Available in SOT-23-5 and DFN 1x1-4L Packages Applications    Reference Power Portable Devices Bluetooth, Wireless Handsets Pin Configurations VOUT NC 5 4 VIN EN GND 1 2 3 VIN GND EN SOT23-5 1 VOUT GND DFN 1x1-4L Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. Ver. 1.0 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Pin Description Pin No. Pin Name Function Description SOT23-5 DFN 1x1-4L VIN Power input voltage pin. 1 4 GND Ground pin. 2 2, EP EN Enable pin. 3 3 NC Not Connect. 4 -- Output voltage pin. 5 1 VOUT Do not leave this pin floating. Function Block Diagram VIN VOUT Current Limit & Short Circuit Protection Error Amplifier EN Thermal Protection Bandgap GND Figure 1. EA9103D internal function block diagram Ver. 1.0 Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. 2 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Absolute Maximum Ratings Parameter Value Input Supply Voltage (VIN) -0.3V to +9V Output Voltage (VOUT) -0.3V to (VIN+0.3)V Output Current (IOUT) 550mA Lead Temperature (Soldering, 10 sec) +260°C Storage Temperature Range (TS) -55°C to +150°C ESD Susceptibility (HBM) 2kV ESD Susceptibility (MM) 200V Note (1):Stresses beyond those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to “Absolute Maximum Ratings” conditions for extended periods may affect device reliability and lifetime. Package Thermal Characteristics Parameter Value SOT-23-5/DFN 1x1-4L Thermal Resistance (θJC) 125°C/W SOT-23-5/DFN 1x1-4L Thermal Resistance (θJA) 220°C/W SOT-23-5/DFN 1x1-4L Power Dissipation at TA=25°C (PDmax) 0.55W Note (1): PDmax is calculated according to the formula: PDMAX=(TJMAX-TA)/ θJA. Recommended Operating Conditions Parameter Value Input Operating Voltage Range (VIN) +2V to +7V Ambient Temperature Range (TA) -40°C to +85°C Junction Temperature Range (TJ) -40°C to +125°C 3 Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. Ver. 1.0 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Electrical Characteristics VIN= VOUT +1V, VOUT = 3.3V, CIN= COUT =1uF, TA=25°C, unless otherwise noted Parameter Symbol Output Voltage Accuracy ΔVOUT Output Loading Current ILOAD Current Limit ILI M Short Circuit Current ISC Quiescent Current IQ Dropout Voltage VDROP Test Conditions IOUT = 1mA Min Typ -1.5 VEN = VIN, VIN >2.2V Max Unit 1.5 % 500 mA 550 mA RLOAD = 1Ω 90 mA VEN ≥ 1.2V, IOUT = 0mA 0.3 0.8 uA IOUT = 200mA, VOUT > 2.8V 220 260 mV IOUT = 300mA, VOUT > 2.8V 370 410 mV VIN = (VOUT+1V) to 7V, IOUT = 1mA 0.3 % Line Regulation ΔVLINE Load Regulation ΔLOAD 1mA < IOUT < 300mA 35 mV Standby Current ISTBY VEN = GND, Shutdown 0.1 uA 0.1 uA 0.4 V EN Leakage Current IEN EN Threshold Low Voltage VIL VIN = 3V to 5.5V, Shutdown EN Threshold High Voltage VIH VIN = 3V to 5.5V, Start-up 10Hz to 100kHz, IOUT = 200mA, COUT = 1uF Output Noise Voltage Power Supply Rejection Rate f = 1kHz Power Supply Rejection Rate f = 10kHz Thermal Shutdown Threshold PSRR TSD COUT = 1uF, IOUT = 100mA 1.2 V 100 uVRMS -70 dB -65 dB 165 °C Note (1): MOSFET on-resistance specifications are guaranteed by correlation to wafer level measurements. (2): Thermal shutdown specifications are guaranteed by correlation to the design and characteristics analysis. Ver. 1.0 Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. 4 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Application Circuit Diagram VIN VIN VOUT C1 1uF VOUT C2 1uF EN ON OFF GND EA9103D Figure 2. Typical application circuit diagram Ordering Information Part Number Package Type Packing Information EA9103DVVT5R SOT-23-5 Tape & Reel / 3000 EA9103DVVDGR DFN 1x1-4L Tape & Reel / 3000 Note (1): “VV”: Output voltage version code. (2): “T5/DG”: Package type code. (3): “R”: Tape & Reel. 5 Output Voltage Version Code 12 Output Voltage 1.2V 18 1.8V 28 2.8V 25 2.5V 33 3.3V Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. Ver. 1.0 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Typical Operating Characteristics Ver. 1.0 Line Regulation Load Regulation Dropout Voltage PSRR Load Transient Response Short Circuit Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. 6 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Application Information Like any low-dropout regulator, the external capacitors used with the EA9103D must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1uF on the EA9103D input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance that less than 0.5 inch from the input pin of the device to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The EA9103D is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1uF with ESR is > 25mΩ on the EA9103D output ensures stability. The EA9103D still works well with output capacitor of other types due to the wide stable ESR range. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability and PSRR. The EA9103D features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.2V. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4V. The EA9103D have a quick-discharge function to protecting the system. Thermal Considerations Thermal protection limits power dissipation in EA9103D. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turn on again after the junction temperature cools by 30°C. For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) - TA ) / θJA Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of EA9103D, the TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA for SOT23-5 package is 220°C/W. 7 Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. Ver. 1.0 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet Package Information SOT-23-5 Package A 4 5 B K D L 1 3 2 C M N C1 Top View Recommended Layout Pattern E H1 H G F H2 Side View Front View Unit: mm A Dimension Min Max 0.30 0.50 K Dimension Typ 1.40 B 2.65 2.95 L 1.40 C 0.85 1.05 M 0.95 C1 1.80 2.00 N 0.65 D 1.50 1.70 E 2.82 3.02 F 0.30 0.60 G 0.10 0.20 H 1.05 1.25 H1 1.05 1.15 H2 0.00 0.10 Symbol Ver. 1.0 Symbol Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. 8 EA9103D 500mA, Ultra-Low IQ, Ultra-Fast LDO Datasheet DFN 1mmx1mm-4L Package D 4 3 E 1 2 Top View Side View L3 b 3 4 L2 L E2 D2 A c D3 A1 E3 L4 L5 2 Side View e 1 Front View Unit: mm Symbol A A1 0.00 0.02 0.05 b 0.15 0.20 0.25 c Max 0.40 0.127 D 0.95 1.00 1.05 D2 0.38 0.48 0.58 D3 0.23 0.33 0.43 e 9 Dimension Nor Min 0.35 0.65 E 0.95 1.00 1.05 E2 0.38 0.48 0.58 E3 0.23 0.33 0.43 L 0.20 0.25 0.30 L2 0.103 L3 0.075 L4 0.208 L5 0.200 Copyright © 2019 Everanalog Integrated Circuit Limited. All Rights Reserved. Ver. 1.0