April, 2008, REV1.2
BCT4157/4157B
Low-Voltage, 2.8Ω SPDT Analog Switch
General Description
Features
The BCT4157/4157B is a high-bandwidth, fast
single-pole double-throw (SPDT) CMOS switch. It
can be used as an analog switch or as a low-delay
bus switch. Specified over a wide operating power
supply voltage range, 1.65V to 5.5V, the
BCT4157/4157B has a maximum ON resistance
of 5.1-ohms at 1.65V, 3.9-ohms at 2.3V &
2.85-ohms at 4.5V.
♦CMOS Technology for Bus and Analog
Applications
♦ Low ON Resistance: 3-ohms @ 2.7V
♦ Wide VCC Range: 1.65V to 5.5V
♦ Rail-to-Rail Signal Range
♦ Control Input Overvoltage Tolerance: 5.5V min.
♦ High Off Isolation: 57dB at 10MHz
♦ 54dB (10MHz) Crosstalk Rejection Reduces
Signal Distortion
♦ Break-Before-Make Switching
♦ High Bandwidth: 300 MHz
♦ Extended Industrial Temperature Range: –40°C
to 85°C
♦ Improved Direct Replacement for NC7SB4157
♦ Packaging (Pb-free & Green available):
Break-before-make switching prevents both
switches being enabled simultaneously. This
eliminates signal disruption during switching.
The control input, S, tolerates input drive signals
up to 5.5V, independent of supply voltage.
BCT4157/4157B
is
an
improved
direct
replacement for the FSA4157/NC7SB4157
Pin Description
Applications
Name
Cell Phones
PDAs
Portable Instrumentation
Battery Powered Communications
Computer Peripherals
S
Description
Logic Control
Vcc
Positive Power Supply
Connection Diagram(Top View)
A
Common Output/Data Port
SC70-6
B0
Data Port (Normally Closed)
GND
B1
Ground
Data Port
Logic Function Table
TDFN-6
S
1
6
B1
VCC
2
5
GND
A
3
4
B0
Logic Input (S)
Function
0
B0 Connected to A
1
B1 Connected to A
ORDERING INFORMATION
Ordering Code
Package Description
Temp Range
Top Marking
BCT4157EXT-TR
6-pin SC70
–40°C to +85°C
ABG
BCT4157BEXT-TR
6-pin TDFN 1.45X1
–40°C to +85°C
ABG
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April, 2008, REV1.2
Low-Voltage, 2.8Ω SPDT Analog Switch
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage VCC.........................................–0.5V to +7V
DC Switch Voltage (VS) (2).…….......…..–0.5V to VCC +0.5V
(2)
DC Input Voltage (VIN) .…..…….....….......–0.5V to +7.0V
DC VCC or Ground Current (ICC/IGND)..................±100mA
DC Output Current (VOUT) .......................................128mA
Storage Temperature Range (TSTG) ....... –65°C to +150°C
Junction Temperature under Bias (TJ) .......…............ 150°C
Junction Lead Temperature (TL)
(Soldering, 10 seconds) .................................... 260°C
Power Dissipation (PD) @ +85°C .............................180mW
RECOMMENDED OPERATING CONDITIONS
(3)
Supply Voltage Operating (VCC)………………1.65V to 5.5V
Control Input Voltage (VIN)………………………..0V to VCC
Switch Input Voltage (VIN)…………………………0V to VCC
Output Voltage (VOUT)…………………………….0V to VCC
Operating Temperature (TA)………………...–40°C to +85°C
Thermal Resistance (θJA)…………………………..350°C/W
Note 1:Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions beyond those indicated in the operational sections of
this specification is not implied.
Note 2:The input and output negative voltage ratings may be exceeded if the input and output diode current ratings
are observed.
Note 3:Control input must be held HIGH or LOW; it must not float.
DC ELECTRICAL CHARACTERISTICS (TA = - 40°C to +85°C)
Parameter
Description
VIAR
Analog Input
Signal Range
Test Conditions
Supply
Voltage
Temp (ºC)
Min.
VCC
TA = 25°C &
–40°C to 85°C
0
Typ
Max.
Unit
s
VCC
V
4.5
Ω
RON
ON
Resistance(4)
Iout = 100mA,
B0 or B1=1.5V
2.7V
TA = 25°C
RON
ON
Resistance(4)
Iout = 100mA,
B0 or B1=3.5V
4.5V
TA = 25°C
Iout = 100mA,
B0=B1=1.5V
2.7V
TA = 25°C
0.75
Ω
I(A) = -100mA; B0
or B1= 0V, 1.5V,
1.5V
2.7V
TA = 25°C
1.5
Ω
I(A) = -100mA; B0
or B1= 0V, 1.5V,
3.0V,
4.5V
TA = 25°C
0.5
Ω
∆RON
RONF
ON Resistance
Match
Between
Channels(4,5,6)
ON
Resistance(4,5,
7)
Flatness
RONF
ON
Resistance(4,5,
7)
Flatness
VIH
VIL
Input High
Voltage
Input Low
Voltage
Logic High Level
Logic Low Level
VCC =
1.65V to
1.95V
VCC =
2.3V to
5.5V
VCC =
1.65V to
1.95V
VCC =
2.3V to
5.5V
3
3
1.5
TA = 25°C &
–40°C to 85°C
V
1.7
0.5
V
0.8
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April, 2008, REV1.2
Low-Voltage, 2.8Ω SPDT Analog Switch
DC ELECTRICAL CHARACTERISTICS (TA = - 40°C to +85°C)
IIN
Input
Leakage
Current
IOFF
OFF State
Leakage
Current
ICC
Quiescent
Supply Current
VCC = 0V
to 5.5V
0 ≤VIN ≤5.5V
VCC =
5.5V
A=1V,4.5V,
B0 or B1=4.5V, 1V
All channels ON or
OFF, VIN = VCC or
GND,
IOUT = 0
VCC =
5.5V
TA = 25°C
±0.1
TA = –40°C to
85°C
±1.0
TA = 25°C
-2.0
2.0
TA = 25°C
µA
1
TA = –40°C to
85°C
10
Note 4: Measured by voltage drop between A and B pins at the indicated current through the device. ON resistance is
determined by the lower of the voltages on two ports (A or B)
Note 5: Parameter is characterized but not tested in production.
Note 6: DRON = RON max – RON min. measured at identical VCC, temperature and voltage levels.
Note 7: Flatness is defined as difference between maximum and minimum value of ON resistance over the specified
range of conditions..
Note 8: Guaranteed by design.
CAPACITANCE
Parameter
CIN
CIO-B
(12)
Test
Conditions
Description
Supply
Voltage
Temp (ºC)
Min.
Control Input
Typ
Max.
Units
2.3
VCC = 5.0V
For B Port,Switch OFF
TA = 25°C
pF
6.5
f= 1 MHz(12)
CIOA-ON
For A Port, Switch ON
18.5
SWITCH AND AC CHARACTERISTICS
Parameter
Description
Test Conditions
tPLH
tPHL
Propagation
Delay: A to
Bn
See test circuit
diagrams 1 and 2. VI
Open (10)
Supply Voltage
Temp (ºC)
Min.
VCC= 2.3V to 2.7V
VCC = 3.0V to 3.6V
TA = 25°C &
–40 to 85°C
tPZL
tPZH
0.8
7
23
3.5
13
VCC= 3.0V to 3.6V
2.5
6.9
VCC= 4.5V to 5.5V
1.7
5.2
VCC= 2.3V to 2.7V
TA = 25°C
VCC = 2.5V
tPZL
tPZH
OUTPUT
ENABLE
TURN
NOTIME:
A TO BN
See test circuit
diagrams 1 and 2.
VI = 2VCC for TPZL,
VI = 0V for tPZH
VCC = 3.3V
VCC = 3.0V to 3.6V
VCC = 4.5V to 5.5V
Units
0.3
VCC= 1.65V to
1.95V
diagrams 1 & 2. See
test circuit
VI = 2VCC for TPZL,
VI = 0V for tPZH
Max.
1.2
VCC= 4.5V to 5.5V
Output
Enable Turn
ON Time:
A to Bn
Typ
ns
24
TA = 25°C &
–40 to 85°C
14
7.6
5.7
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April, 2008, REV1.2
Low-Voltage, 2.8Ω SPDT Analog Switch
tPLZ
tPHZ
Output
Disable
Turn
OFF Time:
A to Bn
VCC = 1.65V to
1.95V
See test circuit
diagrams 1 and 2.
VI = 2VCC for TPZL,
VI = 0V for tPZH
3
12.5
2
7
VCC = 3.0V to 3.6V
1.5
5
VCC = 4.5V to 5.5V
0.8
3.5
VCC = 2.3V to 2.7V
TA = 25°C
VCC = 2.5V
tPLZ
tPHZ
Output
Disable
Turn
OFF Time:
A to Bn
See test circuit
diagrams 1 and 2.
VI = 2VCC for TPZL,
VI = 0V for tPZH
VCC = 3.3V
VCC = 3.0V to 3.6V
13
7.5
TA = –40 to
85°C
5.3
VCC = 4.5V to 5.5V
3.8
VCC = 2.5V
tBM
Break
Before
Make Time
See test circuit
diagram 9.(9)
VCC = 3.3V
VCC = 3.0V to 3.6V
0.5
TA = 25°C &
–40 to 85°C
VCC = 4.5V to 5.5V
Q
OIRR
Charge
Injection
CL = 0.1nF, VGEN =
0V, RGEN = 0Ω. See
test circuit 4.
Off Isolation
RL = 50Ω, VGEN = 0V,
RGEN = 0Ω. See test
circuit 5. (11)
VCC = 1.65V to 5.5V
0.5
0.5
0.5
VCC = 5.0V
7
TA = 25°C
VCC = 3.3V
pC
3
TA = 25°C
–57
dB
XTALK
Crosstalk
Isolation
See test circuit 6.
VCC = 1.65V to 5.5V
TA = 25°C
–54
f3dB
–3dB
Bandwidth
See test circuit 9
VCC = 1.65V to 5.5V
TA = 25°C
300
MHz
Note 6: Guaranteed by design
Note 7: Guaranteed by design but not production tested. The device contributes no other propagation delay other than
the RC delay of the switch ON resistance and the 50pF load capacitance, whne driven by an ideal voltage
source with zero output impedance.
Note 8: Off Isolation = 20 Log10 [ VA / VBn ] and is measured in dB.
Note 9: TA = 25°C, f = 1MHz. Capacitance is characterized but not tested in production.
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April, 2008, REV1.2
Low-Voltage, 2.8Ω SPDT Analog Switch
TEST CIRCUITS AND TIMING DIAGRAMS
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April, 2008, REV1.2
Low-Voltage, 2.8Ω SPDT Analog Switch
www.broadchip.com
April, 2008, REV1.2
Low-Voltage, 2.8Ω SPDT Analog Switch
Packaging Mechanical: 6-Pin SC70 (C)
Packaging Mechanical: 6-Pin TDFN
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