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TP5552-VR

TP5552-VR

  • 厂商:

    3PEAK(思瑞浦)

  • 封装:

    MSOP-8

  • 描述:

    精密放大器 MSOP-8

  • 数据手册
  • 价格&库存
TP5552-VR 数据手册
TP5551/TP5552 / TP5554 Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps   Features  Low Offset Voltage: 5 μV (Max)  Zero Drift: 0.05 µV/°C (Max)  1/f Noise Corner Down to 0.1Hz: - 15 nV/√Hz Input Noise Voltage @1kHz - 350 nVP-P Noise Voltage @0.1Hz to 10Hz  Slew Rate: 2.5 V/μs  Bandwidth: 3.5 MHz  Low Supply Current: 500 µA per Amplifier  Low Input Bias Current: 50 pA Typical  Rail-to-Rail Output Voltage Range  High Gain, CMRR, PSRR: 130 dB  7 kV HBM ESD Rating  –40°C to 125°C Operation Range Applications Description The TP555x op-amps are single/dual/quad chopper stabilized zero-drift operational amplifier optimized for single or dual supply operation from 1.8V to 5.5V and ±0.9V to ±2.75V. The TP555x features very low input offset voltage and low noise with 1/f noise corner down to 0.1Hz. The TP555x is designed to have ultra low offset voltage and offset temperature drift, wide gain bandwidth and rail-to-rail input/output swing while minimizing power consumption. The TP555x family can provide very low offset voltage (5μV Max.) and near-zero drift over time and temperature with excellent CMRR and PSRR. The TP5551 (single version) is available in SOT23, SC70 and SO-8 packages. The TP5552 (dual version) is offered in MSOP-8 and SO-8 packages. The TP5554 (quad version) is available in TSSOP-14 and SO-14 packages. All versions are specified for operation from -40°C to 125°C. 3PEAK and the 3PEAK logo are registered trademarks of 3PEAK INCORPORATED. All other trademarks are the property of their respective owners.  Medical Instrumentation      Temperature Measurements Precision Current Sensing ADC Drivers Process Control Systems Precision Voltage Reference Buffers Pin Configuration (Top View) Related Zero-Drift RRO Op-amps VOS (Max.) 10 μV 5 μV 5 μV GBWP 350 kHz 1.5 MHz 3.5 MHz Supply Current 34 μA 220 μA 500 μA eN at 1 kHz 55 nV/√Hz 25 nV/√Hz 15 nV/√Hz Single TP5531 TP5541 TP5551 Dual TP5532 TP5542 TP5552 Quad TP5534 TP5544 TP5554   Offset Voltage Distribution Population Of Amplifiers 35 30 25 20 15 10 5 www.3peakic.com Offset Voltage(μV) REV1.0 2.5 2 2.25 1.5 1.75 1 1.25 0 -1 -1.5 -1.25 -2 -1.75 -2.5              -2.25 0   1  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps  Pin Configuration (Top View)    Order Information Model Name TP5551 TP5551U TP5552 TP5554 Order Number Package Transport Media, Quantity Marking Information TP5551-TR SOT23-5 Tape and Reel, 3000 E51T TP5551-CR SC70-5 Tape and Reel, 3000 E51C TP5551-SR SO-8 Tape and Reel, 4000 E51S TP5551U-TR SOT23-5 Tape and Reel, 3000 E51U TP5551U-CR SC70-5 E51V TP5552-SR SO-8 Tape and Reel, 3000 Tape and Reel, 4000 E52S TP5552-VR MSOP-8 Tape and Reel, 3000 E52V TP5554-SR SO-14 Tape and Reel, 2500 E54S TP5552-TR TSSOP-14 Tape and Reel, 3000 E54T Absolute Maximum Ratings Note 1 Supply Voltage: .....................................................7V – + Current at Supply Pins……………............... ±50mA Input Voltage: ....................... ……V – 0.3 to V + 0.3 Operating Temperature Range.......–40°C to 125°C Input Current: +IN, –IN Note 2........................... ±20mA Maximum Junction Temperature................... 150°C Output Current: OUT...................................... ±60mA Storage Temperature Range.......... –65°C to 150°C Output Short-Circuit Duration Note 3 …....... Indefinite Lead Temperature (Soldering, 10 sec) ......... 260°C Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power supply, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. 2  REV1.0 www.3peakic.com          TP5551 / TP5552/TP5554 Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps ESD, Electrostatic Discharge Protection Symbol Parameter Condition Minimum Level Unit HBM Human Body Model ESD MIL-STD-883H Method 3015.8 7 kV CDM Charged Device Model ESD JEDEC-EIA/JESD22-C101E 2 kV Electrical Characteristics The denotes the specifications which apply over the full operating temperature range, TA = -40°C to +125°C . At TA = 27°C, VDD=5V, RL=10K, Vcm=VDD/2, unless otherwise noted. VDD=5V, PARAMETER SYMBOL VDD IQ CONDITIONS Supply Voltage Range Quiescent current per amplifier MIN TYP 1.8 IO = 0 500 dVOS/dT vs. Temperature PSRR vs. Power Supply VN(P-P) Input Voltage Noise VN Input Voltage Noise Density f = 1kHz 15 CIN Input Capacitor Differential Common-Mode 3 2 ±50 Input grounded, unity gain. ISC CL GBW SR tOR tS AVO Open-Loop Voltage Gain IOS VCM CMRR VO θJA Thermal Resistance Junction to Ambient 5.5 V 820 Input Offset Voltage Input Current Over temperature Input Offset Current Common-mode Voltage Range Common-mode Rejection Ratio Output Voltage Swing from Rail Over temperature Short-circuit Current Maximum Capacitive Load Unity Gain Bandwidth Slew Rate Overload Recovery Time Settling Time to 0.01% UNITS 590 Over temperature VOS IB MAX ±1 ±5 μV 0.008 0.05 μV/°C VS = +1.8V to +5.5V 0.5 f = 0.01Hz to 1Hz 0.1 f = 0.1Hz to 10Hz 0.35 ±100 (V-)-0.1 110 RL = 10kΩ RL = 10kΩ CL = 100pF G = +1, CL = 100pF G = -10 CL = 100pF (V-)+0.1V < VO < (V+)-0.1V, RL = 100kΩ SOT23-5 MSOP-8 SO-8 SC70-5 SO-14 TSSOP-14 100 μA μV/V μVPP nV/√Hz pF ±200 800 ±400 (V+)+0.1 130 5 10 10 ±60 pA pA V dB mV 1000 3.5 2.5 35 20 mA pF MHz V/μs μs μs 120 dB 200 210 158 250 83 100 °C/W   www.3peakic.com REV1.0 3  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps  Typical Performance Characteristics Offset Voltage Distribution Supply Current Distribution 35 Population Of Amplifiers 50 Population Of Amplifiers 45 40 35 30 25 20 15 30 25 20 15 10 10 5 5 2.5 2 2.25 1.5 1.75 1 1.25 0 -1 -1.5 Supply Curent(μA) -1.25 -2 -1.75 -2.5 0 500 510 520 530 540 550 560 570 580 590 600 -2.25 0 Offset Voltage(μV) Quiesent Current vs Temperature Voltage Noise Spectral Density vs Frequency 1000 100 900 Volage noise (nV/√Hz) 800 I Q(μV) 700 600 500 400 300 10 200 100 1 ‐50 ‐25 0 25 50 75 100 125 150 0.01 0.1 1 100 1k 10k CMRR vs FREQUENCY OPEN-LOOP GAIN vs FREQUENCY 120 140 100 90 100 120 80 80 100 70 60 50 40 40 CMRR(dB) 60 Phase(deg) Aol(dB) 10 Frequency (Hz) Temperature(°C) 30 20 80 60 40 20 0 20 10 ‐20 10 100 1k 10k 100k 1M 0 0 10M 1 Frequency(Hz)        10 100 1k 10k 100k 1M Frequency(Hz)     4  REV1.0 www.3peakic.com            TP5551 / TP5552/TP5554 Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps Typical Performance Characteristics(continue)                                                                         www.3peakic.com REV1.0 5  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps  TYPICAL APPLICATIONS                                             Single Supply, High Gain Amplifier, AV =  10,000 V/V                                                                                          Thermistor Measurement      6  REV1.0 www.3peakic.com          TP5551 / TP5552/TP5554 Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps Pin Functions -IN: Inverting Input of the Amplifier. +IN: Non-Inverting Input of Amplifier. OUT: Amplifier Output. The voltage range extends to within mV of each supply rail. V+ or +Vs: Positive Power Supply. Typically the voltage is from 1.8V to 5.5V. Split supplies are possible as long as the voltage between V+ and V– is between 1.8V and 5.5V. A bypass capacitor of 0.1μF as close to the part as possible should be used between power supply pins or between supply pins and ground. V- or -Vs: Negative Power Supply. It is normally tied to ground. It can also be tied to a voltage other than ground as long as the voltage between V+ and V– is from 1.8V to 5.5V. If it is not connected to ground, bypass it with a capacitor of 0.1μF as close to the part as possible. Operation The TP5551/2/4 op amps are zero drift, rail-to-rail operation amplifiers that can be run from a single-supply voltage. They use an auto-calibration technique with a time-continuous 3.5MHz op amp in the signal path while consuming only 550μA of supply current per channel. This amplifier is zero-corrected with an 150kHz clock. Upon power-up, the amplifier requires approximately 100μs to achieve specified Vos accuracy. This design has no aliasing or flicker noise. Applications Information Rail-To-Rail Input And Output The TP5551/2/4 feature rail-to-rail input and output with a supply voltage from 1.8V to 5.5 V. This allows the amplifier inputs to have a wide common mode range(50mV beyond supply rails)while maintaining high CMRR(120dB) and maximizes the signal to noise ratio of the amplifier by having the VOH and VOL levels be at the V+ and V- rails, respectively. Input Protection The TP5551/2/4 have internal ESD protection diodes that are connect between the inputs and supply rail. When either input exceeds one of the supply rails by more than 300mV, the ESD diodes become forward biased and large amounts of current begin to flow through them. Without current limiting, this excessive fault current causes permanent damage to the device.  Thus an external series resistor must be used to ensure the input currents never exceed 10mA (see Figure xx).       www.3peakic.com REV1.0 7  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps  Low Input Referred Noise Flicker noise, as known as 1/f noise, is inherent in semiconductor devices and increases as frequency decreases. So at lower frequencies, flicker noise dominates, causing higher degrees of error for sub-Hertz frequencies or dc precision application. The TP5551/2/4 amplifiers are chopper stabilized amplifiers, the flicker noise is reduced greatly because of this technique. This reduction in 1/f noise allows the TP5551/2/4 to have much lower noise at dc and low frequency compared to standard low noise amplifier. Residual voltage ripple The chopping technique can be used in amplifier design due to the internal notch filter. Although the chopping related voltage ripple is suppressed, higher noise spectrum exists at the chopping frequency and its harmonics due to residual ripple. So if the frequency of input signal is nearby the chopping frequency, the signal maybe interfered by the residue ripple. To further suppress the noise at the chopping frequency, it is recommended that a post filter be placed at the output of the amplifier. Broad Band And External Resistor Noise Considerations The total broadband noise output from any amplifier is primarily a function of three types of noise: input voltage noise from the amplifier, input current noise from the amplifier, and thermal (Johnson) noise from the external resistors used around the amplifier. These noise sources are not correlated with each other and their combined noise can be summed in a root sum squared manner. The full equation is given as: en total  [en2  4kTRs  (in  Rs ) 2 ]1/2 Where:     en= the input voltage noise density of the amplifier. in= the input current noise of the amplifier. RS= source resistance connected to the noninverting terminal. k= Boltzmann’s constant (1.38x10-23J/K). T= ambient temperature in Kelvin (K). The total equivalent rms noise over a specific bandwidth is expressed as: en ,rms  en total  BW   The input voltage noise density (en) of the TP555x is 55 nV/√Hz, and the input current noise can be neglected. When the source resistance is 190 kΩ, the voltage noise contribution from the source resistor and the amplifier are equal. With source resistance greater than 190 kΩ, the overall noise of the system is dominated by the Johnson noise of the resistor itself. High Source Impedance Application The TP5551/2/4 uses switches at the chopper amplifier input, the input signal is chopped at 125kHz to reduce input offset voltage down to 10µV. The dynamic behavior of these switches induces a charge injection current to the input terminals of the amplifier. The charge injection current has a DC path to ground through the resistances seen at the input terminals of the amplifier. Higher input impedance cause an apparent shift in the input bias current of the amplifier. Because the chopper amplifier has charge injection currents at each terminal, the input offset current will be larger than standard amplifiers. The Ios of TP5551/2/4 are 150pA under the typical condition. So the input impedance should be balanced across each input(see Figure xx). The input impedance of the amplifier should be matched between the IN+ and IN- terminals to minimize total input offset current. Input offset currents show up as an additional output offset voltage, as shown in the following equation: 8  REV1.0 www.3peakic.com TP5551 / TP5552/TP5554          Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps vos ,total  vos  R f  I os   For a gain configure using 1MΩ feedback resistor, a 150pA total input offset current will have an additional output offset voltage of 0.15mV. By keeping the input impedance low and balanced across the amplifier inputs, the input offset current effect will be suppress efficiently. Ri Rf Vref +2.5V TP5551 Rs Vout VIN -2.5V Rb Vref   Figxx Circuit Implication for reducing Input offset current effect PCB Surface Leakage In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. It is recommended to use multi-layer PCB layout and route the OPA’s -IN and +IN signal under the PCB surface. The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 2 for Inverting Gain application. 1. For Non-Inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the Common Mode input voltage. 2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op-amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface.   Figure www.3peakic.com The Layout of Guard Ring REV1.0 9  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps  Package Outline Dimensions SOT23-5 / SOT23-6       Symbol Dimensions Dimensions In Millimeters In Inches Min Max Min Max A1 0.000 0.100 0.000 0.004 A2 1.050 1.150 0.041 0.045 b 0.300 0.400 0.012 0.016 D 2.820 3.020 0.111 0.119 E 1.500 1.700 0.059 0.067 E1 2.650 2.950 0.104 0.116 e 10  REV1.0 0.950TYP 0.037TYP e1 1.800 2.000 0.071 0.079 L1 0.300 0.460 0.012 0.024 θ 0° 8° 0° 8° www.3peakic.com TP5551 / TP5552/TP5554          Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps Package Outline Dimensions SC-70-6 (SOT363)       Symbol Dimensions Dimensions In In Millimeters Inches Min Max Min Max A1 0.000 0.100 0.000 0.004 A2 0.900 1.000 0.035 0.039 b 0.150 0.350 0.006 0.014 C 0.080 0.150 0.003 0.006 D 2.000 2.200 0.079 0.087 E 1.150 1.350 0.045 0.053 E1 2.150 2.450 0.085 0.096 e www.3peakic.com 0.650TYP 0.026TYP e1 1.200 1.400 0.047 0.055 L1 0.260 0.460 0.010 0.018 θ 0° 8° 0° 8° REV1.0 11  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps  Package Outline Dimensions SO-8 (SOIC-8)   A2 C θ L1 A1 e E D Symbol E1 12  REV1.0 Dimensions In In Millimeters Inches Min Max Min Max A1 0.100 0.250 0.004 0.010 A2 1.350 1.550 0.053 0.061 b 0.330 0.510 0.013 0.020 C 0.190 0.250 0.007 0.010 D 4.780 5.000 0.188 0.197 E 3.800 4.000 0.150 0.157 E1 5.800 6.300 0.228 0.248 e b Dimensions 1.270 TYP 0.050 TYP L1 0.400 1.270 0.016 0.050 θ 0° 8° 0° 8° www.3peakic.com TP5551 / TP5552/TP5554          Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps Package Outline Dimensions MSOP-8 Dimensions Dimensions In In Millimeters Inches Min Max Min Max A 0.800 1.200 0.031 0.047 A1 0.000 0.200 0.000 0.008 A2 0.760 0.970 0.030 0.038 b 0.30 TYP 0.012 TYP C 0.15 TYP 0.006 TYP D 2.900 e 0.65 TYP E 2.900 3.100 0.114 0.122 E1 4.700 5.100 0.185 0.201   L1 0.410 0.650 0.016 0.026   θ 0° 6° 0° 6°   Symbol   E E1         e b   D     3.100 0.114 0.122 0.026 A1     R1 R     θ   L1   L L2                   www.3peakic.com REV1.0 13  TP5551 / TP5552/TP5554   Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps    Package Outline Dimensions TSSPO-14       Dimensions   E1 E       e   A A2   c D     Symbol In Millimeters MIN TYP MAX A - - 1.20 A1 0.05 - 0.15 A2 0.90 1.00 1.05 b 0.20 - 0.28 c 0.10 - 0.19 D 4.86 4.96 5.06 E 6.20 6.40 6.60 E1 4.30 4.40 4.50 e L A1     R1 R 0.65 BSC 0.45 0.60 L1 1.00 REF L2 0.25 BSC 0.75 R 0.09 - - θ 0° - 8° θ L1 14  REV1.0 L L2 www.3peakic.com TP5551 / TP5552/TP5554          Ultra Low Noise, 3.5MHz, RRIO Zero-Drift Op-amps Package Outline Dimensions SO-14 (SOIC-14)   Dimensions In Millimeters Symbol MIN TYP MAX A 1.35 1.60 1.75 A1 0.10 0.15 0.25 A2 1.25 1.45 1.65 b 0.36 D 8.53 8.63 8.73 E 5.80 6.00 6.20 E1 3.80 3.90 4.00 e L 0.49 1.27 BSC 0.45 0.60 L1 1.04 REF L2 0.25 BSC θ 0° 0.80 8°     www.3peakic.com REV1.0 15 
TP5552-VR 价格&库存

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TP5552-VR
  •  国内价格
  • 1+2.27650
  • 10+2.23150

库存:234

TP5552-VR
  •  国内价格
  • 1+3.11300
  • 100+2.48600
  • 750+2.21100
  • 1500+2.09000
  • 3000+1.99100

库存:2498