LN10X61Q1
LEN Technology LTD.
V1.1 - April 2022
60V, 0.6A/1A/1.5A, Synchronous Step-Down Regulator
FEATURES
DESCRIPTION
AEC-Q100 Grade 1 Qualified for automotive
applications
Wide VIN Range: 3.5V to 60V
±2%, 3.3V and 5V Fixed Outputs or 1V to VIN
Adjustable Output
Integrated both High-Side and Low-Side Power
MOSFETs with up to 1.5A Output Capability
Frequency Options: 400kHz, 1MHz, 2.1MHz
High Efficiency PFM Operation
Near 100% Duty Cycle Operation for Low Drop Out
Operation
Power Good Indicator
PLL Synchronization to External Clock
Accurate Peak and Valley Clamp
Internal Compensation
Output Short-Circuit Protection with Hiccup Mode
Accurate VIN UVLO Protection
Over-Temperature Shutdown and Recovery
Operating Junction Temperature -40˚C to 150 ˚C
Thermally Enhanced SOIC-EP8 Package (4.9mm X
3.9mm)
APPLICATIONS
The LN10X61Q1 is a high efficiency, compact,
synchronous step-down DC-DC converter employing a
constant frequency, peak current mode control
architecture with internal compensation. It operates
from an input voltage from 3.5V to 60V and integrates
both high-side and low-side power MOSFETs with up to
0.6A/1A/1.5A output capability. The nominal switching
frequency is fixed on 400kHz, 1MHz or 2.1MHz, or can be
synchronized to an external clock. Automatic frequency
foldback at light load improves efficiency.
The LN10X61Q1 with VOUT pin provides a fixed output
of 3.3V or 5V, and can achieve higher output accuracy,
minimum number of peripheral components as well as
lower quiescent current and higher system efficiency.
The LN10X61Q1 with FB pin provides an adjustable
output voltage from 1V to VIN.
Additional features such as precision enable, power good
indicator and internal soft start provide both flexible and
easy to use solutions for a wide range of applications. Full
protection features include input UVLO, over
temperature shutdown, cycle-by-cycle current limit, and
short-circuit protection.
Automotive Power Supplies
Industrial Power Supplies
Battery Powered Systems
100%
90%
80%
70%
VIN
VIN
CIN
EN/SYNC
GND
CVCC
BST
SW
L
VOUT
COUT
LN10X61Q1
VCC
CBST
RPG
PG
VOUT
Typical Application Diagram
Efficiency (%)
60%
50%
40%
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 36V
VIN = 60V
30%
20%
10%
0%
0.001
0.01
IOUT (A)
0.1
1
LN10161Q1-12-EFR, Effciency Curve
1
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LN10X61Q1
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Table of Contents
FEATURES ........................................................................................................................................................................ 1
APPLICATIONS ................................................................................................................................................................. 1
DESCRIPTION ................................................................................................................................................................... 1
REVISION HISTORY .......................................................................................................................................................... 3
PRODUCT AND ORDER INFORMATION ........................................................................................................................... 4
Product Information ................................................................................................................................................ 4
Order Information.................................................................................................................................................... 5
PIN CONFIGURATION ...................................................................................................................................................... 6
Pin Configuration ..................................................................................................................................................... 6
Pin Functions............................................................................................................................................................ 8
SPECIFICATIONS .............................................................................................................................................................. 9
Absolute Maximum Ratings ..................................................................................................................................... 9
ESD Ratings .............................................................................................................................................................. 9
Recommented Operating Condition ........................................................................................................................ 9
Package Thermal Parameters ................................................................................................................................ 10
Electrical Characteristics ........................................................................................................................................ 11
Typical Characteristics ........................................................................................................................................... 14
FUNCTIONAL DESCRIPTION ........................................................................................................................................... 19
Overview ................................................................................................................................................................ 19
Funtional Diagram ................................................................................................................................................. 20
Application Diagram with Full Features ................................................................................................................. 20
Funtional Description............................................................................................................................................. 21
APPLICATION INFORMATON ......................................................................................................................................... 25
Typical Applications ............................................................................................................................................... 25
LAYOUT ......................................................................................................................................................................... 26
Layout Guidelines .................................................................................................................................................. 26
PACKAGE INFORMATION .............................................................................................................................................. 28
Package Outline ..................................................................................................................................................... 28
Footprint Example ................................................................................................................................................. 29
IMPORTANT NOTICE AND DISCLAIMERS .............................................................................................................................. 30
ENVIRONMENTAL DECLARATION ......................................................................................................................................... 30
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REVISION HISTORY
Version
Change Description
Date
1.0
Initial Version
2022/01/25
1.1
Update Package Information ·························································································P28
2022/04/26
3
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PRODUCT AND ORDER INFORMATION
Product Information
Part
Number
Function
LN10061Q1ZXY
Fixed VOUT,
Adjustable
frequency
1: 3.3V
2: 5V
-: Normal
S: SST (2)
SOIC-EP8
Fixed VOUT,
Fixed
frequency,
PG
1: 3.3V,
400kHz
2: 5V, 400kHz
3: 3.3V, 1MHz
4: 5V, 1MHz
5: 3.3V,
2.1MHz
6: 5V, 2.1MHz
-: Normal
S: SST (2)
1
LN10161Q1ZXY
X
1: 1.5A, PFM
2: 1A, PFM
LN10261Q1ZXY
LN10361Q1ZXY
Adjustable
VOUT,
Adjustable
frequency
Adjustable
VOUT,
Fixed
frequency,
PG
3: 0.6A, PFM
Y
1: 400kHz
2: 1MHz
3: 2.1MHz
Top
Marking
Material
Package
/ Qty
Level-3260C
RoHS
Tape &
Reel /
3000
10061QZXY
SOIC-EP8
Level-3260C
RoHS
Tape &
Reel /
3000
10161QZXY
-: Normal
S: SST (2)
SOIC-EP8
Level-3260C
RoHS
Tape &
Reel /
3000
10261QZXY
-: Normal
S: SST (2)
SOIC-EP8
Level-3260C
RoHS
Tape &
Reel /
3000
10361QZXY
Z
IC
Package
MSLPeakTemp
（1）
（3）
（1） MSL (Moisture Sensitivity Level) and the highest solder temperature are based on JEDEC industrial standard.
（2） Part numbers with SPREAD SPECTRUM (SST) function.
（3） Top Marking:
Line 1: Product Mark Code
Line 2: Lot ID
Line 3: Date Code
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Order Information
Part Number
Output
Output Current
Frequency
PG
Spread
Spectrum
Package
Package
Qty
LN10161Q1-11-EFR
3.3V
1.5A
Fixed，400kHz
Yes
No
Tape & Reel
3000
LN10161Q1-12-EFR
5V
1.5A
Fixed，400kHz
Yes
No
Tape & Reel
3000
LN10261Q1-11-EFR
Adjustable VOUT
1.5A
Adjustable
Frequency
200k~2.5MHz
No
No
Tape & Reel
3000
LN10161Q1S11EFR
3.3V
1.5A
Fixed，400kHz
Yes
Yes
Tape & Reel
3000
LN10161Q1S12EFR
5V
1.5A
Fixed，400kHz
Yes
Yes
Tape & Reel
3000
LN10261Q1S11EFR
Adjustable VOUT
1.5A
Adjustable
Frequency
200k~2.5MHz
No
Yes
Tape & Reel
3000
5
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PIN CONFIGURATION
Pin Configuration
6.1.1 LN10061Q1 with VOUT and RT pins
SOIC-EP8 Top View
GND
1
VIN
2
8
SW
7
BST
THERMAL
PAD
EN/SYNC
3
6
VCC
RT
4
5
VOUT
6.1.2 LN10161Q1 with VOUT and PG pins
SOIC-EP8 Top View
GND
1
8
SW
VIN
2
7
BST
THERMAL
PAD
EN/SYNC
3
6
VCC
PG
4
5
VOUT
6
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6.1.3 LN10261Q1 with FB and RT pins
SOIC-EP8 Top View
GND
1
VIN
2
8
SW
7
BST
THERMAL
PAD
EN/SYNC
3
6
VCC
RT
4
5
FB
8
SW
7
BST
6.1.4 LN10361Q1 with FB and PG pins
SOIC-EP8 Top View
GND
1
VIN
2
THERMAL
PAD
EN/SYNC
3
6
VCC
PG
4
5
FB
7
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Pin Functions
Number
PIN Name
10061
10161
10261
10361
Type
1
GND
Ground
2
VIN
Power
3
EN/SYNC
Signal
PG
PG
Signal
4
RT
5
VOUT
RT
Signal
VOUT
Signal
FB
FB
Signal
6
VCC
Power
7
BST
Power
8
SW
Power
THERMAL
PAD
-
-
Description
Power ground. Connect the pin to ground plane.
Power supply input pin to high side power MOSFET and
VIN LDO regulator. Decouple this pin to GND with ceramic
capacitors.
Enable pin for VCC LDOs, regulator output, and input
voltage for VIN UVLO. Connect to VIN directly, to VIN
through a divider, or to an external voltage source. This
pin is also used for external clock synchronization.
Open-drain power good output. VFB is monitored and
when VFB is not within the regulation window. PG pin is
pulled low.
Switching frequency control pin. Place a resistor between
this pin and GND to set the switching frequency between
200kHz and 2.5MHz.
Output voltage feedback, connect to the system output
directly. This pin is also used as the second input of
internal LDO, decouple this pin to GND with ceramic
capacitors.
Output voltage feedback input. Use an external divider
to set the desired output voltage.
Voltage source that powers the gate drivers of the
internal power MOSFETs and control circuits. Must be
decoupled to GND with 1µF to 4.7µF ceramic capacitor.
This voltage source is provided by one of the two internal
LDO regulators with input from VIN or VOUT.
Bootstrapped supply to the high side gate driver.
Connect a 100nF to 470nF ceramic capacitor between
BST and SW pins.
Switch node connection from the internal power
MOSFETs to the external inductor.
Thermal dissipation pad. Solder to ground plane.
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SPECIFICATIONS
Absolute Maximum Ratings
Parameters
Min
Max
VIN to GND
-0.3
65
EN/SYNC to GND
-0.3
VIN
FB to GND
-0.3
5.5
VCC to GND
-0.3
5.5
PG to GND
-0.3
36
RT to GND
-0.3
5.5
VOUT to GND
-0.3
36
SW to GND
-1.0
VIN+0.3
SW to GND（Overshoot voltage less than 10ns）
-3.5
65
BST to SW
-0.3
5.5
Ambient Temperature
-40
125
Junction Temperature
-40
150
Storage Temperature
-65
150
Min
Max
Unit
V
˚C
ESD Ratings
Parameters
HBM Human Body Model
±3000
CDM Charge Device Model
±750
Unit
V
Recommented Operating Condition
Parameters
Min
Max
VIN
3.5
60
EN/SYNC
-0.3
VIN
FB
-0.3
1.1
PG
-0.3
30
IOUT （1.5A version）
0
1.5
IOUT （1.0A version）
0
1.0
IOUT （0.6A version）
0
0.6
Ambient temperature
-40
125
Junction temperature
-40
150
Unit
V
A
˚C
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Package Thermal Parameters
Parameters (1)
SOIC-EP8
Units
RθJA
Junction-to-Ambient Thermal Resistance
39
˚C/W
ψJT
Junction-to-Top Characterization Parameter
6
˚C/W
（1）Measurements are based on standard 2s2p PCB defined in JESD 51-7 2s2p，under no wind , 2W loss, and 25 ˚C
ambient temperature.
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Electrical Characteristics
Unless otherwise stated, the minimum and maximum limits are applied over the recommended operating junction
temperature range of -40˚C to 150˚C. Typical values are measured at 25˚C and represent the most likely norm. The default
conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz.
SYMBOL
PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE (VIN PIN)
VIN
Operating Input Voltage
Range
IQ-5V-PFM
During Regulation in PFM
VEN = 5V, VIN = 24V, IOUT = 0A
19
µA
IQ-3.3V-PFM
During Regulation in PFM
VEN = 5V, VIN = 24V, IOUT = 0A
12
µA
IQ-ADJ-PFM
During Regulation in PFM
VEN = 5V, VIN = 24V, IOUT = 0A
70
µA
ISHDN
Shutdown Quiescent Current
VEN = 0V, VIN = 24V
1.2
µA
3.5
60
V
FB PIN
VFB
IQ-FB
VIN = 3.5V to 60V, TJ = 25˚C
Regulated Feedback Voltage
VIN = 3.5V to 60V,
in CCM Mode
TJ = 25˚C to 150 ˚C
Feedback Input Leakage
VFB = 1V
Current
0.992
1
1.008
V
0.98
1
1.02
V
0
100
nA
4.96
5
5.04
V
4.9
5
5.1
V
3.27
3.3
3.33
V
3.23
3.3
3.37
V
VOUT PIN
VVOUT-5V
VVOUT-3.3V
Regulated VOUT Voltage
Regulated VOUT Voltage
Full VIN Range, Full Load Range,
@25˚C
Full VIN Range, Full Load Range,
Full Operational Temperature
Range
Full VIN Range, Full Load Range,
@25˚C
Full VIN Range, Full Load Range,
Full Operational Temperature
Range
PWM (1)
TON-MIN
Minimum ON Time
Guaranteed by design
150
ns
TOFF-MIN
Minimum OFF Time
Guaranteed by design
250
ns
IOUT = 0.5A, VBST - VSW = 5V
346
650
mΩ
IOUT = 0.5A, VCC = 5V
200
400
mΩ
POWER MOSFETS (2)
RDSON-HS
RDSON-LS
High Side MOSFET ON
Resistance
Low Side MOSFET ON
Resistance
(1) Guaranteed by design.
(2) Measured at pins.
11
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Electrical Characteristics（Continued）
Unless otherwise stated, the minimum and maximum limits are applied over the recommended operating junction
temperature range of -40˚C to 150˚C. Typical values are measured at 25˚C and represent the most likely norm. The default
conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz.
OSCILLATOR (3)
FS-400kHz
PWM Switching Frequency
VIN = 24V, VOUT = 5V
320
400
480
kHz
FS-1000kHz
PWM Switching Frequency
VIN = 24V, VOUT = 5V
1000
kHz
FS-2100kHz
PWM Switching Frequency
VIN = 12V, VOUT = 5V
2100
kHz
RT (RT PIN) (4)
FS-RT-400kHz
PWM Switching Frequency
FS-RT-1000kHz
PWM Switching Frequency
FS-RT-2500kHz
PWM Switching Frequency
VIN = 24V, VOUT = 5V, RT =
232kOhm
VIN = 24V, VOUT = 5V, RT =
71.5kOhm
VIN = 12V, VOUT = 5V, RT =
12.4kOhm
320
400
480
kHz
1000
kHz
2500
kHz
SPREAD SPECTRUM (SST) (5)
%ΔFS
FSST
Spread Spectrum Modulation
Frequency Range
Spread Spectrum Modulation
Frequency
-17
%
16
kHz
ENABLE VIN UVLO (EN PIN)
ENVOUT-ON
VIN UVLO Rising Threshold
VEN Rising
ENVOUT-HYS
VIN UVLO Hysteresis
VEN Falling
ENVCC-ON
VEN High-Level Threshold
VEN Rising
ENVCC-OFF
VEN Low-Level Threshold
VEN Falling
IQ-EN
EN Pin Current
VEN = 3.3V
1.9
2.08
2.25
250
V
mV
1.8
V
0
0.4
V
0.2
µA
INTERNAL VCC LDOS (VCC, VIN, VOUT PINS)
VCC-TARGET
VCC Regulation Target
4.75
V
9
µs
BOOTSTRAP (BST PIN) (1)
tON-MAX
Auto-Refresh Period
INTERNAL SOFT START (6)
tSS-INT
(3)
(4)
(5)
(6)
Internal Soft-Start Time
6.6
10
ms
This parameter is for LN10161Q1ZXY and LN10361Q1ZXY both with internal fixed frequency.
This parameter is for LN10061Q1ZXY and LN10261Q1ZXY both with externally adjustable frequency
This parameter is only available on part numbers with spread spectrum function.
Measured from ENVOUT-ON to internal soft start completed.
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Electrical Characteristics（Continued）
Unless otherwise stated, the minimum and maximum limits are applied over the recommended operating junction
temperature range of -40˚C to 150˚C. Typical values are measured at 25˚C and represent the most likely norm. The default
conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz.
OVER CURRENT PROTECTION (7)(8)
IPEAK-1.5A
IVALLEY-1.5A
IPEAK-1.0A
IVALLEY-1.0A
IPEAK-0.6A
IVALLEY-0.6A
Peak Current Limit
Threshold
Valley Current Limit
Threshold
Peak Current Limit
Threshold
Valley Current Limit
Threshold
Peak Current Limit
Threshold
Valley Current Limit
Threshold
VIN = 24V, VOUT = 5V
1.75
2.2
2.5
A
VIN = 24V, VOUT = 5V
1.15
1.6
1.95
A
VIN = 24V, VOUT = 5V
1.6
A
VIN = 24V, VOUT = 5V
1.1
A
VIN = 24V, VOUT = 5V
1.0
A
VIN = 24V, VOUT = 5V
0.65
A
POWER GOOD (PG and FB PINs)
%VPG-OV
Power Good Over-Voltage
Rising Threshold
VFB Ramping Up
%VPG-OV-HYS
Power Good Over-Voltage
Recovery Hysteresis
% Of PG Voltage
%VPG-UV
Power Good Under-Voltage
Falling Threshold
VFB Ramping Down
%VPG-UV-HYS
Power Good Under-Voltage
Recovery Hysteresis
% Of PG Voltage
3.7
IPG = 1mA， VEN = 3.3V
40
VPG-PD
tPG-RISING
tPG-FALLING
Power Good Pull-Down
Strength
Power Good Flag Rising
Delay
Power Good Flag Falling
Delay
105
110
115
5.5
82
87
%
%
92
%
%
100
mV
300
µs
310
µs
170
˚C
-10
˚C
THERMAL SHUTDOWN (1)
OT
OTHYS
Thermal Shutdown
Threshold
Thermal Shutdown
Recovery Hysteresis
(7) This current limit was tested as the internal comparator trigger point, the current limits measured in a closed loop
application may be different.
(8) Subscripts indicate different output current capabilities in the product family.
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Typical Characteristics
7.6.1 Characteristics Over Temperature
Unless otherwise stated, the test conditions are the same as Chapter 7.5. TJ = -40˚C to 150˚C.
120
18
Tj = 150C
100
Tj = 25C
10
ISHDN(uA)
Iq (uA)
Tj = -40C
12
60
8
40
6
4
20
0
Tj = 25C
14
Tj = -40C
80
Tj = 150C
16
2
0
10
20
30
VIN (V)
40
50
0
60
0
10
LN10161Q1-12, EN = 5V, VOUT = 5V, No load
Figure 1. Operating Quiescent Current IQ
20
30
VIN (V)
40
50
60
LN10161Q1-12, VEN = 0V
Figure 2. Shutdown Current ISHDN
2.6
2.4
2.4
2.2
2
2
Current Limit (A)
Current Limit (A)
2.2
1.8
1.6
1.8
1.6
1.4
1.4
IPEAK
1.2
1.2
IPEAK
IVALLEY
1
0
10
20
30
40
50
VIN (V)
LN10161Q1-12, PFM, FS = 400kHz, VOUT = 5V
Figure 3. Peak Current and Valley Current Limit Vs. VIN
60
1
IVALLEY
-50
-25
0
25
50
75
Temperature (OC)
100
125
150
LN10161Q1-12, PFM, FS = 400kHz, VOUT = 5V
Figure 4. Peak Current and Valley Current Limit Vs. Temperature
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7.6.2 Typical Characteristics
100%
5.1
90%
5.09
80%
5.08
70%
5.07
60%
5.06
VOUT (V)
Efficiency (%)
Unless otherwise stated, the test conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz, L = 15µH, COUT = 47uF, TA = 25˚C.
50%
40%
20%
10%
0%
0.001
0.01
IOUT (A)
0.1
5.04
5.03
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 36V
VIN = 60V
30%
5.05
5.02
5.01
5
0.001
1
5.08
80%
5.06
70%
5.04
60%
5.02
50%
40%
VIN = 12V
30%
VIN = 24V
20%
VIN = 40V
10%
VIN = 60V
0.1
1
VOUT (V)
Efficiency (%)
5.1
90%
IOUT (A)
0.1
1
LN10161Q1-12, PFM, FS = 400kHz, VOUT = 5V
Figure 6. Load Regulation
100%
0.01
0.01
IOUT (A)
LN10161Q1-12, PFM, FS = 400kHz, VOUT = 5V
Figure 5. Efficiency Curves
0%
0.001
VIN = 12V
VIN = 18V
VIN = 24V
VIN = 36V
VIN = 60V
5
4.98
VIN = 12V
4.96
VIN = 24V
4.94
VIN = 40V
4.92
VIN = 60V
4.9
0.001
LN10161Q1-16, PFM, FS = 2.1MHz, VOUT = 5V
Figure 7. Efficiency Curves
0.01
0.1
1
IOUT (A)
LN10161Q1-16, PFM, FS = 2.1MHz, VOUT = 5V
Figure 8. Load Regulation
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7.6.3 Typical Waveforms
Unless otherwise stated, the test conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz, L = 15µH, COUT = 47uF, TA = 25˚C.
.
Time (2 µs/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = 1.5A
Figure 9. Switching Waveform in CCM Operation
Time (20 ms/DIV)
LN10161Q1-12, VIN = 24V, IOUT = 0A
Figure 10. Switching Waveform in PFM Operation
Time (2 µs/DIV)
LN10161Q1-12, VIN = 24V, IOUT = 200mA
Figure 11. Switching Waveform in DCM Operation
Time (20 µs/DIV)
LN10161Q1-12, VIN = 5V, IOUT = 1.5A
Figure 12. Switching Waveform in Dropout Operation
Time (5 µs/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = 1.5A
Figure 15. Sync to External Clock
Time (50 µs/DIV)
LN10161Q1S12, FS = 400kHz, IOUT = 1.5A
Figure 16. Spread Spectrum
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Typical Waveforms（Continued）
Unless otherwise stated, the test conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz, L = 15µH, COUT = 47uF, TA = 25˚C.
Time (2 ms/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = 1A
Figure 15. Startup through EN
Time (200 µs/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = 1A
Figure 16. Shutdown through EN
Time (20 ms/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V
Figure 17. Startup through VIN
Time (20 ms/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V
Figure 18. Shutdown through VIN
Time (2 ms/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = 1A
Figure 19. Startup with Pre-Charged Voltage
Time (50 µs/DIV)
LN10161Q1-12, FS = 400kHz, IOUT = 1.5A
Figure 20. VIN Transient 12V 36V, Slew Rate = 3V/µs
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Typical Waveforms（Continued）
Unless otherwise stated, the test conditions are applied: VIN = 24V, VOUT = 5V, FS = 400kHz, L = 15µH, COUT = 47uF, TA = 25˚C.
Time (100 µs/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V
Figure 21. Load Transient 0A 1.5A, Slew Rate = 0.1A/µs
Time (2 ms/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = 1.5A to SCP
Figure 23. Into Output Short and Hiccup
Time (100 µs/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V
Figure 22. Load Transient 0.5A 1.5A, Slew Rate = 0.1A/µs
Time (5 ms/DIV)
LN10161Q1-12, FS = 400kHz, VIN = 24V, IOUT = SCP to 1.5A
Figure 24. Out of Output Short and Recovery
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LN10X61Q1
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FUNCTIONAL DESCRIPTION
Overview
The LN10X61Q1 is a high efficiency, compact, synchronous step-down DC-DC converter employing a constant frequency,
peak current mode control architecture with internal compensation. It operates from an input voltage from 3.5V to 60V
and integrates both high-side and low-side power MOSFETs with up to 0.6A/1A/1.5A output current capabilities. The
LN10X61Q1 with FB pin provides an adjustable output voltage from 1V to VIN. In addition, the LN10X61Q1 with VOUT pin
provides a fixed output of 3.3V or 5V and enables higher accuracy and minimum peripheral components as well as lower
quiescent current.
The LN10X61Q1 has three switching frequency options: 400kHz, 1MHz and 2.1MHz, and can be synchronized to an
external clock ranging from 200kHz to 2.5MHz. The LN10X61Q1 with RT pin features an adjustable switching frequency
through an external resistor connected between RT pin and GND pin. With a small minimum on-time, it enables a compact
solution with small inductor and capacitor size and offers constant-frequency operation with high step-down ratio.
Moreover, the LN10X61Q1 achieves the lowest possible dropout voltage with near 100% maximum duty cycle operation.
During light load operation, LN10X61Q1 operates at DCM and PFM to maximize efficiency.
The LN10X61Q1 also features programmable output voltage, internal soft start, and a wide array of protection functions
such as cycle-by-cycle peak current limit, output short- circuit protection with hiccup mode, over temperature shutdown
and recovery, and adjustable system UVLO.
The LN10X61Q1 offers a spread spectrum feature to optimize EMI performance. Emissions at the operating frequency and
its sub-harmonics are mitigated by spreading the single-point operating frequency over an extended range.
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Funtional Diagram
PG
EN
RT
ENABLE
VFB
VCC
BIAS
LDO
VOUT
PG
DETECTOR
VCC
LDO
VIN
OSC
UVLO
HICCUP
BST
SWITCH
VCC
PFM
BST
STATE MACHINE
TSD
REF
VREF
+
-
SS
FB
VFB
HSON
SHDN
+
-
+
-
EA
VOUT
SLOPE
COMP
+
-
ILIM-VALLEY
+
-
PWM
LOGIC
SW
LSON
VCC
GND
Application Diagram with Full Features
VIN
VIN
CIN
EN/SYNC
GND
CVCC
BST
SW
L
VOUT
COUT
LN10X61Q1
VCC
CBST
RPG
PG
VOUT
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Funtional Description
8.4.1 Voltage Regulation Loop and FB/VOUT pin
The LN10X61Q1 employs a peak current mode Control to regulate the output voltage. For highly efficient operation cross
the whole load range, the LN10X61Q1 utilizes Discontinuous Conduction Mode (DCM) and Pulse Frequency Modulation
(PFM) at light load.
To adjust the output voltage, connect a voltage divider between VOUT and GND, and connect the center of the divider to
FB pin. The steady state VFB is typically 1V. The output voltage can be derived from:
VOUT = (1 +
R FBT
) × VFB
R FBB
Based on the output voltage requirements, the above equation can be re-written as:
R FBB =
VFB
× R FBT
VOUT − VFB
In general, RFBT < 1MΩ is recommended. The tolerance of the divider resistance should be less than 1%，and the
temperature coefficients should be less than 100ppm.
The LN10X61Q1 uses an internal compensation scheme to stabilize the control loop, an external RC lead compensation
network can be connected between VOUT and FB to improve transient response. An external lead compensation can be
achieved by adding a capacitor in parallel with the upper leg resistor of the voltage divider between VOUT and FB pin.
The zero frequency of the external lead compensator is at:
fz =
1
2π × R FBT × CLEAD
While the pole frequency of the external lead compensator is at:
fp =
1
2π × (R FBT //R FBB ) × CLEAD
The added external lead compensator can potentially increase the loop gain by (1 +
RFBT
RFBB
).
For the fixed VOUT products, there is no external divider, connect VOUT pin to system output directly. The VOUT pin is
also used as the second input of internal LDO, decouple this pin to GND with ceramic capacitors.
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8.4.2 Internal LDO and VCC Pin
VCC powers the internal control circuits and the gate drivers for the internal power MOSFETs. VCC must be decoupled to
GND with a 1µF to 4.7µF ceramic capacitor.
8.4.3 VIN UVLO and EN/SYNC Pin
EN pin turns on and off the switching regulator and internal VCC LDO. When the voltage on EN pin is below ENVCC-OFF, it
shuts down VCC LDO and the chip goes into shutdown mode. When the voltage on EN pin is above ENVCC-ON, it turns on VCC
LDO.
When EN rises above a precise threshold, ENVOUT-ON, it turns on the switching regulator. In order to achieve an accurate
system VIN UVLO function, an enable divider can be added between VIN and GND. The switching regulator can thus be
turned on at the programmable precise input voltage level, which is determined by:
VIN−RISING = (1 +
R ENT
) × ENVOUT−ON
R ENB
8.4.4 Synchronization to External Clock and EN/SYNC Pin
LN10X61Q1 is capable of being synchronized to an external clock between 200kHz to 2.5MHz. Connect the external clock
signal to EN/SYNC pin.
8.4.5 Switching Frequency and RT Pin
The LN10X61Q1 has three fixed frequency options: 400kHz, 1MHz and 2.1MHz. Meanwhile, the switching frequency of
the LN10X61Q1 with RT pin can be programmable between 200kHz to 2.5MHz by an external resistor connected between
RT pin and GND pin.
RRT is calculated from:
R RT (kΩ) =
152504
− 23
FS (kHz)1.069
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RRT vs. Switching frequency is plotted as:
500
450
400
RRT(kΩ)
350
300
250
200
150
100
50
0
0
500
1000
1500
2000
2500
FS(kHz)
The following table lists some typical switching frequency and corresponding RRT.
RRT（kΩ）
12.4
22.1
38.3
71.5
178
232
499
FS（kHz）
2500
2000
1500
1000
500
400
200
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8.4.6 Power Good and PG Pin
The PG pin is connected to the open drain of an internal N-MOSFET. Externally, the PG pin needs to be pulled up to a
voltage source by a resistor. PG goes high when VEN is high and the feedback voltage VFB is within the power good window
defined by PG rising threshold and PG falling threshold. There is a power good rising delay TPG-RISING of 320µs in response
to VFB voltage going into the power good window and a power good falling delay TPG-FALLING of 320µs in response to VFB
voltage going outside of the window. PG pin immediately goes low when VEN goes low.
8.4.7 Over-Current Protection
Peak Current Protection
Peak current protection is a cycle-by-cycle protection inherited from the peak current mode control. The peak current is
clamped to the peak current limit threshold.
Valley Current Protection
During the low side conduction, the low side power MOSFET current is sensed and compared to the valley current
threshold. When the low side current is higher than the valley current threshold, the high side power MOSFET is not
allowed to turn on for the next cycle.
Hiccup Mode
When low side current is higher than the valley current threshold for 32 cycles, it shuts down the switching regulator. The
switching regulator automatically turns back on after 5ms if EN is high. During the shutdown period, the soft start ramp
capacitor is discharged by an internal FET; when the switching regulator turns back on, the regulator goes through the soft
start process.
8.4.8 Thermal Shutdown and Auto-Recovery
When the junction temperature exceeds 170˚C, LN10X61Q1 shuts down the switching regulator to reduce thermal
dissipation. It automatically restarts the switching regulator after the junction temperature drops back below 160 ˚C. The
VCC LDO regulator remains operational during over-temperature event.
8.4.9 Bootstrap Voltage, BST, and SW Pins
The internal gate driver for the high side Power MOSFET uses a bootstrapped supply from an external capacitor CBST. CBST
connects between BST pin and SW. The voltage on CBST is charged from VCC through an internal switch when the low side
power MOSFET conducts.
8.4.10 Low Drop-Out Operation
When input voltage is close to the output target voltage, LN10X61Q1 enters Low Drop-Out mode. The high-side MOSFET
can be turned on for more than a switching period to maintain the output voltage regulation. When the input voltage is
lower than the target voltage, the high-side power MOSFET is turned on for maximum allowable on time: tON-MAX. The lowside power MOSFET turns on briefly for TOFF-MIN to refresh the charge on CBST.
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APPLICATION INFORMATON
Typical Applications
9.1.1 Fixed output 3.3V or 5V with adjustable switching frequency
VIN
VIN
CIN
BST
EN/SYNC
GND
LN10061Q1
CVCC
VCC
L
CBST
SW
VOUT
COUT
RT
RT
VOUT
CBIAS
9.1.2 Fixed output 3.3V or 5V with PG pin
VIN
VIN
CIN
BST
EN/SYNC
GND
VOUT
COUT
LN10161Q1
CVCC
L
CBST
SW
RPG
PG
VCC
VOUT
CBIAS
9.1.3 Adjustable output with PG pin
VIN
VIN
CIN
BST
EN/SYNC
GND
L
VOUT
COUT
LN10361Q1
CVCC
CBST
SW
RPG
RFBT
PG
VCC
FB
RFBB
9.1.4 Adjustable output and adjustable switching frequency
VIN
VIN
CIN
GND
CVCC
BST
EN/SYNC
LN10261Q1
VCC
CBST
SW
L
VOUT
COUT
RT
RT
RFBT
FB
RFBB
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LAYOUT
The performance of any switching converter depends as much upon the layout of the PCB as the component selection.
The LN10X61Q1 is designed to meet the optimization requirements of PCB layout in the pin assignment. For example, VIN
and GND pins are adjacent to each other, which is convenient for placing VIN bypass capacitors.
Layout Guidelines
Radiated EMI is generated by the high di/dt components in pulsing currents in switching converters. The larger area
covered by the path of a pulsing current; the more electromagnetic emission is generated. As shown in the figure below,
this part of the current flows from the VIN side of the input capacitors to high side switch, to the low side switch, and then
returns to the ground of the input capacitors.
The key to minimize radiated EMI is to minimize the area of this pulsing current path, thus, placing high frequency ceramic
bypass capacitor(s) as close as possible to the VIN and GND pins is necessary.
In addition, high dv/dt occurs on SW node during switching, so the trace between SW pin and inductor should be as short
as possible, and just wide enough to carry the load current without excessive heating. Short and thick traces are highly
recommended to minimize parasitic resistance. Besides, sensitive signal lines should be kept away from SW traces.
VIN
CIN
VIN
ICIN
high di/dt
PGND
LN10X61Q1
SW
L
VOUT
VSW
high dv/dt
COUT
PGND
The following guidelines are provided to help users design a PCB with the best power conversion performance, thermal
performance, and minimized generation of unwanted EMI.
1.
2.
3.
4.
5.
Place high frequency ceramic bypass CIN as close as possible to the LN10X61Q1 VIN and GND pins; a ceramic capacitor
in small package (such as 0603) is still needed even if multiple input capacitors are implemented;
The high-current loop consisting of VIN, VOUT and GND should be as compact as possible;
The bypass capacitors of VOUT and VCC should be arranged close to the pin, and return to the GND pin with the
shortest connection;
It is recommended to use a four-layer board with 2oz top and bottom layers, and a dedicate ground plane on middle
layer. Use a minimum 3 by 4 arrays of 10 mil thermal vias to connect the thermal pad of LN10X61Q1 to the system
ground plane for heat sinking purpose;
The SW and BST nodes contains a lot of high-frequency noise, so the connection of the pins should be as short as
possible, meanwhile, there should be sufficient width to conduct the current;
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6.
7.
8.
Sensitive analog signals, such as FB and RT, need to be far away from the noisy nodes, ground plane can be used as a
shielding layer while routing these sensitive signals;
The feedback resistance of the FB connection must be located as close to the pin as possible, If VOUT accuracy at the
load is important, make sure VOUT sense is made at the load;
For the peripheral components connected to FB, RT and EN pins, a single point ground connection to the plane is
recommended.
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PACKAGE INFORMATION
Package Outline
Notes:
1. Both package length and width do not include mold flash.
2. Controlling dimension: mm
3. Reference JEDEC MS-013, MS-012
4. The size label of length and width in the drawing belong to the bottom size of the package.
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11.2 Footprint Example
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IMPORTANT NOTICE AND DISCLAIMERS
The technical materials, reliability data, product specifications, and related product evaluation boards provided by LEN
Technology Ltd. are on an "as is" basis. LEN Technology Ltd. is not responsible for any errors that may occur in these
resources. LEN Technology Ltd. disclaims all expressed and implied warranties, including any implied warranties that the
intellectual property rights of third parties will not be infringed.
These resources from LEN Technology Ltd. are provided only to those who have experience in developing electronic
products. You will be solely responsible for selecting appropriate products from LEN Technology Ltd., and for verifying and
testing your design to meet the standards of your application, as well as for any other safety and security requirements.
The resources provided by LEN Technology Ltd. are subject to change without notice. LEN Technology Ltd. only grants you
the rights for developing applications with the products of LEN Technology Ltd. described in these resources. Reproduction
and display of these resources is prohibited. LEN Technology Ltd. does not grant any other intellectual property rights
owned by LEN Technology Ltd. or any third-party licensed intellectual property. LEN Technology Ltd. does not assume any
loss, cost and liabilities for the use of these resources.
ENVIRONMENTAL DECLARATION
This product complies with the requirements of RoHS and REACH. In accordance with relevant Chinese regulations and
standards, it does not contain toxic or harmful substances or elements.
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