ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
GENERAL DESCRIPTION
FEATURES
The ME2N7002DN-G is the N-Channel logic enhancement mode
● RDS(ON) ≦2.8Ω@VGS=10V
power field effect transistors are produced using high cell density,
● RDS(ON) ≦3.7Ω@VGS=4.5V
DMOS trench technology. This high density process is especially
● RDS(ON) ≦4.4Ω@VGS=3V
tailored to minimize on-state resistance. These devices are
● ESD Protection HBM≧2KV
particularly suited for low voltage application such as cellular phone
● Super high density cell design for extremely low RDS(ON)
and notebook computer power management and other battery
● Exceptional on-resistance and maximum DC current
powered circuits , and low in-line power loss are needed in a very
small outline surface mount package.
capability
● Capable doing Cu wire bonding
● MSL1
PIN CONFIGURATION
APPLICATIONS
● Power Management in Note book
● Portable Equipment
● Battery Powered System
● Load Switch
● DSC
N-Channel MOSFET
Th Ordering Information: ME2N7002DN-G (Green product-Halogen free)
Absolute Maximum Ratings (TA=25℃ Unless Otherwise Noted)
Symbol
Maximum Ratings
Unit
Drain-Source Voltage
VDS
60
V
Gate-Source Voltage
VGS
±20
V
TA=25℃
ID
0.28
TA=70℃
ID
0.23
IDM
1.12
TA=25℃
PD
0.36
TA=70℃
PD
0.23
TJ
-55 to 150
RθJA
350
Parameter
Continuous Drain
A
Pulsed Drain Current
Maximum Power Dissipation
W
Operating Junction Temperature
Thermal Resistance-Junction to Ambient*
2
* The device mounted on 1in FR4 board with 2 oz copper
May, 2021-Ver2.1
A
℃
D
CC
℃/W
正式發行
01
ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
Electrical Characteristics (TA =25℃ Unless Otherwise Specified)
Symbol
Parameter
Limit
Min
BVDSS
Drain-Source Breakdown Voltage
VGS=0V, ID=250μA
60
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250μA
1
IGSS
Gate-Body Leakage
IDSS
Zero Gate Voltage Drain Current
Typ
Max
Unit
STATIC
V
2.5
V
VDS=0V, VGS=±20V
±10
μA
VDS=60V, VGS=0V
1
μA
VGS=10V, ID=500mA
1.75
2.8
VGS=4.5V, ID=200mA
2.2
3.7
VGS=3V, ID=10mA
3.5
4.4
Diode Forward Voltage *
IS=200mA, VGS=0V
0.82
1.3
Qg
Total Gate Charge
VDS=30V, VGS=10V,ID=200mA
3.68
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
0.28
Ciss
Input Capacitance
16
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
RDS(ON)
VSD
Drain-Source On-Resistance*
Ω
V
DYNAMIC
1.43
nC
VDS=30V,VGS=4.5V,ID=200mA
VDS=25V, VGS=0V, f=1MHz
2.1
2
pF
1
VDS=30V, RL =150Ω
VGS=10V,RG=10Ω
ID=200mA
3.6
23.2
ns
5.5
23.2
Notes: a, pulse test: pulse width≦ 300us, duty cycle≦ 2%, Guaranteed by design, not subject to production testing.
b. Force mos reserves the right to improve or change product design, functions, reliability, qualified manufacturer without notice.
D CC
正式發行
May, 2021-Ver2.1
02
ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
Typical Characteristics (TJ =25℃ Noted)
D CC
正式發行
May, 2021-Ver2.1
03
ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
Typical Characteristics (TJ =25℃ Noted)
D CC
正式發行
May, 2021-Ver2.1
04
ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
DFN1006-3L Package Outline
TO-252-3L Package Outline
Suggested Pad Layout
Dimensions
C
X
X1
X2
Y
Y1
(mm)
0.65
1.05
0.4
0.4
0.2
0.55
D CC
正式發行
May, 2021-Ver2.1
05
ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
Device name: ME2N7002DN-G
Package: DFN1006-3L
Marking Code
X:Data Code
D CC
正式發行
May, 2021-Ver2.1
06
ME2N7002DN-G
N-Channel 60V (D-S) MOSFET, ESD Protection
Protected
Tape and reel specifications
PACKAGE
W
E
F
P0
D
P2
P1
T
A0
B0
K0
8mm
1.75mm
3.5mm
4mm
1.5mm
2mm
2mm
0.23mm
0.67mm
1.2mm
0.55mm
±0.1
±0.1
±0.05
±0.1
±0.1
±0.1
±0.1
±0.02
±0.05
±0.05
±0.05
DFN1006-3L
D CC
正式發行
May, 2021-Ver2.1
07
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