SY8205DNC

SY8205 High Efficiency Fast Response，5A, 30V Input Synchronous Step Down Regulator General Description Features The SY8205 develops a high efficiency synchronous step down DC/DC converter capable of delivering 5A output current. The SY8205 operates over a wide input voltage range from 4.5V to 30V and integrates main switch and synchronous switch with very low RDS(ON) to minimize the conduction loss.  Low RDS(ON) for Internal Switches (Top/Bottom): 70 mΩ /40 mΩ  4.5-30V Input Voltage Range  Instant PWM Architecture to Achieve Fast Transient Responses  External Soft-start Limits the Inrush Current  Pseudo-constant Frequency: 500kHz at Heavy Loads  5A Continuous, 6A Peak Load Current Capability  1.5% 0.6V Reference  Output Over Current Limit  Output Short Circuit Protection with Current Fold Back  Thermal Shutdown and Auto Recovery  RoHS Compliant and Halogen Free  Compact Package: DFN4×3-12/SO8E The SY8205 adopts the instant PWM architecture to achieve fast transient responses for high step down applications and high efficiency at light loads. In addition, it operates at pseudo-constant frequency of 500kHz under continuous conduction mode to minimize the size of inductor and capacitor. 导 小 SY8205 □(□□)□ 芯 Ordering Information 半 Temperature Code Package Code Optional Spec Code Package type DFN4×3-12 SO8E       Note --- LCD-TV SetTop Box Notebook Storage High Power AP Router Networking en tia l-F or Ordering Number SY8205DNC SY8205FCC Applications fid Typical Applications on Efficiency vs. Load Current 100 yC CIN1 90 BS PVIN L1 VOUT LX CFF RIN R1 SVIN CIN2 FB ON/OFF CVCC EN PG GND RFF 85 80 75 VIN=12V,VOUT=5V 70 VIN=18V,VOUT=5V (Open drain output) VIN=30V,VOUT=5V 65 SS VCC COUT Efficiency (%) Sil erg VIN 95 CBS CSS R2 60 0.01 0.10 1.00 10.00 Load Current (A) Figure1. Schematic Diagram (SY8205DNC) SY8205 Rev. 0.9G © 2019 Silergy Corp. Figure2. Efficiency vs. Load Current (SY8205DNC) Silergy Corp. Confidential- Prepared for Customer Use Only 1 All Rights Reserved. SY8205 Efficiency vs. Load Current CBS 95 90 PVIN L1 LX CFF RIN CIN1 COUT R1 SVIN RFF CIN2 FB EN ON/OFF SS VCC CVCC GND CSS 85 VOUT R2 Efficiency (%) BS VIN 80 75 70 65 VIN=12V,VOUT=1.8V 60 VIN=18V,VOUT=1.8V 55 VIN=30V,VOUT=1.8V 50 0.01 0.10 1.00 10.00 Load Current (A) Figure4. Efficiency vs. Load Current (SY8205FCC) Sil erg yC on fid en tia l-F or 半 导 小 芯 Figure3. Schematic Diagram (SY8205FCC) SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 2 All Rights Reserved. SY8205 Pinout (top view) BS 1 12 PVIN LX 2 11 PVIN LX 3 10 SVIN LX 4 9 VCC EN 5 8 SS PG 6 7 FB GND (13) (DFN4×3-12) BS 1 LX 2 EN 3 SS 4 GND 8 PVIN 7 SVIN 6 VCC 5 FB (SO8E) Top Mark: ADSxyz for SY8205DNC (Device code: ADS, x=year code, y=week code, z= lot number code) AHHxyz for SY8205FCC (Device code: AHH, x=year code, y=week code, z= lot number code) DFN4x3-12 SO8E BS 1 1 LX 2,3,4 2 EN 5 3 PG 6 / FB 7 5 SS 8 VCC 9 SVIN 10 导 小 半 l-F or tia en 6 7 11,12 8 Exposed Paddle Exposed Paddle on Boot-strap pin. Supply high side gate driver. Decouple this pin to the LX pin with a 0.1μF ceramic capacitor. Inductor pin. Connect this pin to the switching node of the inductor. Enable control. The device has an accurate 1.2V rising threshold that will allow the user to program the accurate turn-on delay by adding an RC before the EN pin. Power good Indicator. Low output if the output is within 90% of regulation voltage; Open-drain output otherwise. Output feedback pin. Connect this pin to the center point of the output resistor divider (as shown in Figure 1) to program the output voltage: VOUT=0.6×(1+R1/R2) Soft-start programming pin. Connect a capacitor from this pin to the ground to program the soft-start time. tSS=Css×0.6V/10μA Internal 3.3V LDO output. Power supply for internal analog circuits and driving circuit. Add a 1μF bypass capacitor to the GND. Analog supply input. Bypass a 1μF capacitor to the ground. Power supply input. Decouple this pin to GND pin with at least a 10μF ceramic capacitor. Ground pin. Sil erg yC GND 4 fid PVIN Pin Description 芯 Pin Name SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 3 All Rights Reserved. SY8205 Function Block PVIN SVIN Internal LDO 3.3V Input UVLO 4V BS VCC EN PWM Control & Protect Logic LX 1.2V FB 0.6V 芯 Thermal Protect 导 小 PG SS GND Figure5. Block Diagram en tia l-F or 半 Current Sense fid Absolute Maximum Ratings (Note 1) Sil erg yC on PVIN, SVIN, LX, BS, EN, PG ----------------------------------------------------------------------------------------------- 33V VCC, FB, SS, BS-LX ------------------------------------------------------------------------------------------- 4V Power Dissipation, PD @ TA = 25°C, DFN4×3-12/SO8E ------------------------------------------------------------ 2.8/3.3W Package Thermal Resistance (Note 2) θ JA ------------------------------------------------------------------------------------------------------------- 36/30°C/W θ JC ------------------------------------------------------------------------------------------------------------ 18°/10°C/W Junction Temperature Range ------------------------------------------------------------------------------------------------ 150°C Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------------ 260°C Storage Temperature Range -------------------------------------------------------------------------------------- -65°C to 150°C Dynamic LX voltage in 10ns duration-----------------------------------------------------------------------IN+3V to GND-4V Recommended Operating Conditions (Note 3) Supply Input Voltage -------------------------------------------------------------------------------------------------- 4.5V to 30V Junction Temperature Range ------------------------------------------------------------------------------------- -40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------- -40°C to 85°C SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 4 All Rights Reserved. SY8205 Electrical Characteristics (VIN = 12V, VOUT = 5V, COUT = 47μF, TA = 25°C, IOUT = 1A unless otherwise specified) Symbol VIN IQ ISHDN Test Conditions Min 4.5 IOUT=0, VFB=VREF×105% EN=0 VREF 0.591 IFB RDS(ON)1 RDS(ON)2 VFB=VCC 200 5 10 Unit V µA µA 0.6 0.609 V 50 nA mΩ mΩ -50 Max 30 70 40 5 VENL VEN,HYS VUVLO VHYS fOSC IOUT=200mA VVCC 芯 ILIM 1.1 A 1.2 0.1 1.3 4 VIN=4V 3.2 导 小 TSD Typ 半 TSD,HYS 0.2 500 80 120 3.3 3.4 V V V V kHz ns ns V 160 °C 20 °C l-F or Parameter Input Voltage Range Quiescent Current Shutdown Current Feedback Reference Voltage FB Input Current Top FET RON Bottom FET RON Bottom FET Current Limit EN Falling Threshold EN Threshold Hysteresis Input UVLO Threshold UVLO Hysteresis Oscillator Frequency Min ON Time Min OFF Time Internal LDO Output Thermal Shutdown Temperature Thermal Shutdown Hysteresis en tia Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. yC on fid Note 2: θ JA is measured in the natural convection at T A = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Paddle of DFN3x3-12/SO8E packages is the case position for θ JC measurement. Sil erg Note 3: The device is not guaranteed to function outside its operating conditions. SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 5 All Rights Reserved. SY8205 DFN4×3-12 Package Outline & PCB Layout Bottom View Sil erg yC on fid en tia l-F or 半 导 小 芯 Top View Side View Notes: PCB layout (Recommended) All dimension in millimeter and exclude mold flash & metal burr SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 6 All Rights Reserved. SY8205 SO8E Package Outline & PCB Layout Side view Sil erg yC on fid en tia l-F or 半 导 小 芯 Top view Notes: Front view Recommended PCB layout (Reference Only) All dimension in millimeter and exclude mold flash & metal burr. SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 7 All Rights Reserved. SY8205 Taping & Reel Specification 1. Taping orientation SOP8-EP 3.9/4.1 11.7/12.3 1.45/1.55 导 小 Feeding direction Sil erg yC on fid en tia l-F or 半 DFN4x3 (DFN4030) 芯 Feeding direction SY8205 Rev. 0.9G © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 8 All Rights Reserved. SY8205 2.Carrier Tape & Reel specification for packages Tape width (mm) Pocket pitch(mm) Reel size (Inch) Trailer length(mm) Leader length (mm) Qty per reel 8 13" 400 400 2500 8 13" 400 400 5000 l-F or Package types 半 导 小 芯 Reel Size 12 tia SOP8E 12 fid en DFN4x3 Sil erg yC on 3. Others: NA SY8205 Rev. 0.9G © 2019 Silergy Corp. Powered by TCPDF (www.tcpdf.org) Silergy Corp. Confidential- Prepared for Customer Use Only 9 All Rights Reserved.