BCM53DSX

BCM53DS 80 V, 1 A PNP/PNP matched double transistors 10 April 2018 Product data sheet 1. General description PNP/PNP matched double transistors in a small SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package. NPN/NPN complement: BCM56DS 2. Features and benefits • • • • • • High collector current capability IC and ICM Reduces component count Reduces pick and place costs Current gain matching 5% Application-optimized pinout AEC-Q101 qualified 3. Applications • • • • • • • Current mirror Differential amplifier Linear voltage regulators MOSFET drivers High-side switches Power management Amplifiers 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - -80 V IC collector current - - -1 A ICM peak collector current single pulse; tp ≤ 1 ms - - -2 A hFE DC current gain VCE = -2 V; IC = -150 mA; Tamb = 25 °C 63 - 250 DC current gain matching VCE = -5 V; IC = -2 mA; Tamb = 25 °C 0.95 1 1.05 Per transistor [1] Per device hFE1/hFE2 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors Symbol Parameter VBE1−VBE2 base-emitter voltage matching [1] [2] Conditions [2] Min Typ Max Unit - - 2 mV Pulse test: tp ≤ 300 μs; δ ≤ 0.02 The smaller of the two values is subtracted from the larger value. 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 B1 base TR1 2 B2 base TR2 3 C2 collector TR2 4 E2 emitter TR2 5 E1 emitter TR1 6 C1 collector TR1 Simplified outline 6 5 Graphic symbol 4 C1 E1 E2 TR1 TR2 1 2 3 TSOP6 (SOT457) B1 B2 C2 aaa-024630 6. Ordering information Table 3. Ordering information Type number BCM53DS Package Name Description Version TSOP6 plastic, surface-mounted package (SC-74) SOT457 7. Marking Table 4. Marking codes Type number Marking code BCM53DS 3C BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 2 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - -100 V VCEO collector-emitter voltage open base - -80 V VEBO emitter-base voltage open collector - -5 V IC collector current - -1 A ICM peak collector current - -2 A IBlim limiting base current - -0.2 A IBM peak base current single pulse; tp ≤ 1 ms - -0.3 A Ptot total power dissipation Tamb ≤ 25 °C [1] - 270 mW [2] - 320 mW [1] - 400 mW [2] - 500 mW Per transistor single pulse; tp ≤ 1 ms Per device Ptot total power dissipation Tamb ≤ 25 °C Tj junction temperature - 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C [1] [2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 2 Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated; mounting pad for collector 1 cm . aaa-027468 600 Ptot (mW) (1) 400 (2) 200 0 -75 -25 25 75 2 125 175 Tamb (°C) (1) = FR4 PCB, single sided copper, 1 cm (2) = FR4 PCB, single sided copper, standard footprint Fig. 1. Per device: Power derating curves BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 3 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air Min Typ Max Unit [1] - - 463 K/W [2] - - 391 K/W - - 150 K/W [1] - - 313 K/W [2] - - 250 K/W Per transistor Rth(j-a) Rth(j-sp) thermal resistance from junction to solder point Per device Rth(j-a) [1] [2] thermal resistance from junction to ambient in free air Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated; mounting pad for collector 1 cm . aaa-027469 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.50 0.33 0.20 0.10 0.05 10 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, single sided copper, tin-plated and standard footprint Fig. 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 4 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors aaa-027470 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.50 0.33 0.20 0.10 0.05 10 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 FR4 PCB, single sided copper, tin-plated, mounting pad for collector 1 cm Fig. 3. 10 102 2 tp (s) 103 Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 5 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit V(BR)CBO collector-base breakdown voltage IC = -100 µA; IE = 0 A -100 - - V V(BR)CEO collector-emitter breakdown voltage IC = -2 mA; IB = 0 A -80 - - V V(BR)EBO emitter-base breakdown voltage IC = 0 A; IE = -100 µA -5 - - V ICBO collector-base cut-off current VCB = -30 V; IE = 0 A; Tamb = 25 °C - - -100 nA VCB = -30 V; IE = 0 A; Tj = 150 °C - - -10 µA IEBO emitter-base cut-off current VEB = -5 V; IC = 0 A; Tamb = 25 °C - - -100 nA hFE DC current gain VCE = -5 V; IC = -2 mA; Tamb = 25 °C 63 - - Per transistor VCE = -2 V; IC = -150 mA; Tamb = 25 °C [1] 63 - 250 VCE = -2 V; IC = -500 mA; Tamb = 25 °C [1] 40 - - VCEsat collector-emitter saturation voltage IC = -500 mA; IB = -50 mA; Tamb = 25 °C [1] - - -500 mV VBE base-emitter voltage VCE = -2 V; IC = -500 mA; Tamb = 25 °C [1] - - -1 V Cc collector capacitance VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C - 7 - pF fT transition frequency VCE = -5 V; IC = -50 mA; f = 100 MHz; Tamb = 25 °C 100 140 - MHz hFE1/hFE2 DC current gain matching VCE = -5 V; IC = -2 mA; Tamb = 25 °C 0.95 1 1.05 VBE1−VBE2 base-emitter voltage matching - - 2 Per device [1] [2] [2] mV Pulse test: tp ≤ 300 μs; δ ≤ 0.02 The smaller of the two values is subtracted from the larger value. BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 6 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors aaa-027481 250 hFE aaa-027482 200 (1) hFE 200 150 (2) 150 100 (1) 100 (3) (2) 50 50 (3) 0 -10-1 -1 -10 -102 0 -10-1 -103 -104 IC (mA) VCE = -2 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = -55 °C Fig. 4. Fig. 5. aaa-027483 IB (mA) = -15 -13.5 IC (A) -10.5 -0.8 -0.6 -103 -104 IC (mA) aaa-027484 -1.2 VBE (V) -12 -9 -0.9 (1) -6 -0.4 (2) -0.6 -4.5 (3) -3 -0.2 -0.3 -1.5 -0 -1 -2 -3 -4 VCE (V) -0 -10-1 -5 Tamb = 25 °C Fig. 6. -102 DC current gain as a function of collector current; typical values -7.5 -0 -10 Tamb = 25 °C (1) VCE = -1 V (2) VCE = -2 V (3) VCE = -5 V DC current gain as a function of collector current; typical values -1.0 -1 Fig. 7. Product data sheet -101 -102 -103 -104 IC (mA) VCE = -2 V Tamb = -55 °C Tamb = 25 °C Tamb = 100 °C Collector current as a function of collectoremitter voltage; typical values BCM53DS -1 Base-emitter voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 7 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors aaa-027485 -1.2 aaa-027486 -1 VBEsat (V) VCEsat (V) -0.8 (1) (2) -10-1 (3) -0.4 (2) (1) (3) -0 -10-1 Fig. 8. -1 -10 -102 -10-2 -10-1 -103 -104 IC (mA) -1 -10 -102 -103 -104 IC (mA) IC/IB = 10 (1) Tamb = -55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C IC/IB = 10 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = -55 °C Base-emitter saturation voltage as a function of Fig. 9. collector current; typical values Collector-emitter saturation voltage as a function of collector current; typical values aaa-027487 -1 aaa-027488 25 CC (pF) 20 VCEsat (V) 15 -10-1 10 (1) (2) 5 (3) -10-2 -10-1 -1 -10 -102 0 -103 -104 IC (mA) Tamb = 25 °C (1) IC/IB = 50 (2) IC/IB = 20 (3) IC/IB = 5 Product data sheet -20 -40 -60 -80 -100 VCB (V) f = 1 MHz Tamb = 25 °C Fig. 10. Collector-emitter saturation voltage as a function of collector current; typical values BCM53DS -0 Fig. 11. Collector capacitance as a function of collector-base voltage; typical values All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 8 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors aaa-027489 70 CE (pF) 60 aaa-027490 103 fT (MHz) 50 40 102 30 20 10 0 -0 -1 -2 -3 -4 VEB (V) 10 -10-1 -5 f = 1 MHz Tamb = 25 °C -1 -10 -102 IC (mA) -103 VCE = -5 V f = 100 MHz Tamb = 25 °C Fig. 12. Emitter capacitance as a function of emitterbase voltage; typical values Fig. 13. Transition frequency as a function of collector current; typical values 11. Test information Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 12. Package outline 3.1 2.7 6 3.0 2.5 1.7 1.3 1.1 0.9 5 4 2 3 0.6 0.2 pin 1 index 1 0.95 1.9 0.40 0.25 Dimensions in mm 0.26 0.10 18-03-11 Fig. 14. Package outline TSOP6 (SOT457) BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 9 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors 13. Soldering 3.45 1.95 0.45 0.55 (6×) (6×) 0.95 solder lands solder resist 3.3 2.825 0.95 solder paste occupied area 0.7 (6×) Dimensions in mm 0.8 (6×) 2.4 sot457_fr Fig. 15. Reflow soldering footprint for TSOP6 (SOT457) 5.3 1.5 (4×) solder lands 1.475 0.45 (2×) 5.05 1.475 solder resist occupied area Dimensions in mm preferred transport direction during soldering 1.45 (6×) 2.85 sot457_fw Fig. 16. Wave soldering footprint for TSOP6 (SOT457) BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 10 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes BCM53DS v.1 20180410 Product data sheet - - BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 11 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. 15. Legal information Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Data sheet status Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. 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Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. 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Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’ aggregate and cumulative liability towards customer Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. BCM53DS Product data sheet Trademarks All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 12 / 13 BCM53DS Nexperia 80 V, 1 A PNP/PNP matched double transistors 16. Contents 1. General description......................................................1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 3 9. Thermal characteristics............................................... 4 10. Characteristics............................................................ 6 11. Test information..........................................................9 12. Package outline.......................................................... 9 13. Soldering................................................................... 10 14. Revision history........................................................11 15. Legal information..................................................... 12 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 10 April 2018 BCM53DS Product data sheet All information provided in this document is subject to legal disclaimers. 10 April 2018 © Nexperia B.V. 2018. All rights reserved 13 / 13