HSDL-3203-021

HSDL-3203 Small Profile Package IrDA® Data Compliant Low Power 115.2 kbit/s Infrared Transceiver Data Sheet Description Features The HSDL-3203 is a miniature low cost infrared transceiver module that provides the interface between logic and infrared (IR) signals for through air, serial, half-duplex IR data link. The module is compliant to IrDA Physical Layer Specifications version 1.4 Low Powerfrom 9.6 kbit/s to 115.2 kbit/s with extended link distance and it is IEC 825-Class 1 eye safe. • Fully compliant to IrDA 1.4 low power specification from 9.6 kbit/s to 115.2 kbit/s The HSDL-3203 can be shutdown completely to achieve very low power consumption. In the shutdown mode, the PIN diode will be inactive and thus producing very little photocurrent even under very bright ambient light. Such features are ideal for battery operated handheld products. • Low power operation at extended link distance of 50 cm • Miniature package — Height: 1.95 mm — Width: 8.00 mm — Depth: 3.10 mm • Guaranteed temperature performance, –20 to +70˚C — Critical parameters are guaranteed over temperature and supply voltage • Low power consumption — Low shutdown current (10 nA typical) — Complete shutdown of TXD, RXD, and PIN diode • Withstands > 100 mVp-p power supply ripple typically • VCC supply 2.7 to 3.6 volts • Integrated EMI shield • LED stuck-high protection • Designed to accommodate light loss with cosmetic windows • IEC 825-Class 1 Eye Safe • Lead-free and RoHS Compliant Applications • Mobile telecom — Mobile phones — Pagers — Smart phone • Data communication — PDAs — Portable printers • Digital imaging — Digital cameras — Photo-imaging printers • Electronic wallet, IrFM Application Support Information Ordering Information Part Number HSDL-3203-021 The Application Engineering group in Avago Technologies is available to assist you with the technical understanding associated with HSDL-3203 infrared transceiver module. You can contact them through your local Avago sales representative for additional details. VCC R1 Packaging Type Tape and Reel Package Front View Quantity 2500 LED A 8 TXD 7 LED DRIVER VCC 6 VCC C1 6.8 µF RXD 5 SHIELD GND 4 AGND 3 VCC SD 2 RX PULSE SHAPER CX 1 C2 100 nF 8 Figure 1. Functional block diagram of HSDL-3203. 2 7 6 5 4 3 2 1 Figure 2. Rear view diagram with pin-out. I/O Pin Configuration Table Pin 1 2 3 4 5 Symbol CX SD AGND GND RXD I/O I I I I O Description Pin bypass capacitor Shutdown. Active high Analog ground Ground Receiver data output. Active low Note 1 2 2 3 6 VCC I Supply voltage 4 7 8 – TXD LED A Shield I I – Transmitter data input. Active high LED anode EMI shield 5 6 7 Notes: 1. Complete shutdown TXD, RXD, and PIN diode. 2. Connect to system ground. 3. Output is active low pulse response when light pulse is seen. 4. Regulated, 2.7 to 3.6 volt. 5. Logic high turns on the LED. If held high longer than ∼50 µs, the LED is turned off automatically. TXD must be driven either high or low. DO NOT leave the pin floating. 6. Tied through external resistor, R1, to regulate VCC from 2.7 to 3.6 volt. 7. Connect to system ground via a low inductance trace. For best performance, do not connect to GND directly at the part. Recommended Application Circuit Components Component R1 R1 C1 C2 Recommended Value 30 Ω, ± 1%, 0.125 Watt 5.6 Ω, ± 1%, 0.125 Watt 6.8 µF, ± 20%, Tantalum 100 nF, ± 20%, X7R Ceramic Marking Information The unit is marked with the letters "A" and the datacode "YWW" on the shield for front options where Y is the last digit of the year, and WW is the workweek. Note 8 9 10 Notes: 8. To obtain ILED of 50 mA for VLED of 3 V. 9. To obtain ILED of 250 mA for VLED of 3 V. 10. C1 must be placed within 0.7 cm of the HSDL-3203 to obtain optimum noise immunity. Transceiver I/O Truth Table Inputs TXD High Low Low Don't Care Light Input to Receiver Don't Care High Low Don't Care SD Low Low Low High Outputs LED On Off Off Off RXD Not Valid Low High High Note 11, 12 Notes: 11. In-band IrDA signals and data rates ≤ 115.2 kbit/s. 12. RXD logic low is a pulsed response. The condition is maintained for a duration independent of pattern and strength of the incident intensity. Caution: The BiCMOS inherent to the design of this component increases the component's susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation, which may be induced by ESD. 3 Absolute Maximum Ratings For implementation where case to ambient thermal resistance is ≤ 50˚C/W. Parameter Symbol Min. Max. Storage Temperature TS –40 100 Operating Temperature TA –25 85 DC LED Current ILED (DC) 20 Peak LED Current ILED (PK) 250 Units ˚C ˚C mA mA LED Anode Voltage Supply Voltage Input Voltage TXD, SD Output Voltage RXD V V V V VLEDA VCC VI VO –0.5 0 0 –0.5 7 7 VCC + 0.5 VCC + 0.5 Conditions ≤ 90 µs Pulse Width ≤ 25% Duty Cycle Recommended Operating Conditions Parameter Operating Temperature Supply Voltage Logic High Voltage TXD, SD Logic Low Voltage TXD, SD Logic High Receiver Input Irradiance Logic Low Receiver Input Irradiance LED Current Pulse Amplitude Receiver Signal Rate Symbol TA VCC VIH VIL EIH EIL ILEDA Min. –25 2.7 2/3 VCC 0 0.0081 50 9.6 Max. 85 3.6 VCC 1/3 VCC 500 0.3 250 115.2 Units ˚C V V V mW/cm2 µW/cm2 mA kbit/s Conditions Note For in-band signals For in-band signals Guaranteed at 25˚C 13 13 Note: 13. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 nm ≤ λp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification. 4 Electrical and Optical Specifications Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25˚C and 3.0 V unless otherwise noted. Parameter Symbol Min. Typ. Max. Units Conditions Note Receiver RXD Output Voltage Logic Low VOL 0 0.4 V IOL = 200 µA, for in-band EI 14 Logic High VOH VCC VCC V IOH = 200 µA, for in-band –0.2 EI ≤ 0.3 µW/cm2 Viewing Angle 2φ1/2 30 ˚ Logic High Receiver Input EIH 0.0081 500 mW/cm2 For in-band signals ≤ 115.2 kbit/s 13 Irradiance Logic Low Receiver Input EIL 0.3 µW/cm2 For in-band signals 13 Irradiance Peak Sensitivity Wavelength λp 880 nm RXD Pulse Width tpw 1.5 2.5 4.0 µs 14 RXD Rise and Fall Times tr, tf 25 100 ns tpw(EI) = 1.6 µs, CL = 10 pF Receiver Latency Time tL 25 50 µs 14 Receiver Wake Up Time tW 50 100 µs 15 Transmitter Radiant Intensity EIH 4 8 28.8 mW/sr ILEDA = 50 mA, TA = 25˚C, θ1/2 ≤ 15˚ 22.5 mW/sr ILEDA = 250 mA, TA = 25˚C, θ1/2 ≤ 15˚ Peak Wavelength λp 875 nm Spectral Line Half Width ∆λ1/2 35 nm Viewing Angle 2θ1/2 30 60 ˚ Optical Pulse Width tpw 1.5 1.6 2 µs tpw(TXD) = 1.6 µs Optical Rise and Fall Times tr (EI) 600 ns tpw(TXD) = 1.6 µs tf (EI) Maximum Optical Pulse Width tpw 20 50 µs TXD pin stuck high (max) LED Anode ON State Voltage VON 1.5 V ILEDA = 50 mA, (LEDA) VIH (TXD) = 2.7 V LED Anode OFF State Leakage ILK 0.01 1.0 µA VLEDA = VCC = 3.6 V, (LEDA) VI (TXD) ≤ 1/3 VCC Transceiver TXD and SD Input Logic Low IL –1 –0.01 1 µA 0 ≤ VI ≤ 1/3 VCC Currents Logic High IH 0.01 1 µA VI ≥ 2/3 VCC Supply Current Shutdown ICCI 10 200 nA VCC = 3.6 V, VSD ≥ VCC –0.5 Idle ICC2 2.5 4 mA VCC = 3.6 V, VI(TXD) ≤ 1/3 VCC, EI = 0 Active ICC3 2.6 5 mA VCC = 3.6 V, VI(TXD)≤ 1/3 VCC 16 Receiver Notes: 14. For in-band signals ≤ 115.2 kbit/s where 8.1 µW/cm2 ≤ EI ≤ 500 mW/cm2. 15. Wake up time is measured from SD pin HIGH to LOW transition or VCC power ON to valid RXD output. 16. Typical value is at EI = 10 mW/cm2, maximum value is at EI = 500 mW/cm2. 5 tpw VOH 90% 50% VOL 10% tf tr Figure 3. RXD output waveform. tpw LED ON 90% 50% 10% LED OFF tr tf Figure 4. LED optical waveform. TXD LED tpw (MAX.) Figure 5. TXD ‘Stuck On’ protection waveform. SD SD RX LIGHT TXD RXD TX LIGHT tRW Figure 6. Receiver wakeup time waveform. 6 tTW Figure 7. TXD wakeup time waveform. VLED_A vs ILED_A, TEMPERATURE = 25°C RADIANT INTENSITY vs ILED_A, TEMPERATURE = 25°C 2.2 35 2.0 30 VLED_A (V) RADIANT INTENSITY (mW/sr) 40 25 20 15 1.8 1.6 1.4 10 1.2 5 0 000.0E+0 100.0E-3 200.0E-3 1.0 000.0E+0 300.0E-3 100.0E-3 200.0E-3 300.0E-3 ILED_A (A) ILED_A (A) Figure 9. VLED vs. LED current. Figure 8. LOP vs. ILED. Package Outline with Dimensions MOUNTING CENTER 4.0 1.025 CL 2.05 RECEIVER EMITTER 1.95 0.96 2.55 ;;;; ;; 0.35 0.65 0.80 COPLANARITY: ± 0.1 mm 2.85 4.0 8.0 3.1 CL 3.0 1.85 UNIT: mm TOLERANCE: ± 0.2mm 8 7 6 5 4 3 2 3.325 P0.95 x 7 = 6.65 1 2 3 4 Figure 10. Package outline dimensions. 7 0.6 CX SD AGND GND 5 6 7 8 RXD VCC TXD LEDA 1 Tape and Reel Dimensions UNIT: mm 4.0 ± 0.1 1.75 ± 0.1 + 0.1 ∅ 1.5 0 1.5 ± 0.1 POLARITY PIN 8: LED A 7.5 ± 0.1 16.0 ± 0.2 8.4 ± 0.1 PIN 1: CX 3.4 ± 0.1 0.4 ± 0.05 8.0 ± 0.1 2.8 ± 0.1 PROGRESSIVE DIRECTION EMPTY PARTS MOUNTED LEADER (400 mm MIN.) (40 mm MIN.) EMPTY (40 mm MIN.) OPTION # "B" "C" QUANTITY 001 178 60 500 021 330 80 2500 UNIT: mm DETAIL A 2.0 ± 0.5 B C ∅ 13.0 ± 0.5 R 1.0 LABEL 21 ± 0.8 DETAIL A 2 16.4 + 0 2.0 ± 0.5 Figure 11. Tape and reel dimensions. 8 Moisture-Proof Packaging All HSDL-3203 options are shipped in moisture-proof packaging. Once opened, moisture absorption begins. UNITS IN A SEALED MOISTURE-PROOF PACKAGE PACKAGE IS OPENED (UNSEALED) ENVIRONMENT LESS THAN 25°C, AND LESS THAN 60% RH? YES NO BAKING IS NECESSARY NO PACKAGE IS OPENED MORE THAN 2 DAYS? NO YES PERFORM RECOMMENDED BAKING CONDITIONS Figure 12. Baking conditions chart. Baking Conditions If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Packaging In Reels In Bulk Temp. 60˚C 100˚C 125˚C 150˚C Time ≥ 48 hours ≥ 4 hours ≥ 2 hours ≥ 1 hour Baking should only be done once. 9 Recommended Storage Conditions Storage Temp. Relative Humidity 10˚C to 30˚C Below 60% RH Time from Unsealing to Soldering After removal from the bag, the parts should be soldered within two days if stored at the recommended storage conditions. If times longer than two days are needed, the parts must be stored in a dry box. Reflow Profile MAX. 260°C T – TEMPERATURE – (°C) 255 R3 230 220 200 180 R4 R2 60 sec. MAX. ABOVE 220°C 160 R1 120 R5 80 25 0 50 100 150 200 250 300 t-TIME (SECONDS) P1 HEAT UP P2 SOLDER PASTE DRY P3 SOLDER REFLOW P4 COOL DOWN Figure 13. Reflow graph. Process Zone Heat Up Solder Paste Dry Solder Reflow Cool Down Symbol P1, R1 P2, R2 P3, R3 P3, R4 P4, R5 The reflow profile is a straight line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different ∆T/∆time temperature change rates. The ∆T/∆time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3203 castellation I/O pins are heated to a temperature of 160°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3203 castellation I/O pins. 10 ∆T 25˚C to 160˚C 160˚C to 200˚C 200˚C to 255˚C (260˚C at 10 seconds max.) 255˚C to 200˚C 200˚C to 25˚C Process zone P2 should be of sufficient time duration (60 to 120 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 200°C (392°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 255°C (491°F) for optimum results. The dwell time above the liquidus point of solder should be between 20 and 60 seconds. It usually takes about 20 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 60 seconds, the inter- Maximum ∆T/∆time 4˚C/s 0.5˚C/s 4˚C/s –6˚C/s –6˚C/s metallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 200°C (392°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3203 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL-3203 transceiver. Appendix A : SMT Assembly Application Note 1.0 Solder Pad, Mask and Metal Solder Stencil Aperture METAL STENCIL FOR SOLDER PASTE PRINTING STENCIL APERTURE LAND PATTERN SOLDER MASK PCBA Figure 14. Stencil and PCBA. 1.1 Recommended Land Pattern CL SHIELD SOLDER PAD 1.35 MOUNTING CENTER 1.25 2.05 0.10 0.775 1.75 FIDUCIAL 0.60 0.475 1.425 UNIT: mm 2.375 3.325 Figure 15. Land pattern. 11 1.2 Recommended Metal Solder Stencil Aperture It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern. Stencil Thickness, t (mm) 0.152 mm 0.127 mm 1.3 Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be placed at mid-length of the pads for unit alignment. APERTURES AS PER LAND DIMENSIONS t w l Figure 16. Solder stencil aperture. Aperture Size (mm) Length, l Width, w 2.60 ± 0.05 0.55 ± 0.05 3.00 ± 0.05 0.55 ± 0.05 8.2 0.2 SOLDER MASK Note: Wet/Liquid PhotoImageable solder resist/mask is recommended. 3.0 UNITS: mm Figure 17. Adjacent land keep-out and solder mask areas. 12 2.6 COMPONENT SIDE Appendix B: PCB Layout Suggestion The following shows an example of a PCB layout using option #021 that would result in good electrical and EMI performance. Things to note: 1. The ground plane should be continuous under the part, but should not extend under the shield trace. C1 4. C1 and C3 are optional supply filter capacitors; they may be left out if a clean power supply is used. CIRCUIT SIDE 5. VLED can be connected to either unfiltered or unregulated power supply. If VLED and VCC share the same power supply and C1 is used, the connection should be before the C1 cap. In a noisy environment, supply rejection can be enhanced by including C3 as well. Figure 18. PCB layout suggestions. 13 SHIELD SHUTDOWN 3. The AGND pin is connected to the ground plane and not to the shield tab. SYSTEM GROUND RXD VCC TXD C3 VLED 2. The shield trace is a wide, low inductance trace back to the system ground. C2 R1 Appendix C: General Application Guide for the HSDL-3203 Infrared IrDA® Compliant 115.2 kb/s Transceiver Description The HSDL-3203, a wide voltage operating range infrared transceiver, is a low-cost and small form factor device that is designed to address the mobile computing market such as PDAs, as well as small embedded mobile products such as digital cameras and cellular phones. It is fully compliant to IrDA 1.4 low power specification from 9.6 kb/s to 115.2 kb/s, and supports HP-SIR and TV Remote modes. The design of the HSDL-3203 also includes the following unique features: • Low passive component count. • Shutdown mode for low power consumption requirement. Selection of Resistor R1 Resistor R1 should be selected to provide the appropriate peak pulse LED current over different ranges of VCC as shown in the table below. Recommended R1 VCC Intensity Minimum peak pulse LED current 30 Ω 5.6 Ω 3V 3V 8 mW/sr 34 mW/sr 50 mA 250 mA Interface to Recommended I/O Chips The HSDL-3203’s TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6 kb/s up to 115.2 kb/s is available at the RXD pin. The block diagram below shows ow the IR port fits into a mobile phone and PDA platform. SPEAKER AUDIO INTERFACE DSP CORE MICROPHONE ASIC CONTROLLER RF INTERFACE TRANSCEIVER MOD/ DE-MODULATOR IR MICROCONTROLLER USER INTERFACE MOBILE PHONE PLATFORM Figure 19. IR layout in mobile phone platform. 14 HSDL-3203 LCD PANEL RAM IR CPU FOR EMBEDDED APPLICATION ROM PCMCIA CONTROLLER TOUCH PANEL HSDL-3203 RS232C DRIVER PDA PLATFORM Figure 20. IR layout in PDA platform. The link distance testing was done using typical HSDL-3203 units with National Semiconductor’s PC87109 3V Super I/O controller and SMC’s FDC37C669 and FDC37N769 Super I/O controllers. An IR link distance of up to 100 cm was demonstrated. 15 COM PORT Appendix D: Optical port dimensions for HSDL-3203: To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 30˚ and the maximum size corresponds to a cone angle of 60˚. In the figure below, X is the width of the window, Y is the height of the window, and Z is the distance from the HSDL-3203 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens, K, is 5.1 mm. The equations for computing the window dimensions are as follows: X = K + 2*(Z + D)*tanA Y = 2*(Z + D)*tanA The above equations assume that the thickness of the window is negligible compared to the distance of the module from the back of the window (Z). If they are comparable, Z' replaces Z in the above equation. Z' is defined as: Z' = Z + t/n where ‘t’ is the thickness of the window and ‘n’ is the refractive index of the window material. The depth of the LED image inside the HSDL-3203, D, is 3.17 mm. ‘A’ is the required half angle for viewing. For IrDA compliance, the minimum is 15˚ and the maximum is 30˚. Assuming the thickness of the window to be negligible, the equations result in the following tables and graphs. ;;;;;;;; ;;;;;; ;;;;;;;;; ;;;;;; ;;;;;;;; ;;;;; ;; ;; IR TRANSPARENT WINDOW OPAQUE MATERIAL Z X IR TRANSPARENT WINDOW K Z A D 16 OPAQUE MATERIAL Aperture Width (x, mm) Max. Min. 8.76 6.80 9.92 7.33 11.07 7.87 12.22 8.41 13.38 8.94 14.53 9.48 15.69 10.01 16.84 10.55 18.00 11.09 19.15 11.62 APERTURE WIDTH (X) vs MODULE DEPTH APERTURE HEIGHT (Y) vs MODULE DEPTH 16 20 15 10 X MAX. X MIN. 5 0 0 1 2 3 4 5 6 7 MODULE DEPTH (Z) – mm 17 Aperture Height (y, mm) Max. Min. 3.66 1.70 4.82 2.33 5.97 2.77 7.12 3.31 8.28 3.84 9.43 4.38 10.59 4.91 11.74 5.45 12.90 5.99 14.05 6.52 25 APERTURE HEIGHT (Y) – mm APERTURE WIDTH (X) – mm Module Depth (z) mm 0 1 2 3 4 5 6 7 8 9 8 9 14 12 10 8 6 4 Y MAX. Y MIN. 2 0 0 1 2 3 4 5 6 7 MODULE DEPTH (Z) – mm 8 9 Window Material Almost any plastic material will work as a window material. Polycarbonate is recommended. The surface finish of the plastic should be smooth, without any texture. An IR filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. Light loss should be measured at 875 nm. The recommended plastic materials for use as a cosmetic window are available from General Electric Plastics. Recommended Plastic Materials: Material Number Lexan 141L Lexan 920A Lexan 940A Light Transmission 88% 85% 85% Haze 1% 1% 1% Shape of the Window From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical or industrial design reasons, place the same curve on the back side of the window that has an identical radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. Refractive Index 1.586 1.586 1.586 Note: 920A and 940A are more flame retardant than 141L. Recommended Dye: Violet #21051 (IR transmissant above 625 nm). Flat Window (First Choice) 18 Curved Front and Back (Second Choice) Curved Front, Flat Back (Do Not Use) For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved. Obsoletes 5988-8581EN 5989-2869EN May 28, 2006