HSDL-3020
IrDA® Data Compliant Low Power 4.0 Mbit/s
with Remote Control Infrared Transceiver
Data Sheet
Description
Features
The HSDL-3020 is a new generation low profile high
speed enhanced infrared (IR) transceiver module that
provides the capability of (1) interface between logic
and IR signals for through-air, serial, half-duplex IR data
link, and (2) IR remote control transmission operating at
the optimum 940 nm wavelength for universal remote
control applications. The HSDL-3020 features an enhanced 3 lens optical package for optimized IrDA and
RC performance.
General Features
The module is fully compliant to IrDA® Physical Layer
specifi-cation version 1.4 low power from 9.6 kbit/s to
4.0 Mbit/s (FIR) and IEC825 Class 1 eye safety standards.
The HSDL-3020 can be shutdown completely to achieve
very low power consumption. In the shutdown mode,
the PIN diode will be inactive and thus producing very
little photocurrent even under very bright ambient light.
It is also designed to interface to input/output logic
circuits as low as 1.5 V. These features are ideal for battery operated mobile devices such as PDAs and mobile
phones that require low power consumption.
Applications
• Mobile data communication and universal remote
control
– Mobile phones
– PDAs
– Webpads
• Enhanced optical 3 lens design for optimized IrDA
and RC performance
• Operating temperature from -25°C ~ 85°C
– Critical parameters are guaranteed over
temperature and supply voltage
• VCC supply 2.4 to 3.6 volts
• Miniature package
– Height: 2.5 mm
– Width: 10.4 mm
– Depth: 2.95 mm
• Integrated remote control LED driver
• Input/output interface voltage of 1.5 V
• Integrated EMI shield
• LED stuck-high protection
• Designed to accommodate light loss with cosmetic
windows
• IEC 825-Class 1 eye safe
• LED stuck high protection
• Interface to various super I/O and controller devices
• Lead free package
IrDA‚ Features
• Fully compliant to IrDA 1.4 Physical Layer Low Power
Specifications from 9.6 kbit/s to 4.0 Mb/s
– Link distance up to 50 cm typically
• Complete shutdown for TxD_IrDA, RxD_IrDA and PIN
diode
• Low power consumption
– Low shutdown current
Remote Control Features
• Wide angle and high radiant intensity
• Spectrally suited to remote control transmission
function at 940 nm typically
• Typical link distance up to 14 meters (on-axis)
GND
10
TxD_RC
9
VCC
8
SD
7
RxD
6
TxD_IR
5
IOVCC
4
R2
IR_LEDA
3
R3
RC_LEDA
2
RC_LEDC
1
CX1
Rx PULSE
SHAPER
CX2
VCC
SHIELD
R1
IR LED
DRIVER
CX5
IOVCC
CX4
CX3
IR VLED
RC VLED
CX6
CX7
RC LED
DRIVER
Figure 1. Functional block diagram of HSDL-3020.
10
9
8
7
6
5
4
3
2
1
Figure 2. Rear view diagram with pinout.
Application Support Information
The Application Engineering Group
is available to assist you with the
application design associated with
HSDL-3020 infrared transceiver
module. You can contact them
through your local sales representatives for additional details.
Order Information
Part Number
Packaging Type
Package
Quantity
HSDL-3020-021
Tape and Reel
Front Option
2500
Marking Information
The unit is marked with “7YWLL” on the shield
Y = Year
W = Work week
LL = Lot information
I/O Pins Configuration Table
Pin
Symbol
Description
I/O Type
1
RC_LEDC
RC LED Cathode
Note 1
2
RC_LEDA
RC LED Anode
Note 2
3
IR_LEDA
IR LED Anode
Note 3
4
IOVCC
Input/Output ASIC Voltage
Note 4
5
TxD_IR
IrDA Transmitter Data Input
Input. Active High
Note 5
6
RxD
IrDA Receive Data
Output. Active Low
Note 6
7
SD
Shutdown
Input. Active High
Note 7
8
VCC
Supply Voltage
Note 8
9
TxD_RC
RC Transmitter Data Input
Note 9
10
GND
Ground
Note 10
–
Shield
EMI Shield
Note 11
Input. Active High
Notes
Notes:
1. Internally connected to RC LED driver. Leave this pin unconnected.
2. Tied through external resistor, R3, to RC Vled. Refer to the table below for recommended series resistor value.
3. Tied through external resistor, R2, to IR Vled. Refer to the table below for recommended series resistor value.
4. Connect to ASIC logic controller supply voltage or VCC. The voltage at this pin should be equal to or less than VCC.
5. This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 µs, the LED is turned off. Do NOT float this pin.
6. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when
the transceiver is in shutdown mode.
7. Complete shutdown of IC and PIN diode. The pin is used for setting receiver bandwidth and RC drive programming mode. Refer to section on
“Bandwidth Selection Timing” and “Remote Control Drive Modes” for more information. Do NOT float this pin.
8. Regulated, 2.4 V to 3.6 V.
9. Logic high turns on the RC LED. If held high longer than 50 µs, the RC LED is turned off. Do NOT float this pin.
10. Connect to system ground.
11, Connect to system ground via a low inductance trace. For best performance, do not connect directly to the transceiver GND pin.
CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s susceptibility
to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling
and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Recommended Application Circuit Components
Component
Recommended Value
Note
R1
4.7 Ω, ± 5%, 0.25 watt for VCC ≥ 3.6 V
R2
4.7 Ω for 2.4 V ≤ VLED < 2.7 V
6.8 Ω for 2.7 V ≤ VLED < 3 V
10 Ω for 3 V ≤ VLED < 3.3 V
13 Ω for 3.3 V ≤ VLED < 3.6 V
15 Ω for 3.6 V ≤ VLED < 4.2 V
20 Ω for 4.2 V ≤ VLED < 5 V
R3
1.8 Ω for 2.4 V ≤ VLED < 2.7 V
2.7 Ω for 2.7 V ≤ VLED < 3 V
3.3 Ω for 3 V ≤ VLED < 3.3 V
3.9 Ω for 3.3 V ≤ VLED < 3.6 V
4.7 Ω for 3.6 V ≤ VLED < 4.2 V
6.2 Ω for 4.2 V ≤ VLED < 4.7 V
6.8 Ω for 4.7 V ≤ VLED < 5 V
CX1, CX3, CX5, CX6
100 nF, ± 20%, X7R Ceramic
1
CX2, CX4, CX7
4.7 µF, ± 20%, Tantalum
1
Note:
1. CX1, CX2, CX3, CX4, CX5, CX6 & CX7 must be placed within 0.7 cm of HSDL-3020 to obtain
optimum noise immunity.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤50°C/W.
Parameter
Symbol
Min.
Max.
Units
Storage Temperature
TS
-40
+100
°C
Operating Temperature
TA
-25
+85
°C
LED Anode Voltage
VLEDA
0
6.5
V
Supply Voltage
VCC
0
6
V
Input Voltage: TxD, SD/Mode
VI
0
5.5
V
Input/Output Supply Voltage
IOVCC
0
6
V
RC LED Current
RC ILED
500
mA
IR LED Current
IR ILED
190
mA
Conditions
Recommended Operating Conditions
Parameter
Symbol
Min.
Typ.
Max.
Units
Operating Temperature
TA
-25 +85
°C
Supply Voltage
VCC
2.4
3.6
V
Input/Output Voltage
IOVCC
1.5
3.6
V
Logic Input Voltage
for TXD, SD/Mode
Logic High
VIH
IOVCC - 0.5
IOVCC
V
Logic Low
VIL
0
0.5
Conditions
V
0.0090
500
Receiver Input
Logic High
EIH
mW/cm2
Irradiance
0.0225
500
For in-band signals
≤ 115.2 kbit/s[3]
For in-band signals[3]
Logic Low
EIL
0.3
µW/cm2
LED (Logic High) Current Pulse
IR_ILEDA
70
mA
Amplitude – SIR Mode
0.576 Mbit/s ≤ in-band
signals ≤ 4.0 Mbit/s[3]
IR VLED = 3.6, R = 15 Ω,
≤ 20% duty cycle,
≤ 90 µs pulse width
LED (Logic High) Current Pulse
IR_ILEDA
120
mA
IR VLED = 3.6, R = 15 Ω,
Amplitude – MIR/FIR Mode
≤ 25% duty cycle,
≤ 90 µs pulse width
LED (Logic High) Current Pulse
RC_ILEDA
420
mA
Amplitude – RC Mode
Receiver Data Rate
0.0096
4.0
RC VLED = 3.6, R = 3.9 Ω,
≤ 25% duty cycle,
≤ 90 µs pulse width
Mbit/s
Ambient Light
See IrDA Serial Infrared
Physical Layer Link
Specification, Appendix A
for ambient levels
Note:
3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 ≤ lp ≤ 900 nm, and the pulse characteristics
are compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
Electrical and Optical Specifications
Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C with VCC set
to 3.0 V and IOVCC set to 1.8 V unless otherwise noted.
Parameter
Symbol
Min.
Typ.
Max.
2q1/2
30
Units
Conditions
Receiver
Viewing Angle
Peak Sensitivity Wavelength lP
875
°
nm
RxD_IrDA Output
Logic High
VOH
IOVCC – 0.5
IOVCC
V
Voltage
Logic Low
RxD_IrDA Pulse Width
(SIR)[4] t
RxD_IrDA Pulse Width
(MIR)[4]
RPW(SIR)
VOL
0
1
4
IOH = -200 µA, EI ≤ 0.3
µW/cm2
0.4
V
µs
q1/2 ≤ 15°, CL = 9 pF
tRPW(MIR)
100
500
ns
q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Pulse Width (Single) (FIR)[4]
tRPW(FIR)
80
175
ns
q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Pulse Width (Double) (FIR)[4]
tRPW(FIR)
200
290
ns
q1/2 ≤ 15°, CL = 9 pF
40
ns
CL = 9 pF
RxD_IrDA Rise & Fall Times tr, tf
Receiver Latency Time[5]
tL
100
µs
EI = 9.0 µW/cm2
Receiver Wake Up Time[6]
tRW
200
µs
EI = 10 µW/cm2
Infrared (IR) Transmitter
IR Radiant Intensity (SIR Mode)
IEH
4
mW/sr
IR_ILEDA = 70 mA,
q1/2 ≤ 15°, TxD_IR ≥ VIH,
TA = 25°C
IR Radiant Intensity (MIR/FIR Mode)
IEH
10
mW/sr
IR_ILEDA = 120 mA,
q1/2 ≤ 15°, TxD_IR ≥ VIH,
TA = 25°C
IR Viewing Angle
2q1/2
IR Peak Wavelength
lP
TxD_IrDA Logic Levels
High
VIH
IOVCC - 0.5
IOVCC
V
Low
VIL
0
0.5
V
TxD_IrDA Input Current
High
IH
0.02
µA
VI ≥ VIH
Low
IL
-0.02
µA
0 ≤ VI ≤ VIL
tTW
180
ns
tPW(Max)
25
µs
Wake
Up Time[7]
Maximum Optical
Pulse Width[8]
30
60
875
50
°
nm
TxD Pulse Width (SIR)
tPW(SIR)
1.6
µs
tPW (TxD_IR) = 1.6 µs at
115.2 kbit/s
TxD Pulse Width (MIR)
tPW(MIR)
217
ns
tPW (TxD_IR) = 217 ns at
1.152 Mbit/s
TxD Pulse Width (FIR)
tPW(FIR)
125
ns
tPW (TxD_IR) = 125 ns at
4.0 Mbit/s
TxD Rise & Fall Times (Optical)
tr, tf
600
ns
tPW (TxD_IR) = 1.6 µs at
115.2 kbit/s
40
ns
tPW (TxD_IR) = 125 ns at
4.0 Mbit/s
Electrical and Optical Specifications (Cont’d.)
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
IR LED Anode On-State Voltage
VON
2.5
V
(SIR Mode)
(IR_LEDA)
IR_ILEDA = 70 mA,
IR VLED = 3.6 V, R = 15 Ω,
VI (TxD) ≥ VIH
IR LED Anode On-State Voltage
VON
1.9
V
(MIR/FIR Mode)
(IR_LEDA)
IR_ILEDA = 120 mA,
IR VLED = 3.6 V, R = 15 Ω,
VI(TxD_IR) ≥ VIH
Remote Control (RC) Transmitter
RC Radiant Intensity
IEH
110
mW/sr
30
60
RC_ILEDA = 420 mA,
q1/2 ≤ 15°, TxD_RC ≥ VIH,
TA = 25°C
RC Viewing Angle
2q1/2
RC Peak Wavelength
lP
TxD_RC Logic Levels
High
VIH
IOVCC - 0.5
IOVCC
V
Low
VIL
0
0.5
V
TxD_RC Input Current
High
IH
0.02
1
µA
VI ≥ VIH
Low
IL
-0.02
1
µA
0 ≤ VI ≤ VIL
940
°
nm
RC LED Anode On-State Voltage
VON
2.0
V
(RC_LEDA)
RC_ILEDA = 420 mA,
RC VLED = 3.6 V, R = 3.9 Ω,
VI(TxD_RC) ≥ VIH
Transceiver
Input Current
High
IH
0.01
1
µA
VI ≥ VIH
Low
IL
-0.02
1
µA
0 ≤ VI ≤ VIL
Supply Current
Shutdown ICC1
1
µA
VSD ≥ VCC - 0.5, TA = 25°C
Idle
(Standby)
ICC2
2.0
2.9
mA
VI(TxD) ≤ VIL, EI = 0
Active
ICC3
3.5
mA
VI(TxD) ≥ VIL, EI = 10 mW/cm2
-1
Notes:
4. An in-band optical signal is a pulse/sequence where the peak wavelength, lP, is defined as 850 nm ≤ lP ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification version 1.4.
5. For in-band signals 9.6 kbit/s to 115.2 kbit/s where 9 µW/cm2 ≤ EI ≤ 500 mW/cm2.
6. Latency is defined as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity.
7. Receiver Wake Up Time is measured from VCC power ON to valid RxD_IrDA output.
8. Transmitter Wake Up Time is measured from VCC power ON to valid light output in response to a TxD_IrDA pulse.
9. The Optical PW is defined as the maximum time in which the IR LED will turn on. This is to prevent the long Turn On time for the IR LED.
IR MIR/FIR Mode - VLED_A vs ILED
IR SIR Mode - VLED_A vs ILED
1.80
2.3
2.2
1.75
2.0
VLED_A (V)
VLED_A (V)
2.1
1.9
1.8
1.7
1.6
1.70
1.65
1.60
1.55
1.5
1.4
0
0.02
0.04
0.06
0.08
0.10
1.50
0.05
0.12
0.075
0.10
0.175
36
18
RADIANT INTENSITY (mW/sr)
RADIANT INTENSITY (mW/sr)
0.15
IR MIR/FIR Mode - Radiant Intensity vs ILED
IR SIR Mode - Radiant Intensity vs ILED
20
16
14
12
10
8
6
4
2
0
0
0.02
0.04
0.06
ILED (A)
0.125
ILED (A)
ILED (A)
0.08
0.10
0.12
33
30
27
24
21
18
15
0.05
0.075
0.10
0.125
ILED (A)
0.15
0.175
HSDL-3020 Package Dimensions
MOUNTING
CENTER
5.20
1.025
10.40
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
2.50
1.15
R2.10
1.20
3.60
RC
EMITTER
R1.10
1.20
5.10
DA
EMITTER
RECEIVER
R1.10
R1.10
1.50
0.95
2.95
0.70
1
2
3
4
5
6
7
8
9
10
1.80
COPLANARITY
0.00 TO 0.20 mm
0.68
PITCH 0.95
0.60
0.50
RC CATHODE
RC VLED
IR VLED
IOVCC
TxD IR
RxD
SD
VDD
TxD RC
GND
HSDL-3020 Tape and Reel Dimensions
D0
P0
2 ± 0.1
P2
T
E
B
5°(MAX.)
F
W
B
A
A
B0
P1
K0
SECTION B-B
D1
A0
5°(MAX.)
SECTION A-A
SYMBOL
SPEC.
SYMBOL
SPEC.
A0
B0
K0
P0
P1
P2
T
2.95 ± 0.10
10.65 ± 0.10
2.77 ± 0.10
4.0 ± 0.10
8.0 ± 0.10
2.4 ± 0.10
0.35 ± 0.10
E
F
D0
D1
W
10P0
1.75 ± 0.10
11.5 ± 0.10
1.55 ± 0.05
1.50 ± 0.10
24.0 ± 0.30
40.0 ± 0.20
NOTES:
1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm.
2. CARRIER CHAMBER SHALL BE NOT MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm.
3. A0 AND B0 MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE POCKET.
4. K0 MEASURED FROM A PLACE ON THE BOTTOM OF THE POCKET IN TOP SURFACE OF CARRIER.
5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE.
10
HSDL-3020 Moisture Proof Packaging
All HSDL-3020 options are shipped in moisture proof
package. Once opened, moisture absorption begins.
Baking Conditions
If the parts are not stored in dry conditions, they must
be baked before reflow to prevent damage to the parts.
This part is compliant to JEDEC Level 4.
Package
Temp.
Time
In reels
60°C
≥ 48 hours
In bulk
100°C ≥ 4 hours
125°C ≥ 2 hours
150°C ≥ 1 hour
Baking should only be done once.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
Recommended Storage Conditions
Storage Temperature 10°C to 30°C
Relative Humidity Below 60% RH
Time from Unsealing to Soldering
After removal from the bag, the parts should be soldered within three days if stored at the recom-mended
storage conditions.
PACKAGE IS
OPENED (UNSEALED)
ENVIRONMENT
LESS THAN 30°C,
AND LESS THAN
60% RH
YES
NO BAKING
IS NECESSARY
YES
PACKAGE IS
OPENED MORE
THAN 72 HOURS
NO
PERFORM RECOMMENDED
BAKING CONDITIONS
Figure 3. Baking conditions chart.
11
NO
Recommended Reflow Profile
MAX. 260°C
T – TEMPERATURE – (°C)
255
R4
R3
230
220
200
180
R2
60 sec.
MAX.
ABOVE
220°C
160
R1
120
R5
80
25
0
50
100
150
200
250
300
t-TIME (SECONDS)
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
Process Zone
Symbol
DT
Maximum DT/Dtime
Heat Up
P1, R1
25°C to 160°C
4°C/s
Solder Paste Dry
P2, R2
160°C to 200°C
0.5°C/s
Solder Reflow
P3, R3
P3, R4
200°C to 255°C (260°C at 10 seconds max)
255°C to 200°C
4°C/s
-6°C/s
Cool Down
P4, R5
200°C to 25°C
-6°C/s
The reflow profile is a straight-line representation of
a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different
DT/Dtime temperature change rates. The DT/Dtime rates
are detailed in the above table. The temperatures are
measured at the component to printed circuit board
connections.
In process zone P1, the PC board and HSDL-3020 castellation pins are heated to a temperature of 160°C to activate the flux in the solder paste. The temperature ramp
up rate, R1, is limited to 4°C per second to allow for even
heating of both the PC board and HSDL-3020 castellations.
Process zone P2 should be of sufficient time duration (60 to
120 seconds) to dry the solder paste. The temperature
is raised to a level just below the liquidus point of the
solder, usually 200°C (392°F).
12
Process zone P3 is the solder reflow zone. In zone P3, the
temperature is quickly raised above the liquidus point
of solder to 255°C (491°F) for optimum results. The
dwell time above the liquidus point of solder should
be between 20 and 60 seconds. It usually takes about
20 seconds to assure proper coalescing of the solder
balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 60 seconds, the
intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and
unreliable connections. The temperature is then rapidly
reduced to a point below the solidus temperature of the
solder, usually 200°C (392°F), to allow the solder within
the connections to freeze solid.
Process zone P4 is the cool down after solder freeze. The
cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second
maximum. This limitation is necessary to allow the PC
board and HSDL-3020 castellations to change dimensions evenly, putting minimal stresses on the HSDL-3020
transceiver.
Appendix A: HSDL3020 SMT Assembly Application Note
Solder Pad, Mask and Metal Stencil
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND
PATTERN
SOLDER
MASK
PCBA
Figure 1. Stencil and PCBA.
Recommended Land Pattern
MOUNTING CENTER
2.7
1.25
2.05
0.35
0.10
0.775
1.75
FIDUCIAL
0.475
1.425
SYMETRICAL CENTER
Figuure 2.
13
Recommended Metal solder Stencil Aperture
It is recommended that only a 0.152 mm (0.006 inch) or
a 0.127 mm (0.005 inch) thick stencil be used for solder
paste printing. This is to ensure adequate printed solder
paste volume and no shorting. See Table 1, below the
drawing, for combin-ations of metal stencil aperture
and metal stencil thickness that should be used. Aperture opening for shield pad is 3.05 mm x 1.1 mm as per
land pattern.
APERTURES AS PER
LAND DIMENSIONS
t
w
l
Figure 3. Solder stencil aperture.
Table 1.
Stencil Thickness,
t (mm)
Aperture Size (mm)
Length, l
Width, w
0.127 mm
1.75 ± 0.05
0.55 ± 0.05
0.11 mm
2.4 ± 0.05
0.55 ± 0.05
Adjacent Land Keepout and Solder Mask Areas
Adjacent land keepout is the maximum space occupied
by the unit relative to the land pattern. There should be
no other SMD components within this area. The minimum solder resist strip width required to avoid solder
bridging adjacent pads is 0.2 mm. It is recommended
that two fiducial crosses be placed at mid length of the
pads for unit alignment.
Note: Wet/Liquid Photo-imageable solder resist/mask is recommended.
j
k
h
l
SOLDER MASK
14
DIMENSION
mm
h
0.2
l
3.0
k
3.85
j
11.9
Appendix B: PCB Layout Suggestion
The effects of EMI and power supply noise can potentially reduce the sensitivity of the receiver, resulting in
reduced link distance. The PCB layout played an important role to obtain a good PSRR and EM immunity resulting in good electrical performance. Things to note:
1. The ground plane should be continuous under the
part, but should not extend under the shield trace.
2. The shield trace is a wide, low inductance trace back
to the system ground. CX1, CX2, CX3, CX4, CX5, CX6
and CX7 are optional supply filter capacitors; they
may be left out if a clean power supply is used.
3. IR and RC VLED can be connected to either unfiltered or unregulated power supply. The bypass
capacitors should be connection before the current
limiting resistor R3 and R4 respectively. In a noisy
environment, including capacitor CX2 and CX7 can
enhance supply rejection. CX6 and CX3 that are
generally a ceramic capacitor of low inductance
providing a wide frequency response while CX2 and
CX4 are tantalum capacitor of big volume and fast
frequency response. The use of a tantalum capacitor
is more critical on the VLED line, which carries a high
current.
4. VCC pin can be connected to either unfiltered or
unregulated power supply. The Resistor, R1 together
with the capacitors, CX1 and CX2 acts as the low
pass filter.
5. IOVCC is connected to the ASIC voltage supply or
the VCC supply. The capacitor, CX5 acts as the bypass
capacitor.
6. Preferably a multi-layered board should be used
to provide sufficient ground plane. Use the layer
underneath and near the transceiver module as VCC,
and sandwich that layer between ground connected board layers. The diagram below demonstrate an
example of a 4 layer board:
15
• Top Layer: Connect the metal shield and module
ground pin to bottom ground layer;
Place the bypass capacitors within 0.5cm from the
VCC and ground pin of the module.
• Layer 2: Critical ground plane zone. 3 cm in all direction around the module. Connect to a clean,
noiseless ground node (eg bottom layer).
• Layer 3: Keep data bus away from critical ground
plane zone.
• Bottom layer: Ground layer. Ground noise
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