0.180’’ 4-Character 5x7 Dot Matrix Serial Input
Dot Addressable Intelligent Display® Devices
Lead (Pb) Free Product / RoHS Compliant
SCE574x
Standard Red SCE5740
Green
SCE5743
SCE574xP-SIP
SCE574xQ-SIP with right angle bends
Yellow SCE5741
High Efficiency Green SCE5744
DESCRIPTION
ALSO AVAILABLE WITH OPTIONS
(see page 8)
• SCE574xP-SIP
• SCE574xQ-SIP with right angle bends
The SCE574x is a four digit, dot addressable 5 x 7 dot
matrix, serial input, alphanumeric Intelligent Display
device. The four digits are packaged in a rugged, high
quality, optically transparent, plastic 14 pin DIP with
2.54 mm (0.1") pin spacing.
FEATURES
• Four 4.57 mm (0.180") 5 x 7 Dot Matrix Characters in
Red, Yellow, Super-red, Green, High Efficiency Green,
Orange
• Optimum Display Surface Efficiency
(display area to package ratio)
• High Speed Data Input Rate: 5.0 MHz
• ROMless Serial Input, Dot Addressable Display
Ideal for User Defined Characters
• Built-in Decoders, Multiplexers and LED Drivers
• Wide Viewing Angle, X Axis ± 55°, Y Axis ± 55°
The SCE574xP is a SIP version of SCE574x. The
SCE574xQ is also a SIP version of the SCE574x but the
leads are at right angles to the package so that the part
can be mounted vertically. The SIP version parts have
only 7 pins. The SIP parts do not have the option of using
an external clock. All the electrical descriptions for the
SCE574x apply to the SIP versions except the allusions
to the external clock.
The on-Board CMOS has a 140 bit RAM, one bit associated with one LED, each to generate User Defined Characters. In Power Down Mode, quiescent current
is < 50 µA.
ATTRIBUTES
– 140 Bit RAM for User Defined Characters
– Eight Dimming Levels plus eight fine dimming levels.
– Power Down Model (< 250 mW)
– Hardware/Software Clear Functions
– External Clock-SCE574x only
The SCE574x is designed for work with the serial port of
most common microprocessors. Data is transferred into
the display through the Serial Data Input (DATA), clocked
by the Serial Data Clock (SDCLK), and enabled by the
Load Input (LOAD).
The SCE574x Clock I/O (Clk I/O) and Clock Select (CLKSEL) pins offer the user the capability to supply a high
speed external multiplex clock. This feature can minimize
audio in-band interference for portable communication
equipment or eliminate the visual synchronization effects
found in high vibration environments such as avionic
equipment.
A divide by 16 prescalar is built into the part and can be
accessed by software to reduce the multiplex frequency if
a high speed external clock is used.
2006-03-30
Super-red SCE5742
Orange SCE5745
1
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Ordering Information
Type
Color of Emission
SCE5740
standard red
Q68100A1369
SCE5741
yellow
Q68100A1370
SCE5742
super-red
SCE5743
green
SCE5744
high efficiency green
Q68100A1373
SCE5745
orange
Q68100A1374
2006-03-30
Q68100A1372
4.57 (0.180)
19.91 (0.784)
IDOD5006
2
Ordering Code
Q68100A1371
4.57 (0.180)
Dimensions in mm (inch)
10.16 (0.400) ±0.38 (0.015)
Package Outlines
Character Height
mm (inch)
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Maximum Ratings
Parameter
Symbol
Value
Unit
Operating temperature range
Top
– 40 … + 85
°C
Storage temperature range
Tstg
– 40 … + 100
°C
DC Supply Voltage
VCC
-0.5 to + 7.0
V
-0.5 to VCC +0.5
V
260
°C
85
%
2.0
kV
Input Current
130
mA
Maximum Number of LEDs on at 100% Brightness
64
Maximum Power Dissipation
0.6
Input Voltage Levels Relative to GND
Solder Temperature
1.59 mm (0.063“) below seating plane, t < 5.0 s
TS
Relative Humidity
ESD (100 pF, 1.5 kΩ)
VZ
W
Optical Characteristics at 25°C
(VCC=5.0 V at 100% brightness level, viewing angle: X axis ± 55°, Y axis ± 65°)
Green
SCE5743
High Efficiency Green
SCE5744
Orange
SCE5745
Unit
Super-red
SCE5742
Values
Yellow
SCE5741
Symbol
Red
SCE5740
Description
Luminous Intensity
(min.) IV
(typ.)
30
60
60
150
60
150
60
150
80
180
60
150
µcd/dot
µcd/dot
Peak Wavelength
(typ.) λpeak
655
583
630
565
568
605
nm
Dominant Wavelength
(typ.) λdom
639
585
620
573
574
610
nm
Notes:
1. Dot to dot intensity matching at 100% brightness is 1.8:1.
2. Displays within a given intensity category have an intensity matching of 1.5:1 (max.).
2006-03-30
3
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Electrical Characteristics (over operating temperature)
Parameter
Min.
Typ.
Max.
Units
Conditions
VCC
4.5
5.0
5.5
V
—
ICC (Power Down) 1) 2)
—
—
50
µA
VCC=5.0 V, all inputs=0 V or VCC
ICC 4 digits 20 dots/character3)
90
115
130
mA
VCC=5.0 V, “#” displayed in all 4 digits
at 100% brightness at 25°C
IIL Input current
—
—
–10
µA
VCC=5.0 V, VIN=0 (all inputs)
IIH Input current
—
—
10
µA
VCC=VIN=5.0 V (all inputs)
VIH
3.5
—
—
V
VCC=4.5 V to 5.5 V
VIL
—
—
1.5
V
VCC=4.5 V to 5.5 V
Row Multiplex Rate
375
768
1086
Hz
—
θJC-pin
—
—
45
°C/W
—
Notes:
1)
Unused inputs must be tied high.
2)
External oscillator must be stopped.
3)
Peak current 5/3 x ICC.
Electrical Characteristics for SCE574x only
Parameter
Min.
Typ.
Max.
Units
Conditions
IOH (CLK I/O)
—
–28
—
mA
VCC=4.5 V, VOH=2.4 V
IOL (CLK I/O)
—
23
—
mA
VCC=4.5 V, VOL=0.4 V
Fext External Clock Input
Frequency
120
—
3
MHz
VCC=5.0 V, CLKSEL=0
Fosc Internal Clock Input
Frequency
120
—
347
kHz
VCC=5.0 V, CLKSEL=1
Clock I/O Bus Loading
—
—
240
pF
—
Clock Out Rise Time
—
—
500
ns
VCC=4.5 V, VOH=2.4 V
Clock Out Fall Time
—
—
500
ns
VCC=4.5 V, VOH=0.4 V
Input/Output Circuits
Figures „Inputs“ and „Clock I/O“ show the input and output resistor/diode networks used for ESD protection and to eliminate substrate latch-up caused by input voltage over/under shoot.
Inputs
Clock I/O (SCE574X only)
VCC
Input
VCC
1 kΩ
input/output
1 KΩ
GND
GND
IDCD5021
2006-03-30
4
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Switching Specifications
(over operating temperature range and VCC=4.5 V to 5.5 V)
Symbol
Description
Min.
Units
Description
Min.
Units
TRC
Reset Active Time
600
ns
TSDCW
Symbol
Clock Width
70
ns
TLDS
Load Setup Time
50
ns
TLDH
Load Hold Time
0
ns
TDS
Data Setup Time
50
ns
TDH
Data Hold Time
25
ns
TSDCLK
Clock Period
200
ns
TWR
Total Write Time
2.2
µs
TBL
Time Between Loads
600
ns
Note:
TSDCW is the minimum time the SDCLK may be low or high.
The SDCLK period must be a minimum of 200 ns.
Timing Diagram—Data Write Cycle
T LDS
LOAD
T DS
DATA
TLDH
D0
D7
TDH
SDCLK
T SDCW
T
SDCLK
Timing Diagram—Instruction Cycle
TWR
TBL
LOAD
SDCLK
DATA
D0
D1
D2
D3
D4
D5
D6
D7
D0
D4
D5
D6
D7
D0
OR
LOAD
SDCLK
DATA
2006-03-30
D0
D1
D2
D3
5
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Top View
Pin Definitions
14
Digit 0
Pins
Digit 1
1
8
Digit 2
Pin
Function
Definitions
1
VCC
Power supply
2
LOAD
Low input enables data clocking into 8-bit
serial shift register. When LOAD goes high,
the contents of 8-bit serial Shift Register will
be decoded.
Digit 3
3
DATA
Serial data input
7
4
N/C
no connection
5
SDCLK
for loading data into the 8-bit serial data
register
6
RST
Asynchronous input, when low clears the
Multiplex Counter, Control Word Register,
User RAM and Data Register. Control Word
Register is set to 100% brightness. The
display will be blank.
Pins
IDPA5105
Pin Assignment
Pin
Function
Pin
Function
1
VCC
14
CLK SELECT
2
LOAD
13
no pin
7
GND
Supply ground
3
DATA
12
no pin
8
CLK I/O
Outputs master clock or inputs external clock.
4
no connection
11
no pin
9
N/P
No pins
5
SDCLK
10
no pin
10
N/P
No pins
6
RST
9
no pin
11
N/P
No pins
7
GND
8
CLK I/O
12
N/P
No pins
13
N/P
No pins
14
CLKSEL
H=internal clock, L=external clock
Dot Matrix Format
C1
C2
C3
C4
C5
Display Column and Row Format
R0
R1
R2
0.23 (0.009) typ.
R3
6.86 (0.270)
1.09 (0.043) typ.
4.45 (0.175)
R4
C0
C1
C2
C3
C4
Row 0
1
1
1
1
1
Row 1
0
0
1
0
0
Row 2
0
0
1
0
0
Row 3
0
0
1
0
0
Row 4
0
0
1
0
0
Row 5
0
0
1
0
0
Row 6
0
0
1
0
0
1= Display dot „ON“
0=Display dot „OFF“
R5
R6
Column Data Ranges
1.14 (0.045) typ.
Tolerance: ±0.25 (0.010)
Row 0
00H to 1FH
Row 4
00H to LFH
Row 1
00H to LFH
Row 5
00H to LFH
Row 2
00H to LFH
Row 6
00H to LFH
Row 3
00H to LFH
IDOD5013
Dimensions in inches (mm)
2006-03-30
6
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Block Diagram
RST
DATA
SDCLK
LOAD
OSC
64
Counter
Y Address Decode
CLKSEL
8-bit Serial Register
CLK I/O
7
Counter
MUX
Rate
Column
Drivers
Digit
0 to 4
User RAM
Memory
7 x 20 bits
Row Control Logic
and Row Drivers
Rows
0 to 6
Display
Column 0 to 20
0
1
2
3
X Address Decode
3-bit Address Register
6-bit Control
Word Register
Control Word Logic
Operation of the SCE574x
The SCE574x display consists of a CMOS IC containing control
logic and drivers for four 5 x 7 characters. These components are
assembled in a compact plastic package.
Individual LED dot addressability allows the user great freedom in
creating special characters or mini-icons.
The serial data interface provides a highly efficient interconnection
between the display and the mother board. The SCE574x requires
only three lines as compared to 14 lines for an equivalent four
character parallel input part.
The on-board CMOS IC is the electronic heart of the display. The
IC accepts decoded serial data, which is stored in the internal
RAM. Asynchronously the RAM is read by the character multiplexer at a strobe rate that results in a flicker free display. Figure
„Block Diagram“ (page 7) shows the three functional areas of the
IC. These include: the input serial data register and control logic, a
140 bits two port RAM, and an internal multiplexer/display driver.
2006-03-30
IDBD5063
The following explains how to format the serial data to be loaded
into the display. The user supplies a string of bit mapped decoded
characters. The contents of this string is shown in Figure „Loading
Serial Character Data a“ (page 8). Figure „Loading Serial Character Data b“ (page 8) shows that each character consist of eight 8
bit words. The first word encodes the display character location
and the succeeding five bytes are row data. The row data represents the status (On, Off) of individual column LEDs. Figure „Loading Serial Character Data c“ (page 8) shows that each 8 bit word is
formatted to represent Column Data or Character Address.
Figure „Loading Serial Character Data d“ (page 8) shows the
sequence for loading the bytes of data. Bringing the LOAD line low
enables the serial register to accept data. The shift action occurs
on the low to high transition of the serial data clock (SDCLK). The
least significant bit (D0) is loaded first. After eight clock pulses the
LOAD line is brought high. With this transition the OPCODE is
decoded. The decoded OPCODE directs D4–D0 to be latched in
the Character Address register, stored in the RAM as Column
data, or latched in the Control Word register. The control IC
requires a minimum 600 ns delay between successive byte loads.
7
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Loading Serial Character Data
Example: Serial Clock=5.0 MHz, Clock Period=200 ns
352 Clock Cycles, 70.4 µs
a.
Character 0
Character 1
Character 2
Character 3
88 Clock Cycles, 17.6 µs
Character 0
Address
b.
Row 0
Row 1
Row 2
Row 3
Row 4
Column Data Column Data Column Data Column Data Column Data
11 Clock Cycles, 2.2 µs
Row 6
Column Data
11 Clock Cycles, 2.2 µs
Time
Character Address
OPCODE
D0 D1 D2 D3 D4 D5 D6 D7 Between
Loads
0
0
0
0 0
1
0
1 600ns(min)
c.
Row 5
Column Data
Time
Column Data
OPCODE
D0 D1 D2 D3 D4 D5 D6 D7 Between
Loads
0
0 600ns(min)
D D D D D 0
LOAD
Clock
Period
Serial
Clock
DATA
d.
D0
D1
D2
D3
D4
D5
D6
D7
Time between Loads
t0
Table „Character ’D’“ (page 8) shows the Row Address for the
example character “D.” Column data is written and read asynchronously from the 140 bit RAM. Once loaded the internal oscillator
and character multiplexer reads the data from the RAM. These
characters are row strobed with column data as shown in Figures
„Row and Columns Locations for a Character ’D’“ (page 8) and
„Row Strobing“ (page 9). The character strobe rate is determined
by the internal or user supplied external MUX Clock, the IC’s
counter and the prescaler.
Row and Column Locations for a Character “D”
Off LED
Row 1
On LED
Row 2
Character “D”
Row 3
Op code
D7 D6 D5
Column Data
D4 D3 D2
C0 C1 C2
D1
C3
D0
C4
Row 0
0
0
0
1
1
1
1
0
1E
Row 1
0
0
0
1
0
0
0
1
11
Row 2
0
0
0
1
0
0
0
1
11
Row 3
0
0
0
1
0
0
0
1
11
Row 4
0
0
0
1
0
0
0
1
11
Row 5
0
0
0
1
0
0
0
1
11
Row 6
0
0
0
1
1
1
1
0
1E
2006-03-30
Row 0
Hex
Row 4
Row 5
Row 6
0
1 2 3
Columns
4
IDXX5183
8
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Row Strobing
Row
Load
Load Row 0
Load Row 1
Load Row 2
Load Row 3
Load Row 4
Load Row 5
Load Row 6
0
0
0
0
0
0
0
1
1
1
1
1
1
1
2
2
2
2
2
2
2
3
3
3
3
3
3
3
4
4
4
4
4
4
4
5
5
5
5
5
5
6
6
0 1 2 3 4
Columns
6
0 1 2 3 4
Columns
6
0 1 2 3 4
Columns
6
0 1 2 3 4
Columns
5
6
0 1 2 3 4
Columns
6
0 1 2 3 4
Columns
0 1 2 3 4
Columns
IDXX5184
Multiplexer and Display Driver
The four characters are row multiplexed with RAM resident column
data. The strobe rate is established by the internal or external
MUX Clock rate. The MUX Clock frequency is divided by a 448
counter chain. This results in a typical strobe rate of 768 Hz. By
pulling the Clock SEL line low, the display can be operated from an
external MUX Clock. The external clock is attached to the CLK I/O
connection (pin 8). The maximum external MUX Clock frequency
should be limited to 3 MHz.
When a high speed external clock is used the frequency can be
further divided down by 16 by using the built in prescaler. In the
control word format data bit D4 is set high (D4=1). It is not recom-
mended to use the prescaler with the internal clock.
An asynchronous hardware Reset (pin 6) is also provided. Bringing this pin low will clear the Character Address Register, Control
Word Register, RAM, and blanks the display. This action leaves the
display set at Character Address 0, and the Brightness Level set at
100%.
The user can activate four Control functions. These include: LED
Brightness Level, IC Power Down, Prescaler, or Display Clear.
OPCODEs and six bit words are used to initiate these functions.
The OPCODEs and Control Words for the Character Address and
Loading Column Data are shown in Tables „Load Character
Address“ (page 10) and „Load Column Data“ (page 10).
Basic Instruction Set
Instruction
Opcode
Address/Data
LCD
000
D4
LDA
101
X
SCL
110
LCWD
111
Comments
D3
D2
D1
D0
Load Column Data
X
A2
A1
A0
Load Digit Address
PS
B3
B2
B1
B0
Software Clear
PS
B3
B2
B1
B0
Load Control Word Data
Control Word Format
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
PS
B3
B2
B1
B0
PS Pre-Scalar
0 No Divide
by 16
1 MUX Clock/16
B2
0
0
0
0
1
1
1
1
B1
0
0
1
1
0
0
1
1
B0
0
1
0
1
0
1
0
1
Brightness
100%
53%
40%
27%
20%
13%
6.6%
Blank Display &
Power Down
B3 Peak Current
0 Full
1 Reduce to 12.5%
IDCW5162
2006-03-30
9
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Op code
D7 D6 D5
Character Address
D4 D3 D2 D1 D0
Hex
Operation
Load
1
0
1
0
0
0
0
0
A0
Character 0
The SCE574X offers a unique Display Power Down feature which
reduces ICC to less than 50 µA. When EFHEX is loaded, as shown in
Table „Power Down“ (page 10), the display is set to 0% brightness.
When in the Power Down mode data may still be written into the
RAM. The display is reactivated by loading a new Brightness Level
Control Word into the display.
1
0
1
0
0
0
0
1
A1
Character 1
Power Down
1
0
1
0
0
0
1
0
A2
Character 2
1
0
1
0
0
0
1
1
A3
Character 3
Load Character Address
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1
D0
1
0
1
1
1
1
1
1
Hex
Operation
Level
EF
0%
brightness
Load Column Data
Op code
D7 D6 D5
Column Data
D4 D3 D2 D1
D0
Operation Load
0
0
0
C0 C1
C2
C3
C4
Row 0
0
0
0
C0 C1
C2
C3
C4
Row 1
0
0
0
C0 C1
C2
C3
C4
Row 2
The Software Clear (C0HEX), given in Table „Software Clear“
(page 10), clears the Address Register and the RAM. The display
is blanked and the Character Address Register will be set to Character 0. The internal counter and the Control Word Register are
unaffected. The Software Clear will remain active until the next
data input cycle is initiated.
0
0
0
C0 C1
C2
C3
C4
Row 3
Software Clear
0
0
0
C0 C1
C2
C3
C4
Row 4
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1
D0
0
0
0
C0 C1
C2
C3
C4
Row 5
1
0
0
0
0
0
C0 C1
C2
C3
C4
Row 6
The user can select eight specific LED brightness levels (Table
„Display Brightness“ (page 10)) by changing the peak current driving the LEDs. The peak current is varied by varying the ON time of
the row drivers. Note that data line 3 is low (logic 0).
If dimming is required with finer control between 12.5% brightness
and 0.0% brightness, data line 3 can be set high (logic 1). The
12.5% peak current is now the brightness reference (100%-E8) for
further dimming and as shown in Table “Display Brightness“
(page 10) eight levels of dimming are provided. For example the
hex code EC in Table “Display Brightness“ (page 10) will provide a
brightness level 29% lower than the 12.5% brightness level.
Display Brightness
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1
D0
Hex
Operation
Level
1
1
1
0
0
0
0
1
1
1
0
0
0
0
0
E0
100%
1
E1
1
1
1
0
0
0
53%
1
0
E2
1
1
1
0
0
40%
0
1
1
E3
1
1
1
0
27%
0
1
0
0
E4
1
1
1
20%
0
0
1
0
1
E5
1
1
13%
1
0
0
1
1
0
E6
1
1
6.6%
1
0
0
1
1
1
E7
0.0%
2006-03-30
10
1
0
0
0
0
Hex
Operation
Level
C0
CLEAR
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Electrical and Mechanical Considerations
Thermal Considerations
Optimum product performance can be had when the following
electrical and mechanical recommendations are adopted. The IC
is constructed in a high speed CMOS process, consequently noise
on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and RESET
lines may cause incorrect data to be written into the serial shift register. Adhere to transmission line termination procedures when
using fast line drivers and long cables (> 10 cm).
Good ground and power supply decoupling will insure that
ICC (< 400 mA peak) switching currents do not generate localized
ground bounce. Therefore it is recommended that each display
package use a 0.1 µmF and 0 µF capacitor between VCC and
ground.
When the internal MUX Clock is being used connect the CLKSEL
pin to VCC. In those applications where RESET will not be connected to the system’s reset control, it is recommended that this
pin be connected to the center node of a series 0.1 µF and 100 kΩ
RC network. Thus upon initial power up the RESET will be held
low for 10 ms allowing adequate time for the system power supply
to stabilize.
Using filters emphasizes the contrast ratio between a lit LED and
the character background. This will increase the discrimination of
different characters. The only limitation is cost. Take into consideration the ambient lighting environment for the best cost/benefit
ratio for filters.
Incandescent (with almost no green) or fluorescent (with almost no
red) lights do not have the flat spectral response of sunlight. Plastic band-pass filters are an inexpensive and effective way to
strengthen contrast ratios. The SCE5740 is a red display and
should be used with long wavelength pass filter having a sharp
cut-off in the 600 nm to 620 nm range. The SCE5742 is a
super-red display and should be used with long wavelength pass
filter having a sharp cut-off in the 570 nm to 600 nm range. The
SCE5744 is a high efficiency green display and should be used
with long wavelength pass filter that peaks at 565 nm.
Additional contrast enhancement is gained by shading the
displays. Plastic band-pass filters with built-in louvers offer the next
step up in contrast improvement. Plastic filters can be improved
further with anti-reflective coatings to reduce glare.
Optimal filter enhancements are gained by using circular polarized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through
the filter and reflects back off the display to less than 1%.
Several filter manufacturers supply quality filter materials. Some of
them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homalite, Wilmington, DE; 3M Company, Visual Products Division, St.
Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge,
MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics,
Inc., Fremont, CA.One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a
shading effect in overhead lighting situations. Several Bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components,
Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of
California, Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA. The
trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter
by allowing for proper air flow.
ESD Protection
The input protection structure of the SCE574x provides significant
protection against ESD damage. It is capable of withstanding discharges greater than 2.0 kV. Take all the standard precautions,
normal for CMOS components. These include properly grounding
personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be
met, keep the leads of the device shorted together or the parts in
anti-static packaging.
Soldering Considerations
The SCE574x can be hand soldered with SN63 solder using a
grounded iron set to 260°C.
Wave soldering is also possible following these conditions: Preheat that does not exceed 93°C on the solder side of the PC board
or a package surface temperature of 85°C. Water soluble organic
acid flux (except carboxylic acid) or rosin-based RMA flux without
alcohol can be used.
Wave temperature of 245°C ± 5°C with a dwell between 1.5 sec. to
3.0 sec. Exposure to the wave should not exceed temperatures
above 260°C for five seconds at 1.59 mm (0.063") below the seating
plane. The packages should not be immersed in the wave.
Microprocessor Interface
The microprocessor interface is through the serial port, SPI port or
one out of eight data bits on the eight bit parallel port and also control lines SDCLK and LOAD.
Power Up Sequence
Upon power up display will come on at random. Thus the display
should be reset at power-up. The reset will set the Address Register to Digit 0, User RAM is set to 0 (display blank) the Control Word
is set to 0 (100% brightness) and the internal counters are reset.
Post Solder Cleaning Procedures
The least offensive cleaning solution is hot D.I. water (60 °C) for
less than 15 minutes. Addition of mild saponifiers is acceptable. Do
not use commercial dishwasher detergents.
For faster cleaning, solvents may be used. Exercise care in choosing solvents as some may chemically attack the nylon package.
For further information refer to Appnotes 18 and 19.
An alternative to soldering and cleaning the display modules is to
use sockets. Naturally, 14 pin DIP sockets 7.62 mm (0.300”) wide
with 2.54 mm (0.100") centers work well for single displays. Multiple display assemblies are best handled by longer SIP sockets or
DIP sockets when available for uniform package alignment.
Optical Considerations
The 4.57 mm (0.180") high character of the SCE574x gives readability up to five feet. Proper filter selection enhances readability
over this distance.
2006-03-30
11
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Display Interface to Siemens/Intel 8031 Microprocessor (using serial port in mode 0)
VCC
40
19
XTAL2
RxD
XTAL1
TxD
VCC
10
11
5
2
U1
8031
VCC
9
P3.7
RST
P3.3
P3.4
17
6
13
7
DATA
SDCLK
3
22 µF
TAN
+
18
LD
ID
RST
VCC
GND
CLKSEL
14
CLK I/O
1
14
0.01 µF
8
IDCD5027
Display Interface to Siemens/Intel 8031 Microprocessor (using one bit of parallel port as serial port)
VCC
40
19
XTAL2
P3.0
P3.1
1
9
VCC
11
XTAL1
P3.6
U1
8031
VCC
10
P0.0
16
5
39
2
RST
6
P1.0
7
SDCLK
LD
DATA
ID
20
RST
VCC
GND
CLKSEL
CLK I/O
22 µF
TAN
3
+
18
1
14
0.01 µF
8
IDCD5028
Display Interface with Motorola 68HC05C4 Microprocessor (using SPI port)
VCC
40
39
OSC1
PA1
1
9
11
VCC
10
OSC2
U1
68HC05C4
VCC
PA0
SCLK
MOSI
33
5
32
2
RST
6
PA2
7
20
SDCLK
LD
DATA
ID
RST
VCC
GND
CS
CLK I/O
3
22 µF
TAN
+
38
1
14
8
0.01 µF
IDCD5029
2006-03-30
12
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Cascading Multiple Displays using only the SCE574x.
RST
VCC
RST
CLK I/O
CLK SEL
RST
14 more displays
in between
Intelligent Display
DATA
SDCLK
CLK I/O
DATA
LOAD
CLK SEL
Intelligent Display
SDCLK
LOAD
DATA
SDCLK
0
A0
A1
A2
A3
Address
Decoder
Chip
15
LD
CE
Address Decode 1-14
IDCD5030
Multiple displays can be cascaded using the CLK SEL and CLK I/O pins (Figure „Cascading Multiple Displays using only the SCE574X“
(page 13)). The display designated as the MasterClock source should have its CLK SEL pin tied high and the slaves should have their
CLK SEL pins tied low. All CLK I/O pins should be tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters.
Loading Data into the Display
Use following procedure to load data into the display:
1. Power up the display.
2. Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word
Register, User Ram and Data Register. The display will be
3.
4.
5.
6.
blank. Display brightness is set to 100%.
If a different brightness is desired, load the proper brightness
opcode into the Control Word Register.
Load the Digit Address into the display.
Load display row and column data for the selected digit.
Repeat steps 4 and 5 for all digits.
Data Contents for the Word “ABCD”
Step
D7
D6
D5
D4
D3
D2
D1
D0
Function
A
B (optional)
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
CLEAR
100% BRIGHTNESS
1
2
3
4
5
6
7
8
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
1
0
1
0
0
0
0
1
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
0
1
1
1
1
1
DIGIT D0 SELECT
ROW 0 (A)
ROW 1 (A)
ROW 2 (A)
ROW 3 (A)
ROW 4 (A)
ROW 5 (A)
ROW 6 (A)
9
10
11
12
13
14
15
16
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
1
1
1
0
1
1
1
DIGIT D1 SELECT
ROW 0 (B)
ROW 1 (B)
ROW 2 (B)
ROW 3 (B)
ROW 4 (B)
ROW 5 (B)
ROW 6 (B)
17
18
19
20
21
22
23
24
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
0
1
1
1
0
0
0
0
0
1
0
1
0
0
0
0
0
1
DIGIT D2 SELECT
ROW 0 (C)
ROW 1 (C)
ROW 2 (C)
ROW 3 (C)
ROW 4 (C)
ROW 5 (C)
ROW 6 (C)
25
26
27
28
29
30
31
32
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
1
1
1
0
0
0
0
0
1
1
0
1
1
1
1
1
0
DIGIT D3 SELECT
ROW 0 (D)
ROW 1 (D)
ROW 2 (D)
ROW 3 (D)
ROW 4 (D)
ROW 5 (D)
ROW 6 (D)
2006-03-30
13
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Dimensions in inch (mm)
SCE574X Z
OSRAM
XXYY
V
Luminous
Intensity Code
0.46 (0.018)
2.54 (0.100) 12 pl.
Non cumulative
5.08 (0.200)
EIA
Date Code
Part Number
4.06 (0.160) ±0.51 (0.020)
Pin 1
Indicator
3.81 (0.150)
Detail Drawing of SCE574x
0.3 (0.012)
±0.05 (0.002)
7.62 (0.300) ±0.51 (0.020)
19.91 (0.784)
10.16 (0.400) ±0.38 (0.015)
2.54 (0.100) 5.00 (0.197)
3 pl.
4.57 (0.180)
Dimensions in
inches (mm)
Tolerance:
.XXX = ±.010 (.25)
IDOD5007
Pin Functions for SCE574x
Function
Pin #
Function
1
VCC
6
RESET
2
Load
7
GROUND
3
Data
8
CLK I/O
4
No Pin
9—13
No Pins
5
SDCLK
14
CLK
SELECT
Top View
Typical Character
Pin 14
Pin 8
Pin 1
2006-03-30
0.71 (0.028)
Pin #
Pin 7
IDPA5107
0.56 (0.022)
IDOD5008
14
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
SCE574XP Z
OSRAM
XXYY
V
Luminous
Intensity Code
0.46 (0.018) 8 pl.
2.54 (0.100) 4 pl.
Tol. Non Accum.
3.81 (0.150)
Dimensions in inch (mm)
EIA
Date Code
Part Number
5.08 (0.200)
Pin 1
Indicator
0.3 (0.012) 6 pl.
5.08 (0.200)
4.06 (0.160) ±0.51 (0.020)
Detail Drawing of SCE574xP (SIP configuration)
19.91 (0.784)
1.22 (0.048) 5 (0.197)
4.57 (0.180)
10.16 (0.400)
3 pl.
Unless otherwise specified,
tolerance on dimensions is ±0.25 (0.010)
2.54 (0.100) 4 pl.
IDOD5009
V
0.46 (0.018) 6 pl.
2.54 (0.100) 4 pl.
Tol. Non Accum.
5.08 (0.200)
5.08 (0.200)
SCE574XQ Z
OSRAM
XXYY
Luminous
Intensity Code
3.81 (0.150)
EIA
Date Code
Part
Number
0.71 (0.028)
Pin 1
Indicator
1.26 (0.050) ±0.51 (0.020)
Detail Drawing of SCE574xQ (SIP configuration with right angle bend Dimensions in inch (mm))
4.06 (0.160) ±0.51 (0.020)
19.91 (0.784)
1.22 (0.048) 5 (0.197)
0.56 (0.022)
4.57 (0.180)
10.16 (0.400)
3 pl.
IDOD5011
Unless otherwise specified,
tolerance on dimensions is ±0.25 (0.010)
2.54 (0.100) 4 pl.
IDOD5010
Pin Functions for SCE574xP and SCE574xQ
Function
1
VCC
2
Load
3
Data
4
No Pin
5
SDCLK
6
RESET
7
GND
Top View
Typical Character
0.71 (0.028)
Pin #
Pin 1
Pin 7
0.56 (0.022)
IDPA5108
IDOD5011
2006-03-30
15
SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745
Revision History: 2006-03-30
Previous Version: 2005-01-10
Page
Subjects (major changes since last revision)
Date of change
all
Lead free device
2006-01-23
Published by
OSRAM Opto Semiconductors GmbH
Wernerwerkstrasse 2, D-93049 Regensburg
www.osram-os.com
© All Rights Reserved.
Attention please!
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved. Due to technical requirements components may contain
dangerous substances. For information on the types in question please contact our Sales Organization.
If printed or downloaded, please find the latest version in the Internet.
Packing
Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office.
By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing
material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs
incurred.
Components used in life-support devices or systems must be expressly authorized for such purpose! Critical
components1) may only be used in life-support devices or systems2) with the express written approval of OSRAM OS.
1)
2)
A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the
failure of that life-support device or system, or to affect its safety or the effectiveness of that device or system.
Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain
human life. If they fail, it is reasonable to assume that the health and the life of the user may be endangered.
2006-03-30
16