DLA100B1200LB
3~
1~
Rectifier
High Efficiency Standard Rectifier
VRRM = 1200 V
I DAV =
124 A
I FSM =
400 A
1~ Rectifier Bridge
Part number
DLA100B1200LB
Marking on Product: DLA100B1200LB
Backside: isolated
8 = n/c
4
5
6
9
7
1
2
3
Features / Advantages:
Applications:
Package: SMPD
● Planar passivated chips
● Very low leakage current
● Very low forward voltage drop
● Improved thermal behaviour
● Diode Bridge for main rectification
● Isolation Voltage: 3000 V~
● Industry convenient outline
● RoHS compliant
● Epoxy meets UL 94V-0
● Soldering pins for PCB mounting
● Backside: DCB ceramic
● Reduced weight
● Advanced power cycling
Disclaimer Notice
Information furnished is believed to be accurate and reliable. However, users should independently
evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for,
and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics.
IXYS reserves the right to change limits, conditions and dimensions.
© 2019 IXYS all rights reserved
Data according to IEC 60747and per semiconductor unless otherwise specified
20190212b
DLA100B1200LB
Ratings
Rectifier
Conditions
Symbol
VRSM
Definition
max. non-repetitive reverse blocking voltage
TVJ = 25°C
VRRM
max. repetitive reverse blocking voltage
TVJ = 25°C
IR
reverse current
VF
forward voltage drop
min.
typ.
1200
TVJ = 25°C
10
µA
VR = 1200 V
TVJ = 150°C
0.1
mA
IF =
TVJ = 25°C
1.23
V
1.45
V
1.15
V
IF =
50 A
TVJ = 150 °C
50 A
I F = 100 A
bridge output current
VF0
threshold voltage
rF
slope resistance
R thJC
thermal resistance junction to case
V
VR = 1200 V
I F = 100 A
I DAV
max. Unit
1200
V
TC = 135 °C
1.44
V
T VJ = 175 °C
124
A
TVJ = 175 °C
0.75
V
4.2
mΩ
180° sine
for power loss calculation only
R thCH
thermal resistance case to heatsink
Ptot
total power dissipation
I FSM
max. forward surge current
I²t
CJ
value for fusing
junction capacitance
IXYS reserves the right to change limits, conditions and dimensions.
© 2019 IXYS all rights reserved
1 K/W
K/W
0.40
TC = 25°C
150
W
t = 10 ms; (50 Hz), sine
TVJ = 45°C
400
A
t = 8,3 ms; (60 Hz), sine
VR = 0 V
430
A
t = 10 ms; (50 Hz), sine
TVJ = 150 °C
340
A
t = 8,3 ms; (60 Hz), sine
VR = 0 V
365
A
t = 10 ms; (50 Hz), sine
TVJ = 45°C
800
A²s
t = 8,3 ms; (60 Hz), sine
VR = 0 V
770
A²s
t = 10 ms; (50 Hz), sine
TVJ = 150 °C
580
A²s
555
A²s
t = 8,3 ms; (60 Hz), sine
VR = 0 V
VR = 400 V; f = 1 MHz
TVJ = 25°C
13
Data according to IEC 60747and per semiconductor unless otherwise specified
pF
20190212b
DLA100B1200LB
Package
Ratings
SMPD
Symbol
I RMS
Definition
Conditions
RMS current
per terminal
min.
TVJ
virtual junction temperature
T op
operation temperature
Tstg
storage temperature
-55
max.
100
Unit
A
-55
175
°C
-55
150
°C
150
°C
8.5
Weight
FC
40
mounting force with clip
d Spp/App
t = 1 minute
~
UL Logo
~
Assembly line
N
mm
terminal to backside
4.0
mm
3000
V
2500
V
50/60 Hz, RMS; IISOL ≤ 1 mA
Part description
~
D
L
A
100
B
1200
LB
Backside DCB
Part number
Date code
130
1.6
t = 1 second
isolation voltage
g
terminal to terminal
creepage distance on surface | striking distance through air
d Spb/Apb
VISOL
typ.
XXXXXXXXXX
yywwA
=
=
=
=
=
=
=
Diode
Low Voltage Standard Rectifier
(up to 1200V)
Current Rating [A]
1~ Rectifier Bridge
Reverse Voltage [V]
SMPD-B
Data Matrix Code
Digits
1 to 19:
20 to 23:
24 to 25:
26 to 31:
32:
33 to 36:
Part #
Date Code
Assembly line
Lot #
Split Lot
Individual #
Pin 1 identifier
Ordering
Standard
Alternative
Ordering Number
DLA100B1200LB-TUB
DLA100B1200LB-TRR
Equivalent Circuits for Simulation
I
V0
R0
Marking on Product
DLA100B1200LB
DLA100B1200LB
* on die level
Delivery Mode
Tube
Tape & Reel
Code No.
517180
517187
T VJ = 175 °C
Rectifier
V 0 max
threshold voltage
0.51
V
R0 max
slope resistance *
1.3
mΩ
IXYS reserves the right to change limits, conditions and dimensions.
© 2019 IXYS all rights reserved
Quantity
20
200
Data according to IEC 60747and per semiconductor unless otherwise specified
20190212b
DLA100B1200LB
Outlines SMPD
A(8:1)
2)
5,5 `0,1
(6x) 1 `0,05
0 + 0,15
2°
c 0,1
0,5 ` 0,1
1)
18 `0,1
seating plane
(3x) 2 `0,05
9 `0,1
2)
4 `0,05
8
9
32,7 ` 0,5
23 `0,2
2 `0,2
7
0,55 `0,1
4,85 ` 0,2
25 `0,2
3)
c 0,05
6 5 4
A
3 2 1
Pin number
2,75 `0,1
Notes:
1) potrusion may add 0.2 mm max. on each side
2) additional max. 0.05 mm per side by punching misalignement
or overlap of dam bar or bending compression
3) DCB area 10 to 50 µm convex;
position of DCB area in relation to plastic rim: ±25 µm
(measured 2 mm from Cu rim)
4) terminal plating: 0.2 - 1 µm Ni + 10 - 25 µm Sn (gal v.)
cutting edges may be partially free of plating
5,5 ` 0,1
13,5 ` 0,1
16,25 `0,1
19 `0,1
8 = n/c
4
5
6
IXYS reserves the right to change limits, conditions and dimensions.
© 2019 IXYS all rights reserved
9
7
1
2
3
Data according to IEC 60747and per semiconductor unless otherwise specified
20190212b
DLA100B1200LB
Rectifier
100
103
500
50 Hz, 80% VRRM
80
TVJ = 45°C
400
TVJ = 150°C
TVJ = 45°C
60
IF
IFSM
[A]
I 2t
[A2s]
[A]
TVJ = 150°C
40
300
200
VR = 0 V
125°C
25°C
20
100
0
0.0
0.5
1.0
1.5
0
0.001
2.0
VF [V]
Ptot = Power losses
of all diodes
160
102
0.01
0.1
100
2
4 5 6 7 8 910
t [ms]
Fig. 3 I2t versus time per diode
sin. 180°
rect. D = 0.5
per diode
100
RthHA:
0.3 K/W
0.7 K/W
1.2 K/W
2 K/W
3 K/W
5 K/W
10 K/W
rect.
D = 0.5
Ptot
1
Fig. 2 Surge overload current
140
120
1
t [s]
Fig. 1 Forward current versus
voltage drop per diode
180
TVJ = 150°C
[W]
80
80
sin. 180°
per diode
Id(AV)M
60
[A]
40
60
40
20
20
0
0
0
20
40
60
0
Id(AV)M [A]
20 40 60 80 100 120 140 160 180 200
0
25
50
75 100 125 150 175
TC [°C]
Tamb [°C]
Fig. 4 Power dissipation vs. bridge output current and ambient temperature
Fig. 5 Max. bridge output current
vs. case temperature
1.2
1.0
ZthJC
Constants for ZthJC calculation:
0.8
K/W
i
0.6
0.4
0.2
0.0
0.001
0.01
0.1
1
Rthi [K/W]
ti [s]
1
0.09
0.003
2
0.116
0.062
3
0.386
0.1
4
0.128
0.55
10
t [s]
Fig. 6 Transient thermal impedance junction to case
IXYS reserves the right to change limits, conditions and dimensions.
© 2019 IXYS all rights reserved
Data according to IEC 60747and per semiconductor unless otherwise specified
20190212b