D ata sh eet
A S3 7 1 0
Tri p le B u c k H ig h Cu rr e n t P M IC w i th Ch a r g e r
1 General Description
HV Backlight Driver
3x step up with external transistor
- e.g. 0.5-1A@5V; 40mA@50V
Voltage control mode and over-voltage protection
3 programmable current sinks (max. 40mA)
Possible external PWM dimming input (DLS, CABC)
The AS3710 is a compact System PMU with integrated battery
charger and back light driver.
The device offers advanced power management functions. All
necessary ICs and peripherals in a battery powered mobile device
are supplied by the AS3710. It features 3 DCDC buck converters as
well as 8 low noise LDOs. The different regulated supply voltages
are programmable via the serial control interface. 4MHz operation
with 1uH coils are reducing cost and PCB space.
The three step-up converter generate voltages for e.g.the backlight,
classD amplifier, USB host support or LCD display supply. Both
constant voltage (for e.g. OLED supply) as well as constant current
(white LED backlight) operations with three current sinks are
possible. An internal voltage protection is limiting the output voltage
in the case of external component failures.
AS3710 contains a linear or switching mode Li-Ion battery charger
with constant current and constant voltage. The maximum charging
current is 1.5A. An integrated battery switch and an optional external
switch are separating the battery during charging or whenever an
external power supply is present. With this switch it is also possible
to operate with no or deeply discharged batteries. A programmable
current limit (100mA - 2.5A) can be used to control the maximum
current used from a USB supply or charger input. Additional features
are a 30V OV protection and battery temperature supervision.
The single supply voltage may vary from 2.7V to 5.5V.
Battery Charger
Programmable trickle charging (25-220mA)
Programmable constant current charging (up to 1500mA)
Programmable constant voltage charging (3.9V-4.25V)
Charger time-out and temperature supervision
Selectable current limitation for USB mode
Integrated battery switch & ideal diode (linear mode)
External battery switch control (switching mode)
External 30V OV protection
Supervisor
Automatic battery monitoring with interrupt generation and
selectable warning level
Automatic temperature monitoring with interrupt generation and
selectable warning and shutdown levels
Real Time Clock
Ultra low power 32kHz oscillator
2 Key Features
Sec and minute counter, auto wake-up
Voltage Generation
Programmable alarm
Repeating alarm (seconds, minutes, 2 minutes, or 8 minutes)
3 DCDC step down regulators (2-4MHz)
32kHz clock output to peripheral
3.0V, VCP=5.2V, Iout300mA
30
mV
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Table 7. Digital LDO (LDO3, LDO4, LDO5, LDO6, LDO7, LDO8) Characteristics
VLDOx_IN=3.7V; ILOAD=150mA; Tamb=25ºC; CLOAD =1µF (Ceramic); unless otherwise specified
Symbol
Parameter
Note
Min
Typ
Max
Unit
ILIMIT_LDO3-8_L
low current limit
ldoX_ilimit = 0
300
mA
ILIMIT_LDO3-8_H
high current limit
ldoX_ilimit = 1
500
mA
1.Guaranteed by design and verified by laboratory evaluation and characterization; not production tested
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
8.4
Low power LDO V2_5 Regulators
8.4.1
General Description
The low power LDO V2_5 is needed to supply the chip core (analog and digital) of the device. It is designed to get the lowest possible power
consumption, and still offering reasonable regulation characteristics. The regulator has two supply inputs selecting automatically the higher one.
This gives the possibility to supply the chip core either with the battery or with the charger depending on the conditions. Bulk switch comparators
are used to avoid any parasitic current flow. To ensure high PSRR and stability, a low-ESR ceramic capacitor of min. 1µF must be connected to
the output.
8.4.2
Parameter
Table 8. Low power LDO (V2_5) Characteristics,VBAT=3.7V; ILOAD_ext=0; Tamb=25ºC; CLOAD =1 µF (Ceramic); unless otherwise specified
Symbol
VBAT
VUSB
Parameter
Note
Supply voltage rage
RON
On resistance
IOFF
Shut down current
IVDD
Supply current
tstart
Startup time
Vout
Output voltage
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Min
Max
2.7
5.5
4.2
5.5
Guaranteed per design
Guaranteed per design, consider chip
internal load for measurements.
2.4
1.2
Typ
Unit
V
50
Ω
100
nA
3
µA
200
µs
2.5
2.6
V
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
8.5
DCDC Step-Up Converter
8.5.1
General Description
The DC/DC Step Up converter is a high efficiency current mode PWM regulator, which provides an output voltage dependent on the maximum
VDS voltage of the external transistor, and maximum load current selectable by the external shunt resistor.
For Example:
5V, 0.5-1A @ 1Mhz
25V, 50mA @ 1MHz
40V, 20mA @ 500kHz
A constant switching frequency results in a low noise on supply and output voltage.
Figure 14. DC/DC step-up Converter 1 & 3
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Figure 15. DC/DC step-up Converter 2
8.5.2
Feedback selection SU1, SU3
For step up SU1, the feedback is always FB_SU1.
For step up SU3, the feedback is always FB_SU3.
8.5.3
Feedback Selection SU2
For step up SU2 following feedback selections are possible (selected by setpup2_fb): (see Figure 15)
Current Feedback
CURR1, CURR2 or CURR3 can be selected by stepup2_fb as a current feedback pin.
The step-up converter is regulated such that the required current at the feedback path can be supported. stepup2_fbprot selects the overvoltage protection feedback pin (FB2_SU2, GPIO2, GPIO3 or GPIO4). In this mode the output voltage will be limited by limiting the voltage on
the selected feedback pin to 1.25V (select the external resistor network and stepup2_v to adjust this limitation voltage).
stepup2_prot_dis has to be set to 0, otherwise the protection is disabled.
Always choose the path with the higher voltage drop as feedback to guarantee adequate supply for the other, unregulated path.
Current Feedback with Automatic Feedback Selection
Same as above, but when currX_ctrl = 10b for the used current sinks, the chip automatically selects the highest string (CURR1, CURR2 or
CURR3) as feedback input.
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Voltage Feedback
stepup2_fb = 00b. FB2_SU2, GPIO2, GPIO3 or GPIO4 can be selected by stepup2_fbprot as a voltage feedback input.
The step-up converter output voltage is regulated by regulating the selected feedback pin voltage to 1.25V.
Calculating Resistors for Voltage Feedback or Over-Voltage Protection
Bit stepupX_res should be set to 1 in voltage feedback mode using two resistors.
The output voltage is regulated to a constant value, given by:
R1 + R2
V SU = ------------------- × 1, 25 + I FB × R 1
R2
If R2 is not used, the output voltage is:
V SU = 1, 25 + I FB × R 1
VSU: Step up regulator output voltage
R1 Feedback resistor R1
R2 Feedback resistor R2
IFB: Tuning current on DCDC_FB pin: stepupX_v (0..31µA (1µA steps))
Example:
Table 9. Step Up Output Voltage (Voltage mode or protection voltage)
IFB (stepupX_v)
VSU
VSU
µA
R1=1M Ω,R2 not used
R1=500k Ω,R2=64k Ω
0
-
11
1
-
11.5
2
-
12
3
-
12.5
4
-
13
5
6.25
13.5
6
7.25
14
7
8.25
14.5
8
9.25
15
9
10.25
15.5
10
11.25
16
11
12.25
16.5
12
13.25
17
13
14.25
17.5
14
15.25
18
15
16.25
18.5
Note: The voltage on pin CURR1, CURR2 and CURR3 must never exceed 30V.
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
8.5.4
Output disconnect
As the output voltage is always on, an additional output transistor can be added to reduce shutdown current through R1, R2 and the connected
output circuit.
Note: A similar circuit can be used for step up converter 2 or 3.
Figure 16. StepUp 1 with regulated output voltage (15V), and switch off function of output voltage, to reduce shutdown current
8.5.5
StepUp1 Load Detection and Over-current Protection Circuit
This circuit protects the DCDC step up1 converter during short circuit and startup, by regulation of the output current.
An additional feature is the detection of a minimum output load of the Step-up converter. It is also possible to use this circuit without the DCDC
step up converter, by using the sense resistor only:
Detection circuit: If the voltage on Rsense exceeds VDETECT for more than 1ms, or the DCDC Step up converter is not in pulse-skip for more
than 1ms, the stepup1_det bit will be set.
Over-current protection: If the Over-current voltage VOVCURRENT has been exceeded by more than 5ms the bit stpup1_oc will be set and
can only reset, by switching off and on the Protection circuit by writing stpup1_shortprot 0 – 1. If stpup1_oc is set the load will be disconnected, if stpup1_oc_timeout=1
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Figure 17. StepUp 1 Load Detection and Over-current Protection Application Circuit
8.5.6
Parameter
Table 10. DC/DC Step-up Controller Parameters
Symbol
Parameter
Note
IVDD
Quiescent Current
Pulse skipping mode
VFB1
Feedback voltage for external resistor
divider:
for constant voltage control
VFB2
Feedback voltage for current sink
regulation
CURR1, CURR2 or CURR3
Additional tuning current at FB_SUx
adjustable by software in 1µA steps
0
31
µA
Accuracy of feedback current
@ full scale
-7
7
%
Vrsense_max
Current limit voltage at Rsense
E.g.: 0.65A for 0.15Ω sense resistor
RSW
switch resistance
ON-resistance of external switching
transistor
Iload
Load current
at 25V output voltage
fIN
Switching frequency
internal CLK frequency/4, default 1MHz
tMIN_ON
Minimum on time
MDC
Maximum duty cycle
IDCDC_FB
Min
Typ
Max
140
1.20
1.25
µA
1.30
0.6
@ 1MHz
V
V
100
0
Unit
mV
1
Ω
50
mA
fclk_int/4
MHz
130
ns
91
%
Table 11. StepUp1 protection/detection circuit parameters
Symbol
Parameter
Note
Min
Typ
Max
Unit
VDETECT
Detection Threshold
For Rsense=0.150Ω =>
83mA typ.
2
12.5
25
mV
VOVCURRENT
Over-current Threshold
rising
For Rsense=0.150Ω =>
1.2A typ.
150
180
215
mV
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Table 11. StepUp1 protection/detection circuit parameters
Symbol
Parameter
VOVhysteresis
Over-current Hysteresis
tOV_timeout
Over-current timeout
tdetect
Detection de-bounce time
Note
Min
Typ
Max
Unit
50
mV
Interrupt and/or external PMOS switching
off after timeout
fclk_int = 2.2MHz
5
ms
fclk_int = 2.2MHz
1
ms
Table 12. DC/DC Step-up Controller External Components
Symbol
Parameter
Note
Cout
Output capacitor
ceramic, ±20%
2.2
µF
Use inductors with small Cparasitic (8V
10
µH
Use inductors with small Cparasitic (0 and charging time has been exceeded. (Can be reset by unplugging the charger, setting chg_on=0
or writing charging_tmax=0)
- VUSB over-voltage detected
- Die temp>140deg (ov_temp_140 set)
8.7.5
Battery presence indication and operation without battery
After EOC state is reached a timer for NOBAT detection is started. If there is no battery present, the VBAT voltage will drop to VRESUME.
Depending on the load on VBAT and the capacitor on VBAT this might take some milliseconds to 1 second. If the RESUME mode is enabled (Bit
auto_resume=1), the charger will restart charging (ConstantCurrent charging) after 100msec delay.
The 100msec dead time is necessary to get a battery oscillation frequency below 10Hz, if there is no battery present.
If the NOBAT detection timer is below 2 seconds after reaching EOC state, and this happens 2 times in serial, the Nobat bit in ChargerStatus
register is set. If an battery is inserted the bit will be reset after the timer exceeds the 2 seconds.
In addition, if the nobat_ntc_det bit is set the looping will be stopped and a NTC detection is started.
A pull up current of 0.5uA is applied to BATTEMP. If the BATTEMP voltage is above 1.8V, the state machine stays in the no bat state. If the
BATTEMP voltage is below 1.8V, a charging cycle is initiated.
8.7.6
Charger overvoltage protection
This blocks checks if the charger voltage VUSB is above VCHOVH. If the VUSB voltage is above VCHOVH , the pin XOFF is pulled to GND
immediately, to protect the pin VCHG_IN, and the charger is set into off state. If the VUSB voltage is below VCHOVH the XOFF pin is charged up
to VXOFF_REG with an integrated charge pump. If the pin exceeds VXOFF_MIN the usb_prot_ready bit is set and the charger is started.
8.7.7
NTC supervision
This charger block also features a supply for an external NTC resistor to measure the battery temperature while charging. If the temperature is
too high (voltage on BATTEMP pin is below VBATTEMP_ON) the charger will stop operation. If needed an interrupt can be generated based on
this event. When the battery temperature drops the charger the voltage on BATTEMP pin will rise above VBATTEMP_OFF and the charger will
start charging again. This is forming a temperature hysteresis of about 3 to 5°C to avoid an oscillation of the charger.
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
The levels for switching off the charger (ntc_temp: 45ºC or 55ºC) as well as the type of NTC (ntc_10k: 10k or 100k) can be selected via
register settings. The battery temperature supervision via the NTC can be switched off (ntc_on = 0).
The supply for the NTC will be only on when a charger is detected and ntc_on bit is set.
8.7.8
Charger Modes
Figure 20. Linear Charger Modes
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Figure 21. DCDC Charger Modes
8.7.9
Alternative Charger Input Configurations
Figure 22. Charger with Current Limiter Bypass
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
8.7.10 Parameter
TA= 25ºC, unless otherwise specified.
Table 14. Charger Parameter
Symbol
VCHDET
VCHMIN
Parameter
Condition
Min
Typ
Max
Unit
Charger Detection threshold
VUSB-VBAT
Hysteresis is > 40mV
50
75
105
mV
0
20
35
mV
VSOFT
Apply ISOFT charging current below
that VBAT voltage
1.8
V
ISOFT
Charging current if VBAT is below
VSOFT
22
mA
VTRICKLE
Trickle to CC current threshold
VBAT rising
2.9
V
mA
V
ITRICKLE
Trickle/EOC current limit
Programmable in 60mA steps
60..
240
VCHOFF
Charge termination threshold
programmable in 20mV steps between 3.5
and 4.44V
3.5..
4.44
@ ChVoltEOC=35 (4.2V)
ICC
CC current limit
4.15
linear charging mode
-10%
-7%
USB input current limit
@ 470mA
VRESUME
Resume voltage limit to start
charger
VBAT falling threshold (depending on
ChVoltResume)
VSUP_min
VSUP level for charging current
regulation (reduction), to avoid
voltage drop on VSUP
Trickle current (or constant current in linear
mode) will be regulated down, if VSUP
drops below this level
4.242
250..
1500
Programmable in 50mA steps
IUSB_limit
4.20
470
V
mA
+10%
mA
+6%
mA
140/233
mV
3.9
-6%
4.2
4.5
3%
V
4.7
IREV_OFF
Reverse current shut down
VDiode
RON_BATSW
VSUP_CHG = 5V, VUSB open
5
µA
Ideal Diode start voltage
50
mV
Battery Switch On-resistance
0.10
Ω
Temp Supervision
VBATTEMP_ON
Battery Temp. high level
(50 or 55ºC)
VSUP >3V
NTCbeta=4200
500 or
400
mV
VBATTEMP_OFF
Battery Temp. low level
(45 or 50ºC)
VSUP >3V
NTCbeta=4200
600 or
500
mV
IBATTEMP
NTC Bias Current
100kΩ NTC
10kΩ NTC
-15%
15
150
+15%
6.2
+3%
µA
XOFF overvoltage protection
monitor voltage on VUSB, disable charging
beyond this voltage (200mV hysteresis)
VCHOVH
VUSB Overvoltage Detection
VXOFF_min
Minimum XOFF voltage for charger
startup
7.5
V
VXOFF_REG
Regulation voltage for XOFF pin
10
V
IXOFF
External pull down current on XOFF Connect XOFF pin to MOSFET gates only
pin
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1.2
-3%
6.0
100
V
nA
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Table 15. External Components
Symbol
Q1PROT_NMOS
Description
Condition
Min
FDN337N
Vds=30V, 2.2A
Typ
Max
65
Unit
mΩ
FDN339AN
Vds=20V, 3A
35
mΩ
FDN327N
Vds=20V, 2A
70
mΩ
FDG311N
Vds=20V, 1.9A
115
mΩ
82
mΩ
Si1472DH
FDC637AN
Vds=20V, 6.2A
24
mΩ
FDT439N
Vds=30V, 6.3A
45
mΩ
FDN306P
@ 4.5V
40
mΩ
FDC602
@ 4.5V
33
mΩ
FDC642
@ 4.5V
65
mΩ
CUSB
Bypass capacitor on VUSB pin
± 20%, X5R or X7R dielectric / 25V
4.7
µF
CVSUP_CHG
Bypass capacitor on
VSUP_CHG
X5R or X7R dielectric
near to pin VSUP_CHG
4.7
µF
CVSUP_MIN
Bypass capacitor on VSUP
X5R or X7R dielectric, total value
CVBAT
Bypass capacitor on VBAT
X5R or X7R dielectric
10
µF
LQM2HPN1R0MJ0 (MURATA)
Ron=90mOhm / 1.5A rated current
1
µH
MLP2520S1R0M (TDK)
Ron=85mOhm / 1.5A rated current
1
µH
Q1PROT_NMOS_HC
BYPASS
Q2BATSW_NMOS
LCHGOUT
DCHGOUT
µF
10
PMEG2010 (NXP)
1A
NSR10F20NXT5G (ONSEMI)
1A
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
1,2
1
Input Current (A)
Efficiency (%)
Figure 23. Step-Down vs Linear Charger; VSUP = 4.5/5.0V, TA = +25ºC
SD charger 4.5V
linear charger 4.5V
0,8
0,6
0,4
SD charger 4.5V
linear charger 4.5V
0,2
SD charger 5V
SD charger 5V
linear charger 5V
linear charger 5V
0
1
2
3
4
5
1
Battery Voltage (V)
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2
3
4
5
Battery Voltage (V)
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - P o w e r M a n a g e m e n t F u n c t i o n s
Figure 24. Step-Down vs Linear Charger; VSUP = 4.5/5.0V, TA = +25ºC
2,5
Internal Power Dissipation (W)
SD charger 4.5V
linear charger 4.5V
2
SD charger 5V
linear charger 5V
1,5
1
0,5
0
1
2
3
4
5
Battery Voltage (V)
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - S y s t e m F u n c t i o n s
9 Detailed Description - System Functions
9.1
Start-up
Figure 25. Startup flow chart
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - S y s t e m F u n c t i o n s
9.1.1 Normal Startup
During a normal reset cycle (e.g. after the battery or a charger is inserted), after V2_5 is above VPOR and VSUP is above ResVoltRise a normal
startup happens:
The external capacitor on CREF is charged to 1.8V.
Configuration of Charger (DCDC or linear) and SD2/SD3 (combined mode or separated) is read from the Boot-OTP.
Startup State machine reads out the internal Boot-OTP. The start-up sequence of Step-Down Converter, LDO’s and GPIOs are controlled
by the Boot-OTP.
Reset-Timer is set by the Boot-OTP
The reset is released when the Reset Timer expires (external pin XRES)
9.1.2
Startup from Charger
If the voltage on pin VUSB is within VSTARTCHARGER, the AS3710 is started (even with VBAT = 0V). This allows the battery to be charged (even
from deeply discharged batteries) and finally a normal startup to happen.
9.1.3
Parameter
Table 16. Charger and ON-input Startup Conditions
Symbol
Parameter
Note
Min
Typ
Max
unit
VSTARTCHARGER
Voltage on VUSB for system
to start
on Pin VUSB
4.2
5.0
30
V
VON_IL
ON Low Level input voltage
–0.3
0.4
VON_IH
ON High Level input
1.4
VVSUP_G
ION_PD
ON Pull down current
4
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1.2
PIO
12
µA
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - S y s t e m F u n c t i o n s
9.2
Reset
9.2.1
General Description
XRES is a low active bi-directional pin. An external pull-up to the periphery supply has to be added.
During each reset cycle the following states are controlled by the AS3710:
pin XRES is forced to GND
normal startup with programmable power-on sequence and regulator voltages (see Start-up on page 36)
reset is active until the programmable reset timer (set by register bits res_timer) expires
all registers are set to their default values after power-on, except the reset control- and status-registers.
XRES is pulled high by the external resistor and the whole system is leaving the reset state
Note: Programming is controlled by the internal Boot-OTP
9.2.2
Parameter
Table 17. XRES-input Characteristics
Symbol
Parameter
VXRES_IL
XRES Low Level input
voltage
VXRES_IH
XRES High Level input
voltage
Note
Min
Typ
Max
Unit
-0.3
0.4
V
1.4
VSUP_G
PIO
V
9.2.3 Reset Conditions
Reset can be activated from 7 different sources:
Power on (battery or charger insertion)
Low Battery
Software forced reset
Power off mode
External triggered through the pin XRES
Over-temperature
Watchdog
On-key long press
Voltage detection:
There are two types of voltage dependent resets: VPOR and VXRES. VPOR monitors the voltage on V2_5 and VXRES monitors the voltage on
VSUP. The linear regulator for V2_5 is always on and uses the voltage CHGIN or VBAT VSUP as its source.
The pin XRES is only released if V2_5 is above VPOR and VSUP is above ResVotlRise.
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AS3710 2V1
Datasheet - D e t a i l e d D e s c r i p t i o n - S y s t e m F u n c t i o n s
Table 18. Reset Levels
Symbol
Parameter
Note
Min
Typ
Max
Unit
VPOR
Overall power on reset
Monitor voltage on V2_5; power on reset for
all internal functions
1.5
2.0
2.3
V
VXRESRISE
Reset level for Vsupply
rising
Monitor voltage on VSUP; rising level
ResVolt
1
Rise
V
Reset level for Vsupply
falling
Monitor voltage on VSUP; falling level
2.7
V
VXRESFALLING
if SupResEn=1 only
ResVoltF
all
V
FastResEn = 0
3
ms
VXRESMASK
Mask time for
VXRESFALLING.
Duration for
VBATResVoltRise
1 :Enter power off mode (Startup with ON key or charger insertion)
4:3
off_delay
'b01
RW
Set Delay between I2C command, GPIO or Reset signal for power_off,
standby mode or reset and execution of that command.
0 :No delay
1 :8 msec
2 :16 msec
3 :32 msec
2
-
'b0
n/a
do not use
RW
Set RESTime, after the last regulator has started
0 :RESTIME = 10ms
1 :RESTIME = 50ms
2 :RESTIME = 100ms
3 :RESTIME = 150ms
1:0
res_timer
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'b00
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ReferenceControl Register (Address 35h).
ReferenceControl
Addr: 35h
Bit
Bit Name
Default
Access
7
on_reset_delay
0
RW
Sets the on reset delay time
0 :8 sec (if onkey_reset=1)
1 :4 sec (if onkey_reset=1)
6
reg_low_bias_mode
0
RW
Sets the on reset delay time
0 :normal operation
1 :reduces the bias for the analog LDO1 and LDO2
RW
Divide internal clock oscillator by 2 to reduce quiescent current for low
power operation
0 :Normal mode
1 :Internal clock frequency divided by two. All timings are increased
by two. Switching frequency of all DCDC converters are divided by two.
Reduced transient performance of DCDC converters.
RW
Setting to 1 sets the PMU into standby mode. All regulators are
disabled except those regulators enabled by register Reg standby
mode. XRES will be pulled to low. A normal startup of all regulators will
be done with any interrupt (has to be enabled before entering standby
mode). During this startup, regulators defined by Reg standby mode
register are continuously on.
RW
Sets the internal CLK frequency fCLK used for DCDCs, PWM, ...
0 :4 MHz (default)
1 :3.8 MHz
2 :3.6 MHz
3 :3.4 MHz
4 :3.2 MHz
5 :3.0 MHz
6 :2.8 MHz
7 :2.6 MHz
All frequencies, timings and delays in this datasheet are based on
4MHz clk_int
RW
Enable low power mode of internal reference.
0 :Standard mode
1 :Low power mode - all specification except noise parameters are
still valid. Iq reduced by approx. 30µA
5
4
3:1
0
clk_div2
standby_mode_on
clk_int
low_power_on
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0
0
'b000
0
Bit Description
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ResetControl Register (Address 36h).
ResetControl
Addr: 36h
Bit
Bit Name
Default
Access
7
onkey_reset
0
RW
Bit Description
0 :Reset after 4/8 seconds ON pressed disabled
1 :Reset after 4/8 seconds ON pressed enabled
Flags to indicate to the software the reason for the last reset
.0 :VPOR has been reached (battery or charger insertion from
scratch)
.1 :ResVoltFall was reached (battery voltage drop below 2.75V)
.2 :Software forced by force_reset
.3 :Software forced by power_off and ON was pulled high
.4 :Software forced by power_off and charger was detected
.5 :External triggered through the pin XRES
.6 :Reset caused by overtemperature T140
.7 :Reset caused by watchdog
.8 :Reset caused by 4/8 seconds ON press
.9 :NA
10 :Reset caused by RTC repeated wakeup or alarm wakeup
11 :Reset caused by interrupt in standby mode
12 :Reset caused by ON pulled high in standby mode
6:3
reset_reason
'b0000
RW
2
on_input
0
R_PUSH
1
power_off
0
RW
Setting to 1 starts a reset cycle, but waits after the Reg_off state for a
rising edge on the pin ON or until the charger is detected.
0
force_reset
0
RW
Setting to 1 starts a complete reset cycle
Read: This flag represents the state of the ON pad directly
Write: Setting to 1 resets the 4/8 sec. onkey_reset timer
OvertemperatureControl Register (Address 37h).
OvertemperatureControl
Addr: 37h
Bit
Bit Name
Default
Access
7:4
-
'b0000
n/a
do not use
3
rst_ov_temp_140
0
RW
If the over-temperature threshold 2 has been reached, the flag
ov_temp_140 is set and a reset cycle is started. ov_temp_140
should be reset by writing 1 and afterward 0 to rst_ov_temp_140.
2
ov_temp_140
0
RO
Flag that the over-temperature threshold 2 (T140) has been reached this flag is not reset by a over-temperature caused reset and has to be
reset by rst_ov_temp_140.
1
ov_temp_110
0
RO
Flag that the over-temperature threshold 1 (T110) has been reached
0
temp_pmc_on
1
RO
Switch on / off of temperature supervision; default: on - all other bits are
only valid if set to 1. Leave at 1, do not disable
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Bit Description
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
WatchdogControl Register (Address 38h).
WatchdogControl
Addr: 38h
Bit
Bit Name
Default
Access
Bit Description
7:2
-
'b00 0000
n/a
do not use
1
wtdg_res_on
0
RW
If the watchdog expires and wtdg_res_on = 1 a reset cycle will be
started
0
wtdg_on
0
RW
Switches on the complete watchdog
0 :Watchdog off
1 :Watchdog enabled
Reg_standby_mod1 Register (Address 39h).
Reg_standby_mod1
Addr: 39h
Bit
Bit Name
Default
Access
Bit Description
7
disable_regpd
0
RW
This bit disables the pulldown of all regulators
0 :Normal operation approx. 1kΩ pulldown of all regulators
1 :Pulldown disabled >100kΩ of all regulators
6:4
-
b000
n/a
do not use
3
-
0
n/a
do not use
2
sd3_stby_on
0
RW
Enable Step down 3 in standby mode
1
sd2_stby_on
0
RW
Enable Step down 2 in standby mode
0
sd1_stby_on
0
RW
Enable Step down 1 in standby mode
Reg_standby_mod2 Register (Address 3ah).
Reg_standby_mod2
Addr: 3ah
Bit
Bit Name
Default
Access
7
ldo8_stby_on
0
RW
Enable LDO8 in standby mode
6
ldo7_stby_on
0
RW
Enable LDO7 in standby mode
5
ldo6_stby_on
0
RW
Enable LDO6 in standby mode
4
ldo5_stby_on
0
RW
Enable LDO5 in standby mode
3
ldo4_stby_on
0
RW
Enable LDO4 in standby mode
2
ldo3_stby_on
0
RW
Enable LDO3 in standby mode
1
ldo2_stby_on
0
RW
Enable LDO2 in standby mode
0
ldo1_stby_on
0
RW
Enable LDO1 in standby mode
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Bit Description
1.2
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
curr_control Register (Address 40h).
curr_control
Addr: 40h
Bit
7:4
3:2
1:0
Bit Name
curr3_ctrl
curr2_ctrl
curr1_ctrl
Default
'b0000
'b00
'b00
Access
Bit Description
RW
On/Off control of the pad CURR3
...0 :Current sink is turned off
...1 :Current sink is active
.. .2 :Current sink is active and LED string connected to SU2. Required
for automatic feedback selection.
.3 :Controlled by internal PWM generator, or external, if gpioX_iosf=4
.4 :XINT output (active low interrupt output)
.5 :VSUP_low output
.6 :Charger active output
.7 :EOC output
.8 :Inverted signal of ON pin as output
.9 :Signal of ON pin as output
10: Q32k output (if osc_pd=1 then internal RC oscillator with 32kHz
divider is used)
.11 :PWM output
.12 :PWRGOOD output
13-15 :NA
RW
On/Off control of the pad CURR2
0 :Current sink is turned off
1 :Current sink is active
2 :Current sink is active and LED string connected to SU2. Required
for automatic feedback selection.
3 :Controlled by internal PWM generator, or external, if gpioX_iosf=4
RW
On/Off control of the pad CURR1
0 :Current sink is turned off
1 :Current sink is active
2 :Current sink is active and LED string connected to SU2. Required
for automatic feedback selection.
3 :Controlled by internal PWM generator, or external, if gpioX_iosf=4
pwm_control_l Register (Address 41h).
pwm_control_l
Addr: 41h
Bit
7:0
Bit Name
pwm_l_time
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Default
'b00000000
Access
RW
Bit Description
This bit defines the low time of the PWM generator in 1MHz units.
.0 :pwm_div * 1µsec
.1 :pwm_div * 2µsec
.2 :pwm_div * 3µsec
... :...
255 :pwm_div * 256µsec
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
pwm_control_h Register (Address 42h).
pwm_control_h
Addr: 42h
Bit
7:0
Bit Name
pwm_h_time
Default
'b00000000
Access
RW
Bit Description
This bit defines the high time of the PWM generator in 1MHz units.
..0 :pwm_div * 1µsec
..1 :pwm_div * 2µsec
..2 :pwm_div * 3µsec
... :...
255 :pwm_div * 256µsec
curr1_value Register (Address 43h).
curr1_value
Addr: 43h
Bit
7:0
Bit Name
curr1_current
Default
'b00000000
Access
RW
Bit Description
Defines the current into CURR1, if enabled by curr1_ctrl
..0 :Power down (default state)
..1 :0.15mA (LSB)
... :...
255 :38.25mA
curr2_value Register (Address 44h).
curr2_value
Addr: 44h
Bit
7:0
Bit Name
curr2_current
Default
'b00000000
Access
RW
Bit Description
Defines the current into CURR2, if enabled by curr2_ctrl
..0 :Power down (default state)
..1 :0.15mA (LSB)
... :...
255 :38.25mA
curr3_value Register (Address 45h).
curr3_value
Addr: 45h
Bit
7:0
Bit Name
curr3_current
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Default
'b00000000
Access
RW
Bit Description
Defines the current into CURR3, if enabled by curr3_ctrl
..0 :Power down (default state)
..1 :0.15mA (LSB)
... :...
255 :38.25mA
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
Watchdog_min_timer Register (Address 46h).
Watchdog_min_timer
Addr: 46h
Bit
Bit Name
Default
Access
7:0
wtdg_min_timer
'b00000000
RW
Bit Description
Defines the minimum watchdog trigger time
(LSB=7.5ms, range: 0 - 1.9s)
Watchdog_max_timer Register (Address 47h).
Watchdog_max_timer
Addr: 47h
Bit
Bit Name
Default
Access
7:0
wtdg_max_timer
'b11111111
RW
Bit Description
Defines the maximum watchdog trigger time
(LSB=7.5ms, range: 7.5ms - 1.9s), do not set to (00)h
WatchdogSoftwareSignal Register (Address 48h).
WatchdogSoftwareSignal
Addr: 48h
Bit
Bit Name
Default
Access
Bit Description
This bit defines the divider ratio of the prescaler for the PWM generator.
0 :Divide by 1
1 :Divide by 2
2 :Divide by 4
3 :Divide by 16
7:6
pwm_div
'b00
RW
0
wtdg_sw_sig
0
PUSH
Trigger input by the serial interface if gpioX_iosf9
Access
Bit Description
Stepup_control1 Register (Address 50h).
Stepup_control1
Addr: 50h
Bit
7:3
Bit Name
stepup1_v
Default
'b0000
RW
Defines the tuning current at FB_SU1 pin;
..0 :0 µA
..1 :1 µA
... :...
.31 :31 µA
2
stepup1_res
0
RW
Gain selection for DCDC SU1
0 :If FB_SU1 is used with current feedback only (Only R1,C1
connected)
1 :If FB_SU1 is used with external resistor divider (2 resistors)
1
stepup1_freq
0
RW
Selects SU1 frequency
0 :1 MHz
1 :0.5 MHz
0
stepup1_on
0
RW
On/Off control of SU1
0 :SU1 off
1 :SU1 on
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1.2
77 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
Stepup_control2 Register (Address 51h).
Stepup_control2
Addr: 51h
Bit
7:3
Bit Name
stepup2_v
Default
'b00000
Access
Bit Description
RW
Defines the tuning current at FB_SU2 pin
..0 :0 µA
..1 :1 µA
... :...
.31 :31 µA
2
stepup2_res
0
RW
Gain selection for DCDC SU2
0 :If DCDC is used with current feedback (CURR1,CURR2,CURR3)
or if FB_SU2 is used with current feedback only (Only R1,C1
connected)
1 :If FB_SU2 is used with external resistor divider (2 resistors)
1
stepup2_freq
0
RW
Selects SU3 frequency
0 :1 MHz
1 :0.5 MHz
0
stepup2_on
0
RW
On/Off control of SU2
0 :SU2 off
1 :SU2 on
Stepup_control3 Register (Address 52h).
Stepup_control3
Addr: 52h
Bit
7:3
Bit Name
stepup3_v
Default
'b00000
Access
Bit Description
RW
Defines the tuning current at FB_SU3 pin
..0 :0 µA
..1 :1 µA
... :...
.31 :31 µA
2
stepup3_res
0
RW
Gain selection for DCDC SU3
0 :If FB_SU3 is used with current feedback only (Only R1,C1
connected)
1 :If FB_SU3 is used with external resistor divider (2 resistors)
1
stepup3_freq
0
RW
Selects SU3 frequency
0 :1 MHz
1 :0.5 MHz
0
stepup3_on
0
RW
On/Off control of SU3.
0 :SU3 off
1 :SU3 on
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1.2
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
Stepup_control4 Register (Address 53h).
Stepup_control4
Addr: 53h
Bit
Bit Name
Default
Access
Bit Description
7
stpup1_det
0
RO
SU1 detection status register
0 :VRsense < VDETECT for more than 1ms, and DCDC SU1 converter
is in pulseskip for more than 1ms.
1 :VRsense > VDETECT for more than 1ms, or the DCDC SU1
converter is not in pulseskip for more than 1ms.
6
stpup1_oc
0
RO
SU1 overcurrent status bit
0 :VRsense < VOVCURRENT
1 :VRsense > VOVCURRENT for more than 5ms (latched state)
5
stpup1_oc_timeout
0
RW
Controls GPIOx switch-off, after overcurrent timeout (5ms) for DCDC
SU1
0 :Disabled
1 :Enabled
4
stpup1_shortprot
0
RW
Enables Protection and Detection circuit for DCDC SU1
0 :No protection and load detection
1 :Short protection and load detection enabled
RW
Selects PWM operation of SU2
0 :High frequency operation PWM>20kHz**
1 :Low frequency PWM operation: stepup2_on and curr1…3_on (if
PWM enabled) switched off during PWM low time
** Step_up switched on all the time. (current sinks are not switched off
(currX_on=1 all the time), but currX_current masked to 00h during
PWM low time.). During PWM off-time then feedback voltage is
sampled.
RW
DCDC SU2 overvoltage protection to prevent damage of external
NFET, if CURR1, CURR2 or CURR3 feedback selected, and no LED
string connected.
0 :Switch off DCDC SU2 if the voltage on FB_SU2 exceeds 1.25V
1 :Overvoltage protection disabled
3
2
stpup2_pwm_lowf
stepup2_prot_dis
0
0
Controls the feedback source
0 :voltage feedback (external resistor divider) selected by
1:0
stepup2_fb
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'b00
RW
stepup2_fbprot
1 :CURR1 feedback enabled (feedback through white LEDs)
2 :CURR2 feedback enabled (feedback through white LEDs)
3 :CURR3 feedback enabled (feedback through white LEDs)
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
Stepup_control5 Register (Address 54h).
Stepup_control5
Addr: 54h
Bit
Bit Name
Default
Access
7:4
-
'b0000
n/a
do not use
3
stepup2_pwm_mode
0
RW
Enable PWM mode
0 :Normal operation
1 :PWM mode operation. Feedback is sampled during PWM off-time,
if stpup2_lowf=0.
2
stepup12_clkinv
0
RW
Invert input clock of SU1 and SU2 converter
0 :Use positive edge of internal clk
1 :Use negative edge of internal clk
RW
Controls the feedback protection of SU2 with external resistor divider
(regulated to 0.8V).
0 : FB_SU2 enabled as input
1 : GPIO2 enabled as input
2 : GPIO3 enabled as input
3 : GPIO4 enabled as input
1:0
stepup2_fbprot
'b00
Bit Description
RTCcontrol Register (Address 60h).
RTCcontrol
Addr: 60h
Bit
Bit Name
Default
Access
7:5
-
'b000
n/a
Bit Description
do not use
0 :Generates an interrupt every second
1 :Generates an interrupt every minute
2 :Generates an interrupt every 2 minute
3 :Generates an interrupt every 8 minute
4:3
rtc_irq_mode
'b00
RW
2
rtc_on
0
RW
1
rtc_alarm_wakeup_en
0
RW
0 :Disables RTC alarm wake-up in power off mode
1 :Enable RTC alarm wake-up in power off mode
0
rtc_rep_wakeup_en
0
RW
0 :Disables RTC repeated wake-up in power off mode
1 :Enable RTC repeated wake-up in power off mode
Switch on the 32kHz RTC oscillator
0 :32kHz oscillator disabled
1 :32kHz oscillator enabled
RTCSecond Register (Address 61h).
RTCSecond
Addr: 61h
Bit
Bit Name
Default
Access
7:0
second
00h
RW
Bit Description
-
RTCMinute1 Register (Address 62h).
RTCMinute1
Addr: 62h
Bit
Bit Name
Default
Access
7:0
minute0
00h
RW
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Bit Description
-
1.2
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
RTCMinute2 Register (Address 63h).
RTCMinute2
Addr: 63h
Bit
Bit Name
Default
Access
7:0
minute1
00h
RW
Bit Description
-
RTCMinute3 Register (Address 64h).
RTCMinute3
Addr: 64h
Bit
Bit Name
Default
Access
7:0
minute2
00h
RW
Bit Description
-
RTCAlarmSecond Register (Address 65h).
RTCAlarmSecond
Addr: 65h
Bit
7:0
Bit Name
alarmsecond
Default
3Fh
Access
RW
Bit Description
AlarmMinute2 has to be written to latch the whole alarm register
RTCAlarmMinute Register (Address 66h).
RTCAlarmMinute
Addr: 66h
Bit
Bit Name
Default
Access
7:0
alarmminute0
FFh
RW
Bit Description
AlarmMinute2 has to be written to latch the whole alarm register
RTCAlarmMinute2 Register (Address 67h).
RTCAlarmMinute2
Addr: 67h
Bit
Bit Name
7:0
alarmminute1
Default
FFh
Access
RW
Bit Description
AlarmMinute2 has to be written to latch the whole alarm register
RTCAlarmMinute3 Register (Address 68h).
RTCAlarmMinute3
Addr: 68h
Bit
Bit Name
Default
Access
7:0
alarmminute2
FFh
RW
Bit Description
-
SRAM Register (Address 69h).
SRAM
Addr: 69h
Bit
Bit Name
Default
Access
7:0
SRAM
00h
RW
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Bit Description
-
1.2
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ADC_control Register (Address 70h).
ADC_control
Addr: 70h
Bit
Bit Name
Default
Access
7
start_conversion
0
RW
Writing a 1 into this bit starts one ADC conversion
6
adc_on
0
RW
Writing a 1 into this bit continuously activates the ADC S/H and the
input multiplexer. The ADC and the MUX are also activated for a
conversion period when start_conversion is set to 1. Useful for high
impedance input sources on ADC inputs
5
adc_slow
0
RW
Select ADC sampling frequency
0 :250kHz (conversion time: approx. 60µs)
1 :62.5kHz (conversion time:approx. 240µs)
4
gpio_lv
RW
0 :High voltage range of GPIO1…4/SENSEN_SU1 (4:1 divider
active)
1 :Low voltage range of GPIO1…4/SENSEN_SU1 (1:1 divider, 1.8V
max)
RW
Selects an ADC channel
.0 :BATTEMP NTCADCIN (1:1)
.1 :Temperature sensor: DIE temperature [C] = adc_result * 0.866 274 (1:1)
.2 :XOUT32K (1:1, 1.8Vmax)
.3 :CURR1 (1:1, 1V max)
.4 :CURR2 (1:1, 1V max)
.5 :CURR3 (1:1, 1V max)
.6 :VUSB(15:1, 15V max)
.7 :CHGIN (4:1)
.8 :VBAT (4:1)
.9 :VSUP (4:1)
10 :SENSEN_SU1 (4:1 or 1:1 )
11 :FB_SU2 (4:1 or 1:1 )
12 :GPIO2 (4:1 or 1:1 )
13 :GPIO3 (4:1 or 1:1 )
14 :GPIO4 (4:1 or 1:1 )
15 :NA
3:0
adc_select
0
'b0000
Bit Description
ADC_MSB_result Register (Address 71h).
ADC_MSB_result
Addr: 71h
Bit
Bit Name
Default
Access
Bit Description
7
result_not_ready
0
RO
Indicates end of conversion 0 result is ready 1 conversion is running
6:0
D9_3
'b000 0000
RO
ADC result register Bit9..Bit3
ADC_LSB_result Register (Address 72h).
ADC_LSB_result
Addr: 72h
Bit
Bit Name
Default
Access
7:3
-
'b0000 0
n/a
do not use
2:0
D2_0
'b000
RO
ADC result register Bit2…Bit0
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Bit Description
1.2
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AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
RegStatus Register (Address 73h).
RegStatus
Addr: 73h
Bit
Bit Name
Default
Access
Bit Description
7
curr3_lv
0
RO
Bit is set when voltage of current sink CURR3 drops below low voltage
threshold (1ms debounce time default)
6
curr2_lv
0
RO
Bit is set when voltage of current sink CURR2 drops below low voltage
threshold (1ms debounce time default)
5
curr1_lv
0
RO
Bit is set when voltage of current sink CURR1 drops below low voltage
threshold (1ms debounce time default)
4
-
0
n/a
do not use
3
-
0
n/a
do not use
2
sd3_lv
0
RO
Bit is set when voltage of SD3 drops below low voltage threshold (-5%)
(1ms debounce time default)
1
sd2_lv
0
RO
Bit is set when voltage of SD2 drops below low voltage threshold (-5%)
(1ms debounce time default)
0
sd1_lv
0
RO
Bit is set when voltage of SD1 drops below low voltage threshold (-5%)
(1ms debounce time default)
InterruptMask1 Register (Address 74h).
InterruptMask1
Addr: 74h
Bit
Bit Name
Default
Access
7
LowBat_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
6
ovtmp_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
5
onkey_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
4
chdet_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
3
eoc_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
2
resume_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
1
nobat_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
0
trickle_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
www.austriamicrosystems.com
Bit Description
1.2
83 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
InterruptMask2 Register (Address 75h).
InterruptMask2
Addr: 75h
Bit
Bit Name
Default
Access
Bit Description
7
rtc_rep_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
6
stpup1_det_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
5
stpup1_oc_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
4
bat_temp_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
3
-
1
n/a
do not use
2
sd3_lv_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
1
sd2_lv_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
0
sd1_lv_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
InterruptMask3 Register (Address 76h).
InterruptMask3
Addr: 76h
Bit
Bit Name
Default
Access
Bit Description
7:3
-
'b0000 0
n/a
2
gpio_restart_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
1
gpio_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
0
rtc_alarm_int_m
1
RW
0 :interrupt enabled
1 :interrupt masked (disabled)
do not use
InterruptStatus1 Register (Address 77h).
InterruptStatus1
Addr: 77h
Bit
Bit Name
Default
Access
7
LowBat_int_i
0
POP
Bit is set when VSUP drops below ResVoltFall
6
ovtmp_int_i
0
POP
Bit is set when 110deg is exceeded
5
onkey_int_i
0
POP
Rising and falling edge
4
chdet_int_i
0
POP
Rising and falling edge
3
eoc_int_i
0
POP
Rising and falling edge
2
resume_int_i
0
POP
Rising and falling edge
1
nobat_int_i
0
POP
Rising and falling edge
0
trickle_int_i
0
POP
Rising and falling edge
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Bit Description
1.2
84 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
InterruptStatus2 Register (Address 78h).
InterruptStatus2
Addr: 78h
Bit
Bit Name
Default
Access
Bit Description
7
rtc_rep_int_i
0
POP
Rising edge only
6
stpup1_det_i
0
POP
Rising edge only
5
stpup1_oc_i
0
POP
Rising edge only
4
bat_temp_i
0
POP
Rising and falling edge
3
-
0
n/a
do not use
2
sd3_lv_int_i
0
POP
Rising edge only
1
sd2_lv_int_i
0
POP
Rising edge only
0
sd1_lv_int_i
0
POP
Rising edge only
Bit Description
InterruptStatus3 Register (Address 79h).
InterruptStatus3
Addr: 79h
Bit
Bit Name
Default
Access
7:3
-
'b0000 0
n/a
do not use
2
gpio_restart_int_i
0
POP
Falling edge
1
gpio_int_i
0
POP
Rising and falling edge
0
rtc_alarm_int_i
0
POP
Rising edge only
www.austriamicrosystems.com
1.2
85 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ChargerControl1 Register (Address 80h).
ChargerControl1
Addr: 80h
Bit
Bit Name
Default
Access
Bit Description
7
nobat_ntc_det
1
RW
Enables nobat_det feature with NTC, ntc_nobat debounce time=100ms
6
auto_resume
1
RW
0 :charger will stay in EOC even when the battery voltage drops
1 :charger will start charging when the battery voltage hits the resume
level
5
bat_charging_enable
0
RW
0 :USB is supplying VSUP, but battery switch is open. USB charger
regulates to Vsup_voltage
1 :Normal battery charger operation form USB charger
4:1
usb_current
'b1000
RW
Sets the USB input current limit, if not GPIO controlled
.0 :94mA (USB low current, also if gpiox_iosf=12 and gpiox=0)
.1 :141mA
.2 :189mA
.3 :237mA
.4 :285mA
.5 :332mA
.6 :380mA
.7 :428mA
.8 :470mA (USB high current, also if gpiox_iosf=12 and gpiox=1)
.9 :517mA
10 :754A
11 :1.29A
12 :1.7A
13 :2.53A
14 :2.53A
15 :2.53A
0
usb_chgEn
1
RW
ON/OFF control of USB charger input current limiter
0 :input current limiter disabled
1 :input current limiter enabled
ChargerVoltageControl Register (Address 81h).
ChargerVoltageControl
Addr: 81h
Bit
7:6
5:0
Bit Name
vsup_min
ChVoltEOC
www.austriamicrosystems.com
Default
'b01
'b10 0011
Access
Bit Description
RW
Regulate down battery charging current on that level of VSUP during
trickle charging and constant current charging, to prevent voltage drop
on VSUP.
0 :3.9V
1 :4.2V
2 :4.50V
3 :4.70V
RW
Sets the end-of-charge voltage level VCHOFF (20mV steps)
...0 :3.5V
...1 :3.52V
..... :...
.35 :4.2V
..... :...
47-63 :4.44V
1.2
86 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ChargerCurrentControl Register (Address 82h).
ChargerCurrentControl
Addr: 82h
Bit
Bit Name
Default
Access
7
eoc_current
0
RW
Sets eoc_current
0 :eoc current = TrickleCurrent
1 :eoc current = TrickleCurrent / 2
6
cc_lowlimit
1
RW
Sets the range of the charging current limit in constant current mode.
0 :Normal mode
1 :Low current mode Current=ConstantCurrent - 500mA
RW
Sets the charging current limit in constant current mode.
.0 :750mA
.1 :800mA
.2 :850mA
.3 :900mA
.4 :950mA
.5 :1000mA
.6 :1050mA
.7 :1100mA
.8 :1150mA
.9 :1200mA
10 :1250mA
11 :1300mA
12 :1350mA
13 :1400mA
14 :1450mA
15 :1500mA
RW
Sets the charging current limit in trickle current mode.
0 :60mA
1 :120mA
2 :180mA
3 :240mA
5:2
1:0
ConstantCurrent
TrickleCurrent
www.austriamicrosystems.com
'b0000
'b01
Bit Description
1.2
87 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ChargerConfig Register (Address 83h).
ChargerConfig
Addr: 83h
Bit
Bit Name
Default
Access
7
-
0
n/a
do not use
6
Charging_1Hz_clk
0
RW
Sets the mode for the charging output status (gpioX_iosf=10)
0 :Normal operation: charging=1, not charging=0
1 :1Hz blinking operation: charging=1Hz, not charging=0
5
ChVoltResume
0
RW
Sets the resume voltage level VCHRES.
0 :120mV
1 :240mV
RW
Selects temperature regulation of charging current (die temperature)
0 :110ºC
1 :90ºC
2 :120ºC
3 :130ºC
RW
Voltage regulation of VSUP of the input current limiter
0 :4.4V
1 :4.5V
2 :4.6V
3 :4.7V
4 :4.8V
5 :4.9V
6 :5.0V
7 :5.5V
4:3
2:0
temp_sel
vsup_voltage
'b00
'b101
Bit Description
NTCsupervision Register (Address 84h).
NTCsupervision
Addr: 84h
Bit
Bit Name
Default
Access
7:3
-
'b0000 0
n/a
do not use
2
ntc_temp
0
RW
Select NTC mode
0 :50deg temperature limit
1 :45deg temperature limit
1
ntc_10k
0
RW
Select NTC resistor type
0 :100kΩ
1 :10kΩ
0
ntc_on
0
RW
ON/OFF control of battery NTC supervision
0 :Disabled
1 :Enabled
www.austriamicrosystems.com
Bit Description
1.2
88 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
Chargersupervision Register (Address 85h).
Chargersupervision
Addr: 85h
Bit
Bit Name
Default
Access
7
-
0
n/a
do not use
6
ovprot_dis
1
RW
Disables external overvoltage protection, function of XOFF pin
0 :Overvoltage protection enabled
1 :Overvoltage protection disabled
5
dcdc_chmode
1
RW
Enables DCDC charger mode
0 :Linear charger mode enabled
1 :Step down charger enabled
4
charging_tmax
1
RW
3:0
ch_timeout
'b0000
RW
Bit Description
0 :Read: no time-out reached, Write: reset charger time-out counter
1 :ch_timeout reached and charging stopped
Sets the charger time-out timer
.0 :Off
.1 :0.5 hour
.2 :1 hour
.3 :1.5 hour
.4 :2 hour
.5 :2.5 hour
.6 :3 hour
.7 :3.5 hour
.8 :4 hour
.9 :4.5 hour
10 :5 hour
11 :5.5 hour
12 :6 hour
13 :6.5 hour
14 :7 hour
15 :7.5 hour
ChargerStatus1 Register (Address 86h).
ChargerStatus1
Addr: 86h
Bit
Bit Name
Default
Access
7
Nobat
0
RO
Bit is set, if no battery has been detected (after EOC measured on NTC)
6
Battemp_hi
0
RO
Bit is set, if high battery temperature has been detected
5
EOC
0
RO
Bit is set, if End of charge state has been reached
4
CVM
0
RO
Bit is set, if charger is operating in constant voltage mode
3
Trickle
0
RO
Bit is set, if charger is operating in trickle current. VBAT < 2.9V
2
Resume
0
RO
Bit is set, if Battery voltage is below resume level
1
CCM
0
RO
Bit is set, if charger is operating in constant current mode
0
ChDet
0
RO
Bit is set when external charge adapter has been detected on pin
VCHARGER
www.austriamicrosystems.com
Bit Description
1.2
89 - 98
AS3710 2V1
Datasheet - R e g i s t e r O v e r v i e w
ChargerStatus2 Register (Address 87h).
ChargerStatus2
Addr: 87h
Bit
Bit Name
Default
Access
Bit Description
7:3
-
‘b0000 0
n/a
do not use
2
usb_prot_ready
0
RO
Bit indicates, that the USB input voltage protection pin XOFF is
precharged to a voltage > 7.5V XOFF is pull to GND if an overvoltage on
VUSB is detected.
1
batsw_on
0
RO
0
batsw_mode
0
RO
Bits indicates the status of the battery switch
00 : Battery switch closed
01 : Battery switch open with ideal diode
10 : Charging mode
11 : Battery switch closed
Lock Register (Address 8eh).
Lock
Addr: 8eh
Bit
Bit Name
Default
Access
7:3
-
‘b0000 0
n/a
do not use
2
charger_lock
0
RW
Enables lock of the following charger registers: 81h, 82h, 83h,
Chargervoltagecontrol, Chargercurrentcontrol, Chargerconfig.
Bits can only be set. Reset only with full reset cycle
RW
Enables lock of Regulator voltages Bits can only be set. Reset only with
full reset cycle
0 :No lock
1 :Lock of voltage of LDOs (LDO1..8_vsel) (all bits) and voltage of
StepDownBits(sd1..4_vsel) [5:6] only
2 :Lock voltage of StepDownbits 5:6 only (no LDOs)
3 :Lock voltage of StepDowns (all bits) and LDOs (all bits).
Note: Setting sdx_vsel to 0 is possible all the time to allow switching
off the regulator. Writing a non-zero value after that will restore the old
value.
1:0
reg_lock
'b00
Bit Description
ASIC_ID1 Register (Address 90h).
ASIC_ID1
Addr: 90h
Bit
Bit Name
Default
Access
7:0
ID1
0Ah
RO
Bit Description
-
ASIC_ID2 Register (Address 91h).
ASIC_ID2
Addr: 91h
Bit
Bit Name
Default
Access
3:0
revision
'b0000
RO
www.austriamicrosystems.com
Bit Description
Note: Metal fuse!!!
1.2
90 - 98
D
C
B
A
C41
1
3
5
1
3
5
J5
2
4
6
BU4
GND
R16
1M
BU3
2.2uF
10uF
C19
2
U2
5
4
3
I2C
2
4
6
100nF
C28
Q2
VSUP
BU2
VBAT
47uF
C24
GND
Shield
BUS_GND
D+
D-
BUS_PWR
1
1
C15
C13
Q1
L3
D1
1µH
RESET
R15
10k
ON
BATTEMP
S1
4.7uF
10uF
C23
4.7uF
VSUP
R17
10k
1
S2
C29
1
Q5
D4
1uF
R9
1k
VSUP
Y1
57
25
24
23
22
38
39
37
36
40
5
34
4
1
3
2
35
2.2uF
VSS(exp)
XRES
SDA
SCL
ON
XOUT32
XIN32
V2_5
CREF
BATTEMP
CHGOUT
VBAT
VSUP_CHG
EXTBATSW
CHGIN
XOFF
VUSB
2.2uF
C9 C10 C11
2.2uF
VSUP
2
31
56
18
2
AS3710
VIN_LDO123
VIN_LDO456
VIN_LDO78
BU1
3
2
GPIO1
GPIO2
GPIO3
GPIO4
VSUP_GPIO
C17
D7
D6
26
27
28
29
21
CURR1
CURR2
CURR3
15
16
17
CURR1
CURR2
CURR3
32
30
33
55
54
53
20
19
VSUP_SU
45
C8
C3
C4
C5
C6
C7
C1
D8
2.2uF
VSUP
D9
NC
FB_SU3
GATE_SU3
SENSEN_SU3
FB_SU2
GATE_SU2
SENSEN_SU2
FB_SU1
GATE_SU1
SENSEN_SU1
FB_SD1
LX_SD1
FB_SD2
LX_SD2
FB_SD3
LX_SD3
VSUP_SD1
VSUP_SD2
VSUP_SD3
44
46
42
41
43
49
51
52
48
47
12
13
9
10
8
7
14
11
6
1µH
1µH
1
Q7
10µH L8
150m
R21
3
2.2uF
C37
C25
10µF
3
D5
SD3
SD2
SD1
Project Title
C38
2.2uF
SU3
10µH
L6
4.7µH L5
R7
150m
VSUP
R4
150m
C14
10µF
Date 01/06/2011
Originator *
*
C40
15nF
C39
Size
A4
Title
100k
R23
1M
R22 1.5nF
C20
10µF
C21
2.2uF
VSUP
C16
2.2uF
LDO1
LDO2
LDO3
LDO4
LDO5
LDO6
LDO7
LDO8
2.2uF
C12
2.2uF
1µH
VSUP
L4
L2
L1
1uF 1uF 2.2uF 2.2uF 2.2uF 1uF 2.2uF
C2
SENSEP
50
LDO1
LDO2
LDO3
LDO4
LDO5
LDO6
LDO7
LDO8
GPIO1
GPIO2
GPIO3
GPIO4
3
1.2
2
1
Q4
1
Q3
2.2uF
C22
VSUP
3
2.2uF
C31
2
3
www.austriamicrosystems.com
2
VUSB
D3
D2
C30
33nF
C34
4
SU1
C33
2.2uF
SU2
C27
10uF
of
*
Revision
*
15nF
Sheet *
R14
100k
1M
R11 1.5nF
C32
R8
15nF
C26
330k
1M
R6
4
D
C
B
A
AS3710 2V1
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
11 Application Information
Figure 34. AS3710 Application Schematics
91 - 98
AS3710 2V1
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 35. PCB Layout Recommendation for SD1, SD2, SD3 and Switched Mode Charger
www.austriamicrosystems.com
1.2
92 - 98
AS3710 2V1
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 36. PCB Layout Recommendation for SU1, SU2, SU3
www.austriamicrosystems.com
1.2
93 - 98
AS3710 2V1
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
12 Package Drawings and Markings
Figure 37. Package Drawings and Dimensions
www.austriamicrosystems.com
1.2
94 - 98
AS3710 2V1
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
Figure 38. QFN Marking
Table 31. Package Code YWWZZZ
YY
WW
X
ZZ
year
working week assembly / packaging
plant identifier
free choice
Table 32. Start-up Revision Code
xx
Sequence
FF
engineering samples, no sequence programmed or sequence programmed on request
00
default sequence (no sequence programmed)
xx
customer specified sequence programmed during production test
www.austriamicrosystems.com
1.2
95 - 98
AS3710 2V1
Datasheet - R e v i s i o n H i s t o r y
Revision History
Revision
Date
Owner
0.10
3.2011
pkm
Description
Initial draft
typo corrections;
updated block diagrams, PCB layout recommendations, charger mode
diagrams, application schematics, DCDC performance characteristics
added register 2bh and 2ch for chip version 2v1.
0.20
10.2011
pkm, cwo
1.0
10.2011
pkm
first official release
1.1
12.2011
pkm
corrected ntc_on bit description, adjusted max die temperature, updated dcdc
mode description
pkm
corrected “enter standby mode”, GPIO1 input mode description, GPIO block
diagram, GPIO IOSF, interrupt signal polarity
added switching charger graphs, added step-up external components, ASIC
ID
1.2
4.2012
Note: Typos may not be explicitly mentioned under revision history.
www.austriamicrosystems.com
1.2
96 - 98
AS3710 2V1
Datasheet - O r d e r i n g I n f o r m a t i o n
13 Ordering Information
The devices are available as the standard products shown below.
Table 33. Ordering Information
Ordering Code
Marking
Sequence
Description
Delivery Form
Package
AS3710-BQFR-FF
M2V1-FF
sequence
programmable on
request
Triple Buck High Current PMIC
with Charger
Tray
QFN56 7x7 0.4mm pitch
AS3710-BQFP-00
M2V1-00
default sequence
Triple Buck High Current PMIC
with Charger
Tape & Reel
dry pack
QFN56 7x7 0.4mm pitch
AS3710-BQFP-xx
M2V1-xx
customer specified
Triple Buck High Current PMIC
with Charger
Tape & Reel
dry pack
QFN56 7x7 0.4mm pitch
Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is available at http://www.austriamicrosystems.com/Technical-Support
For further information and requests, please contact us mailto: sales@austriamicrosystems.com
or find your local distributor at http://www.austriamicrosystems.com/distributor
www.austriamicrosystems.com
1.2
97 - 98
AS3710 2V1
Datasheet - C o p y r i g h t s
Copyrights
Copyright © 1997-2012, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
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1.2
98 - 98
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