74AVC1T45
Dual-supply voltage level translator/transceiver; 3-state
Rev. 8 — 10 December 2018
Product data sheet
1. General description
The 74AVC1T45 is a single bit, dual supply transceiver with 3-state output that enables
bidirectional level translation. It features two 1-bit input-output ports (A and B), a direction control
input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any
voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low
voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A and DIR are referenced to VCC(A)
and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on
DIR allows transmission from B to A.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are
in the high-impedance OFF-state.
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
•
•
Wide supply voltage range:
• VCC(A): 0.8 V to 3.6 V
• VCC(B): 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V)
• JESD8-11 (0.9 V to 1.65 V)
• JESD8-7 (1.2 V to 1.95 V)
• JESD8-5 (1.8 V to 2.7 V)
• JESD8-B (2.7 V to 3.6 V)
ESD protection:
• HBM JESD22-A114E Class 3B exceeds 8000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
• 500 Mbit/s (1.8 V to 3.3 V translation)
• 320 Mbit/s (< 1.8 V to 3.3 V translation)
• 320 Mbit/s (translate to 2.5 V or 1.8 V)
• 280 Mbit/s (translate to 1.5 V)
• 240 Mbit/s (translate to 1.2 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
Version
74AVC1T45GW
-40 °C to +125 °C
SC-88
plastic surface-mounted package; 6 leads
SOT363
74AVC1T45GM
-40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1 x 1.45 x 0.5 mm
74AVC1T45GN
-40 °C to +125 °C
XSON6
extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
SOT1115
74AVC1T45GS
-40 °C to +125 °C
XSON6
extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
74AVC1T45GX
-40 °C to +125 °C
X2SON6
plastic thermal extremely thin small outline package;
no leads; 6 terminals; body 1 x 0.8 x 0.35 mm
SOT1255
4. Marking
Table 2. Marking
Type number
Marking code[1]
74AVC1T45GW
B5
74AVC1T45GM
B5
74AVC1T45GN
B5
74AVC1T45GS
B5
74AVC1T45GX
B5
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
DIR
A
5
DIR
3
A
4
VCC(A)
B
B
VCC(B)
VCC(A)
VCC(B)
001aag885
Fig. 1.
Logic symbol
74AVC1T45
Product data sheet
001aag886
Fig. 2.
Logic diagram
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74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
6. Pinning information
6.1. Pinning
74AVC1T45
74AVC1T45
VCC(A)
1
6
VCC(B)
GND
2
5
DIR
A
3
4
B
VCC(A)
1
6
VCC(B)
GND
2
5
DIR
A
3
4
B
001aag972
Transparent top view
001aag971
Fig. 3.
Pin configuration SOT363
Fig. 4.
Pin configuration SOT886
74AVC1T45
VCC(A)
1
6
74AVC1T45
VCC(B)
GND
2
5
DIR
A
3
4
B
VCC(A)
VCC(B)
1
6
GND
3
A
aaa-000876
5
DIR
4
B
aaa-022602
Transparent top view
Transparent top view
Fig. 5.
2
Pin configuration SOT1115 and SOT1202
Fig. 6.
Pin configuration SOT1255 (X2SON6)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
Description
VCC(A)
1
supply voltage port A and DIR
GND
2
ground (0 V)
A
3
data input or output
B
4
data input or output
DIR
5
direction control
VCC(B)
6
supply voltage port B
74AVC1T45
Product data sheet
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Rev. 8 — 10 December 2018
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Nexperia B.V. 2018. All rights reserved
3 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Supply voltage
Input
Input/output[1]
VCC(A), VCC(B)
DIR[2]
A
B
0.8 V to 3.6 V
L
A=B
input
0.8 V to 3.6 V
H
input
B=A
GND[3]
X
Z
Z
[1]
[2]
[3]
The input circuit of the data I/O is always active.
The DIR input circuit is referenced to VCC(A).
When either VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC(A)
Conditions
Min
Max
Unit
supply voltage A
-0.5
+4.6
V
VCC(B)
supply voltage B
-0.5
+4.6
V
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO < 0 V
VO
output voltage
Active mode
VI < 0 V
[1]
-50
-
-0.5
+4.6
-50
-
[1][2][3]
-0.5
[1]
-0.5
Suspend or 3-state mode
mA
V
mA
VCCO + 0.5 V
+4.6
V
IO
output current
VO = 0 V to VCCO
-
±50
mA
ICC
supply current
ICC(A) or ICC(B)
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
Ptot
total power dissipation
-
250
mW
[1]
[2]
[3]
[4]
Tamb = -40 °C to +125 °C
[4]
The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
VCCO is the supply voltage associated with the output port.
VCCO + 0.5 V should not exceed 4.6 V.
For SC-88 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For X2SON6 and XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
74AVC1T45
Product data sheet
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Rev. 8 — 10 December 2018
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Nexperia B.V. 2018. All rights reserved
4 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol
Parameter
Conditions
Min
Max
Unit
VCC(A)
supply voltage A
0.8
3.6
V
VCC(B)
supply voltage B
0.8
3.6
V
VI
input voltage
0
3.6
V
VO
output voltage
0
VCCO
V
0
3.6
V
-40
+125
°C
-
5
Active mode
[1]
Suspend or 3-state mode
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
[1]
[2]
VCCI = 0.8 V to 3.6 V
[2]
ns/V
VCCO is the supply voltage associated with the output port.
VCCI is the supply voltage associated with the input port.
10. Static characteristics
Table 7. Typical static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1]
Symbol
Parameter
Conditions
VOH
HIGH-level output voltage
VI = VIH or VIL
VOL
LOW-level output voltage
VI = VIH or VIL
Tamb = 25 °C
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V
Unit
Min
Typ
Max
-
0.69
-
V
-
0.07
-
V
-
±0.025
±0.25
μA
-
±0.5
±2.5
μA
II
input leakage current
DIR input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
IOZ
OFF-state output current
A or B port; VO = 0 V or VCCO;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
IOFF
power-off leakage current
A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V;
VCC(B) = 0.8 V to 3.6 V
-
±0.1
±1
μA
B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V;
VCC(A) = 0.8 V to 3.6 V
-
±0.1
±1
μA
[2]
CI
input capacitance
DIR input; VI = 0 V or 3.3 V;
VCC(A) = VCC(B) = 3.3 V
-
1.0
-
pF
CI/O
input/output capacitance
A and B port; Suspend mode;
VO = VCCO or GND; VCC(A) = VCC(B) = 3.3 V
-
4.0
-
pF
[1]
[2]
VCCO is the supply voltage associated with the output port.
For I/O ports, the parameter IOZ includes the input leakage current.
74AVC1T45
Product data sheet
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Rev. 8 — 10 December 2018
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Nexperia B.V. 2018. All rights reserved
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74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1][2]
Symbol Parameter
Conditions
VIH
data input
HIGH-level
input voltage
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
VCCI = 0.8 V
0.70VCCI
-
0.70VCCI
-
V
VCCI = 1.1 V to 1.95 V
0.65VCCI
-
0.65VCCI
-
V
VCCI = 2.3 V to 2.7 V
1.6
-
1.6
-
V
VCCI = 3.0 V to 3.6 V
2
-
2
-
V
VCC(A) = 0.8 V
0.70VCC(A)
-
0.70VCC(A)
-
V
VCC(A) = 1.1 V to 1.95 V
0.65VCC(A)
-
0.65VCC(A)
-
V
VCC(A) = 2.3 V to 2.7 V
1.6
-
1.6
-
V
VCC(A) = 3.0 V to 3.6 V
2
-
2
-
V
VCCI = 0.8 V
-
0.30VCCI
-
0.30VCCI
V
VCCI = 1.1 V to 1.95 V
-
0.35VCCI
-
0.35VCCI
V
VCCI = 2.3 V to 2.7 V
-
0.7
-
0.7
V
VCCI = 3.0 V to 3.6 V
-
0.9
-
0.9
V
VCC(A) = 0.8 V
-
0.30VCC(A)
-
0.30VCC(A) V
VCC(A) = 1.1 V to 1.95 V
-
0.35VCC(A)
-
0.35VCC(A) V
VCC(A) = 2.3 V to 2.7 V
-
0.7
-
0.7
V
VCC(A) = 3.0 V to 3.6 V
-
0.9
-
0.9
V
VCCO - 0.1
-
VCCO - 0.1
-
V
IO = -3 mA;
VCC(A) = VCC(B) = 1.1 V
0.85
-
0.85
-
V
IO = -6 mA;
VCC(A) = VCC(B) = 1.4 V
1.05
-
1.05
-
V
IO = -8 mA;
VCC(A) = VCC(B) = 1.65 V
1.2
-
1.2
-
V
IO = -9 mA;
VCC(A) = VCC(B) = 2.3 V
1.75
-
1.75
-
V
IO = -12 mA;
VCC(A) = VCC(B) = 3.0 V
2.3
-
2.3
-
V
-
0.1
-
0.1
V
IO = 3 mA; VCC(A) = VCC(B) = 1.1 V
-
0.25
-
0.25
V
IO = 6 mA; VCC(A) = VCC(B) = 1.4 V
-
0.35
-
0.35
V
IO = 8 mA;
VCC(A) = VCC(B) = 1.65 V
-
0.45
-
0.45
V
IO = 9 mA; VCC(A) = VCC(B) = 2.3 V
-
0.55
-
0.55
V
IO = 12 mA;
VCC(A) = VCC(B = 3.0 V
-
0.7
-
0.7
V
DIR input
VIL
LOW-level
input voltage
data input
DIR input
VOH
VOL
VI = VIH or VIL
HIGH-level
output voltage
IO = -100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
VI = VIH or VIL
LOW-level
output voltage
IO = 100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
74AVC1T45
Product data sheet
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74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
-
±1
-
±1.5
μA
-
±5
-
±7.5
μA
II
input leakage
current
DIR input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
IOZ
OFF-state
output current
A or B port; VO = 0 V or VCCO;
VCC(A) = VCC(B) = 3.6 V
IOFF
power-off
leakage
current
A port; VI or VO = 0 V to 3.6 V;
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V
-
±5
-
±35
μA
B port; VI or VO = 0 V to 3.6 V;
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V
-
±5
-
±35
μA
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
8
-
12
μA
VCC(A) = 3.6 V; VCC(B) = 0 V
-
8
-
12
μA
VCC(A) = 0 V; VCC(B) = 3.6 V
-2
-
-8
-
μA
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
8
-
12
μA
VCC(A) = 3.6 V; VCC(B) = 0 V
-2
-
-8
-
μA
VCC(A) = 0 V; VCC(B) = 3.6 V
-
8
-
12
μA
-
16
-
24
μA
[3]
supply current A port; VI = 0 V or VCCI; IO = 0 A
ICC
B port; VI = 0 V or VCCI; IO = 0 A
A plus B port (ICC(A) + ICC(B));
IO = 0 A; VI = 0 V or VCCI;
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
[1]
[2]
[3]
VCCO is the supply voltage associated with the output port.
VCCI is the supply voltage associated with the data input port.
For I/O ports, the parameter IOZ includes the input leakage current.
74AVC1T45
Product data sheet
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Rev. 8 — 10 December 2018
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Nexperia B.V. 2018. All rights reserved
7 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
11. Dynamic characteristics
Table 9. Typical dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for wave forms see Fig. 7 and Fig. 8[1]
Symbol
Parameter
Conditions
VCC(B)
0.8 V
1.2 V
1.5 V
Unit
1.8 V
2.5 V
3.3 V
VCC(A) = 0.8 V and Tamb = 25 °C
tpd
tdis
15.5
8.1
7.6
7.7
8.4
9.2
ns
B to A
15.5
12.7
12.3
12.2
12.0
11.8
ns
DIR to A
12.2
12.2
12.2
12.2
12.2
12.2
ns
DIR to B
11.7
7.9
7.6
8.2
8.7
10.2
ns
DIR to A
27.2
20.6
19.9
20.4
20.7
22.0
ns
DIR to B
27.7
20.3
19.8
19.9
20.6
21.4
ns
disable time
ten
[1]
propagation delay A to B
enable time
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
ten is a calculated value using the formula shown in Section 12.4
Table 10. Typical dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for wave forms see Fig. 7 and Fig. 8[1]
Symbol
Parameter
Conditions
VCC(A)
Unit
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
VCC(B) = 0.8 V and Tamb = 25 °C
tpd
propagation delay A to B
15.5
12.7
12.3
12.2
12.0
11.8
ns
B to A
15.5
8.1
7.6
7.7
8.4
9.2
ns
tdis
disable time
DIR to A
12.2
4.9
3.8
3.7
2.8
3.4
ns
DIR to B
11.7
9.2
9.0
8.8
8.7
8.6
ns
DIR to A
27.2
17.3
16.6
16.5
17.1
17.8
ns
DIR to B
27.7
17.6
16.1
15.9
14.8
15.2
ns
ten
[1]
enable time
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
ten is a calculated value using the formula shown in Section 12.4
Table 11. Typical power dissipation capacitance
Voltages are referenced to GND (ground = 0 V).[1][2]
Symbol
Parameter
Conditions
VCC(A) = VCC(B)
Unit
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
A port: (direction A to B);
B port: (direction B to A)
1
2
2
2
2
2
pF
A port: (direction B to A);
B port: (direction A to B)
9
11
11
12
14
17
pF
Tamb = 25 °C
CPD
[1]
[2]
power dissipation
capacitance
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC x fi x N + Σ(CL x VCC × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
Σ(CL x VCC x fo) = sum of the outputs.
fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.
74AVC1T45
Product data sheet
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74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
Table 12. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for wave forms see Fig. 7 and Fig. 8[1]
Symbol
Parameter
Conditions
VCC(B)
Unit
1.2 V±0.1 V
1.5 V±0.1 V
1.8 V±0.15 V
2.5 V±0.2 V
3.3 V±0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V; Tamb = -40 °C to +85 °C
tpd
tdis
ten
propagation
delay
A to B
1.0
9.0
0.7
6.8
0.6
6.1
0.5
5.7
0.5
6.1
ns
B to A
1.0
9.0
0.8
8.0
0.7
7.7
0.6
7.2
0.5
7.1
ns
disable time
DIR to A
2.2
8.8
2.2
8.8
2.2
8.8
2.2
8.8
2.2
8.8
ns
DIR to B
2.2
8.4
1.8
6.7
2.0
6.9
1.7
6.2
2.4
7.2
ns
DIR to A
-
17.4
-
14.7
-
14.6
-
13.4
-
14.3 ns
DIR to B
-
17.8
-
15.6
-
14.9
-
14.5
-
14.9 ns
enable time
VCC(A) = 1.4 V to 1.6 V; Tamb = -40 °C to +85 °C
tpd
tdis
ten
propagation
delay
A to B
1.0
8.0
0.7
5.4
0.6
4.6
0.5
3.7
0.5
3.5
ns
B to A
1.0
6.8
0.8
5.4
0.7
5.1
0.6
4.7
0.5
4.5
ns
disable time
DIR to A
1.6
6.3
1.6
6.3
1.6
6.3
1.6
6.3
1.6
6.3
ns
DIR to B
2.0
7.6
1.8
5.9
1.6
6.0
1.2
4.8
1.7
5.5
ns
DIR to A
-
14.4
-
11.3
-
11.1
-
9.5
-
10.0 ns
DIR to B
-
14.3
-
11.7
-
10.9
-
10.0
-
9.8
ns
enable time
VCC(A) = 1.65 V to 1.95 V; Tamb = -40 °C to +85 °C
propagation
delay
A to B
1.0
7.7
0.6
5.1
0.5
4.3
0.5
3.4
0.5
3.1
ns
B to A
1.0
6.1
0.7
4.6
0.5
4.4
0.5
3.9
0.5
3.7
ns
tdis
disable time
DIR to A
1.6
5.5
1.6
5.5
1.6
5.5
1.6
5.5
1.6
5.5
ns
DIR to B
1.8
7.7
1.8
5.7
1.4
5.8
1.0
4.5
1.5
5.2
ns
ten
enable time
DIR to A
-
13.8
-
10.3
-
10.2
-
8.4
-
8.9
ns
DIR to B
-
13.2
-
10.6
-
9.8
-
8.9
-
8.6
ns
tpd
VCC(A) = 2.3 V to 2.7 V; Tamb = -40 °C to +85 °C
tpd
propagation
delay
A to B
1.0
7.2
0.5
4.7
0.5
3.9
0.5
3.0
0.5
2.6
ns
B to A
1.0
5.7
0.6
3.8
0.5
3.4
0.5
3.0
0.5
2.8
ns
tdis
disable time
DIR to A
1.5
4.2
1.5
4.2
1.5
4.2
1.5
4.2
1.5
4.2
ns
DIR to B
1.7
7.3
2.0
5.2
1.5
5.1
0.6
4.2
1.1
4.8
ns
DIR to A
-
13.0
-
9.0
-
8.5
-
7.2
-
7.6
ns
DIR to B
-
11.4
-
8.9
-
8.1
-
7.2
-
6.8
ns
ten
enable time
VCC(A) = 3.0 V to 3.6 V; Tamb = -40 °C to +85 °C
tpd
tdis
ten
[1]
propagation
delay
A to B
1.0
7.1
0.5
4.5
0.5
3.7
0.5
2.8
0.5
2.4
ns
B to A
1.0
6.1
0.6
3.6
0.5
3.1
0.5
2.6
0.5
2.4
ns
disable time
DIR to A
1.5
4.7
1.5
4.7
1.5
4.7
1.5
4.7
1.5
4.7
ns
DIR to B
1.7
7.2
0.7
5.5
0.6
5.5
0.7
4.1
1.7
4.7
ns
DIR to A
-
13.3
-
9.1
-
8.6
-
6.7
-
7.1
ns
DIR to B
-
11.8
-
9.2
-
8.4
-
7.5
-
7.1
ns
enable time
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. ten is a calculated value using the
formula shown in Section 12.4
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
9 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
Table 13. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for wave forms see Fig. 7 and Fig. 8[1]
Symbol
Parameter
Conditions
VCC(B)
Unit
1.2 V±0.1 V
1.5 V±0.1 V
1.8 V±0.15 V
2.5 V±0.2 V
3.3 V±0.3 V
Min
Min
Max
Min
Max
Min
Max
Min
Max
Max
VCC(A) = 1.1 V to 1.3 V; Tamb = -40 °C to +125 °C
tpd
tdis
ten
propagation
delay
A to B
1.0
9.9
0.7
7.5
0.6
6.8
0.5
6.3
0.5
6.8
ns
B to A
1.0
9.9
0.8
8.8
0.7
8.5
0.6
8.0
0.5
7.9
ns
disable time
DIR to A
2.2
9.7
2.2
9.7
2.2
9.7
2.2
9.7
2.2
9.7
ns
DIR to B
2.2
9.2
1.8
7.4
2.0
7.6
1.7
6.9
2.4
8.0
ns
DIR to A
-
19.1
-
16.2
-
16.1
-
14.9
-
15.9 ns
DIR to B
-
19.6
-
17.2
-
16.5
-
16.0
-
16.5 ns
enable time
VCC(A) = 1.4 V to 1.6 V; Tamb = -40 °C to +125 °C
tpd
tdis
ten
propagation
delay
A to B
1.0
8.8
0.7
6.0
0.6
5.1
0.5
4.1
0.5
3.9
ns
B to A
1.0
7.5
0.8
6.0
0.7
5.7
0.6
5.2
0.5
5.0
ns
disable time
DIR to A
1.6
7.0
1.6
7.0
1.6
7.0
1.6
7.0
1.6
7.0
ns
DIR to B
2.0
8.3
1.8
6.5
1.6
6.6
1.2
5.3
1.7
6.1
ns
DIR to A
-
15.8
-
12.5
-
12.3
-
10.5
-
11.1 ns
DIR to B
-
15.8
-
13.0
-
12.1
-
11.1
-
10.9 ns
enable time
VCC(A) = 1.65 V to 1.95 V; Tamb = -40 °C to +125 °C
propagation
delay
A to B
1.0
8.5
0.6
5.7
0.5
4.8
0.5
3.8
0.5
3.5
ns
B to A
1.0
6.8
0.7
5.1
0.5
4.9
0.5
4.3
0.5
4.1
ns
tdis
disable time
DIR to A
1.6
6.1
1.6
6.1
1.6
6.1
1.6
6.1
1.6
6.1
ns
DIR to B
1.8
8.5
1.8
6.3
1.4
6.4
1.0
5.0
1.5
5.8
ns
ten
enable time
DIR to A
-
15.3
-
11.4
-
11.3
-
9.3
-
9.9
ns
DIR to B
-
14.6
-
11.8
-
10.9
-
9.9
-
9.6
ns
tpd
VCC(A) = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C
tpd
propagation
delay
A to B
1.0
8.0
0.5
5.2
0.5
4.3
0.5
3.3
0.5
2.9
ns
B to A
1.0
6.3
0.6
4.2
0.5
3.8
0.5
3.3
0.5
3.1
ns
tdis
disable time
DIR to A
1.5
4.7
1.5
4.7
1.5
4.7
1.5
4.7
1.5
4.7
ns
DIR to B
1.7
8.0
2.0
5.8
1.5
5.7
0.6
4.7
1.1
5.3
ns
DIR to A
-
14.3
-
10.0
-
9.5
-
8.0
-
8.4
ns
DIR to B
-
12.7
-
9.9
-
9.0
-
8.0
-
7.6
ns
ten
enable time
VCC(A) = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C
tpd
tdis
ten
[1]
propagation
delay
A to B
1.0
7.9
0.5
5.0
0.5
4.1
0.5
3.1
0.5
2.7
ns
B to A
1.0
6.8
0.6
4.0
0.5
3.5
0.5
2.9
0.5
2.7
ns
disable time
DIR to A
1.5
5.2
1.5
5.2
1.5
5.2
1.5
5.2
1.5
5.2
ns
DIR to B
1.7
7.9
0.7
6.1
0.6
6.1
0.7
4.6
1.7
5.2
ns
DIR to A
-
14.7
-
10.1
-
9.6
-
7.5
-
7.9
ns
DIR to B
-
13.1
-
10.2
-
9.3
-
8.3
-
7.9
ns
enable time
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. ten is a calculated value using the
formula shown in Section 12.4
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
10 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
11.1. Waveforms and test circuit
VI
VM
A, B input
GND
tPHL
tPLH
VOH
B, A output
VM
001aae967
VOL
Measurement points are given in Table 14.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7.
The data input (A, B) to output (B, A) propagation delay times
VI
DIR input
VM
GND
t PLZ
output
LOW-to-OFF
OFF-to-LOW
t PZL
VCCO
VM
VX
VOL
t PHZ
output
HIGH-to-OFF
OFF-to-HIGH
VOH
t PZH
VY
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aae968
Measurement points are given in Table 14.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 8.
Enable and disable times
Table 14. Measurement points
Supply voltage
Input [1]
Output [2]
VCC(A), VCC(B)
VM
VM
VX
VY
1.1 V to 1.6 V
0.5VCCI
0.5VCCO
VOL + 0.1 V
VOH - 0.1 V
1.65 V to 2.7 V
0.5VCCI
0.5VCCO
VOL + 0.15 V
VOH - 0.15 V
3.0 V to 3.6 V
0.5VCCI
0.5VCCO
VOL + 0.3 V
VOH - 0.3 V
[1]
[2]
VCCI is the supply voltage associated with the data input port.
VCCO is the supply voltage associated with the output port.
74AVC1T45
Product data sheet
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Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
11 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
tW
VI
90 %
negative
pulse
VM
VM
10 %
0V
VI
tf
tr
tr
tf
90 %
positive
pulse
VM
VM
10 %
0V
tW
VEXT
VCC
VI
G
RL
VO
DUT
RT
CL
RL
001aae331
Test data is given in Table 15.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Fig. 9.
Test circuit for measuring switching times
Table 15. Test data
Supply voltage
Input
Load
VEXT
VCC(A), VCC(B)
VI [1]
Δt/ΔV [2]
CL
RL
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ [3]
1.1 V to 1.6 V
VCCI
≤ 1.0 ns/V
15 pF
2 kΩ
open
GND
2VCCO
1.65 V to 2.7 V
VCCI
≤ 1.0 ns/V
15 pF
2 kΩ
open
GND
2VCCO
3.0 V to 3.6 V
VCCI
≤ 1.0 ns/V
15 pF
2 kΩ
open
GND
2VCCO
[1]
[2]
[3]
VCCI is the supply voltage associated with the data input port.
dV/dt ≥ 1.0 V/ns
VCCO is the supply voltage associated with the output port.
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
12 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
12. Application information
12.1. Unidirectional logic level-shifting application
The circuit given in Fig. 10 is an example of the 74AVC1T45 being used in an unidirectional logic
level-shifting application.
VCC1
VCC1
VCC(A)
1
GND
2
A
74AVC1T45
3
VCC(B)
6
DIR
5
VCC2
VCC2
B
4
system-1
system-2
001aag973
Fig. 10. Unidirectional logic level-shifting application
Table 16. Description unidirectional logic level-shifting application
Pin
Name
Function
Description
1
VCC(A)
VCC1
supply voltage of system-1 (0.8 V to 3.6 V)
2
GND
GND
device GND
3
A
OUT
output level depends on VCC1 voltage
4
B
IN
input threshold value depends on VCC2 voltage
5
DIR
DIR
the GND (LOW level) determines B port to A port direction
6
VCC(B)
VCC2
supply voltage of system-2 (0.8 V to 3.6 V)
12.2. Bidirectional logic level-shifting application
Fig. 11 shows the 74AVC1T45 being used in a bidirectional logic level-shifting application. Since
the device does not have an output enable pin, the system designer should take precautions to
avoid bus contention between system-1 and system-2 when changing directions.
VCC1
VCC1
VCC2
VCC(A)
I/O-1
PULL-UP/DOWN
GND
A
1
2
74AVC1T45
3
6
5
4
VCC2
VCC(B)
DIR
I/O-2
PULL-UP/DOWN
B
DIR CTRL
system-1
system-2
001aag974
Fig. 11. Bidirectional logic level-shifting application
Table 17 gives a sequence that will illustrate data transmission from system-1 to system-2 and then
from system-2 to system-1.
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
13 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
Table 17. Description bidirectional logic level-shifting application
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
State DIR CTRL I/O-1
I/O-2
Description
1
H
output
input
system-1 data to system-2
2
H
Z
Z
system-2 is getting ready to send data to system-1.
I/O-1 and I/O-2 are disabled. The bus-line state depends
on bus hold.
3
L
Z
Z
DIR bit is set LOW. I/O-1 and I/O-2 still are disabled. The
bus-line state depends on bus hold.
4
L
input
output
system-2 data to system-1
12.3. Power-up considerations
The device is designed such that no special power-up sequence is required other than GND being
applied first.
Table 18. Typical total supply current (ICC(A) + ICC(B))
VCC(A)
VCC(B)
Unit
0V
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0V
0
0.1
0.1
0.1
0.1
0.1
0.1
μA
0.8 V
0.1
0.1
0.1
0.1
0.1
0.7
2.3
μA
1.2 V
0.1
0.1
0.1
0.1
0.1
0.3
1.4
μA
1.5 V
0.1
0.1
0.1
0.1
0.1
0.1
0.9
μA
1.8 V
0.1
0.1
0.1
0.1
0.1
0.1
0.5
μA
2.5 V
0.1
0.7
0.3
0.1
0.1
0.1
0.1
μA
3.3 V
0.1
2.3
1.4
0.9
0.5
0.1
0.1
μA
12.4. Enable times
Calculate the enable times for the 74AVC1T45 using the following formulas:
•
•
ten (DIR to A) = tdis (DIR to B) + tpd (B to A)
ten (DIR to B) = tdis (DIR to A) + tpd (A to B)
In a bidirectional application, these enable times provide the maximum delay from the time
the DIR bit is switched until an output is expected. For example, if the 74AVC1T45 initially is
transmitting from A to B, then the DIR bit is switched, the B port of the device must be disabled
before presenting it with an input. After the B port has been disabled, an input signal applied to it
appears on the corresponding A port after the specified propagation delay.
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
14 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
13. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
B
E
y
A
X
HE
6
5
v M A
4
Q
pin 1
index
A
1
2
e1
A1
3
c
bp
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT363
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
SC-88
Fig. 12. Package outline SOT363 (SC-88)
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
15 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
SOT886
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
b
1
2
3
4x
(2)
L
L1
e
6
5
e1
4
e1
6x
A
(2)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
max
nom
min
A(1)
0.5
A1
b
D
E
0.04 0.25 1.50 1.05
0.20 1.45 1.00
0.17 1.40 0.95
e
e1
0.6
0.5
L
L1
0.35 0.40
0.30 0.35
0.27 0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
Outline
version
SOT886
sot886_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
04-07-22
12-01-05
MO-252
Fig. 13. Package outline SOT886 (XSON6)
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
16 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
1
SOT1115
b
3
2
(4×)(2)
L
L1
e
6
5
4
e1
e1
(6×)(2)
A1
A
D
E
terminal 1
index area
0
0.5
Dimensions
Unit
mm
1 mm
scale
A(1)
A1
b
D
E
e
e1
max 0.35 0.04 0.20 0.95 1.05
nom
0.15 0.90 1.00 0.55
min
0.12 0.85 0.95
L
L1
0.35 0.40
0.30 0.35
0.27 0.32
0.3
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
Outline
version
sot1115_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
10-04-02
10-04-07
SOT1115
Fig. 14. Package outline SOT1115 (XSON6)
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
17 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
1
SOT1202
b
3
2
(4×)(2)
L
L1
e
6
5
4
e1
e1
(6×)(2)
A1
A
D
E
terminal 1
index area
0
0.5
Dimensions
Unit
mm
1 mm
scale
A(1)
A1
b
D
E
e
e1
L
L1
max 0.35 0.04 0.20 1.05 1.05
0.35 0.40
nom
0.15 1.00 1.00 0.55 0.35 0.30 0.35
min
0.12 0.95 0.95
0.27 0.32
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
Outline
version
sot1202_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
10-04-02
10-04-06
SOT1202
Fig. 15. Package outline SOT1202 (XSON6)
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
18 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
X2SON6: plastic thermal enhanced extremely thin small outline package; no leads;
6 terminals; body 1.0 x 0.8 x 0.35 mm
SOT1255
X
A
D
B
A
pin 1
ID area
E
A1
detail X
C
e1
b
(4x)
4
3
y1 C
A B
v
y
L
(4x)
2
5
Dh
(2x)
1
6
e2
0
1 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A
A1
D
Dh
E
e1
e2
b
L
v
y
y1
max 0.35 0.04 1.05 0.30 0.85
0.30 0.25
nom 0.32 0.02 1.00 0.25 0.80 0.60 0.40 0.25 0.20 0.10 0.05 0.05
0.22 0.17
min 0.30 0.00 0.95 0.22 0.75
sot1255_po
Outline
version
References
IEC
JEDEC
JEITA
European
projection
Issue date
15-07-20
15-07-22
SOT1255
Fig. 16. Package outline SOT1255 (X2SON6)
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
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Nexperia B.V. 2018. All rights reserved
19 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
14. Abbreviations
Table 19. Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
15. Revision history
Table 20. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AVC1T45 v.8
20181210
Product data sheet
-
74AVC1T45 v.7
74AVC1T45 v.7
20170824
Product data sheet
-
74AVC1T45 v.6
Modifications:
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74AVC1T45 v.6
20160420
Modifications:
•
74AVC1T45 v.5
20160106
Modifications:
•
74AVC1T45 v.4
20120622
Modifications:
•
74AVC1T45 v.3
20111021
Modifications:
•
•
74AVC1T45 v.2
20090505
Product data sheet
-
74AVC1T45 v.1
74AVC1T45 v.1
20080118
Product data sheet
-
-
74AVC1T45
Product data sheet
Product data sheet
-
74AVC1T45 v.5
Added type number 74AVC1T45GX(SOT1255/X2SON6 package).
Product data sheet
-
74AVC1T45 v.4
-
74AVC1T45 v.3
Table 16: Labels for pins 4 and 5 corrected.
Product data sheet
Package outline drawing of SOT886 (Fig. 13) modified.
Product data sheet
-
74AVC1T45 v.2
Added type number 74AVC1T45GN (SOT1115/XSON6 package).
Added type number 74AVC1T45GS (SOT1202/XSON6 package).
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
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Nexperia B.V. 2018. All rights reserved
20 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
16. Legal information
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
74AVC1T45
Product data sheet
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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21 / 22
74AVC1T45
Nexperia
Dual-supply voltage level translator/transceiver; 3-state
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking.......................................................................... 2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description............................................................. 3
7. Functional description................................................. 4
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................5
10. Static characteristics..................................................5
11. Dynamic characteristics.............................................8
11.1. Waveforms and test circuit.......................................11
12. Application information........................................... 13
12.1. Unidirectional logic level-shifting application............13
12.2. Bidirectional logic level-shifting application.............. 13
12.3. Power-up considerations......................................... 14
12.4. Enable times............................................................14
13. Package outline........................................................ 15
14. Abbreviations............................................................ 20
15. Revision history........................................................20
16. Legal information......................................................21
©
Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 10 December 2018
74AVC1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 10 December 2018
©
Nexperia B.V. 2018. All rights reserved
22 / 22