74LVC161
Presettable synchronous 4-bit binary counter; asynchronous
reset
Rev. 7 — 22 September 2021
Product data sheet
1. General description
The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry.
Synchronous operation is provided by having all flip-flops clocked simultaneously on the
positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH
or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the
data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the
clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW
at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE,
CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies
serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed
forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH
output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to
enable the next cascaded stage.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices
as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
•
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
Direct interface with TTL levels
Asynchronous reset
Synchronous counting and loading
Two count enable inputs for n-bit cascading
Positive edge-triggered clock
Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LVC161D
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LVC161PW
-40 °C to +125 °C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LVC161BQ
-40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
SOT763-1
4. Functional diagram
1
15
G3
10
3
D0
Q0
14
4
D1
Q1
13
5
D2
Q2
12
6
D3
Q3
11
9
PE
CEP CET
M1
7
TC
CP
G4
2
C2/1,3,4+
3
14
1,2D
4
MR
CTR4
R
9
13
5
12
6
11
15
4 CT = 15
7
Fig. 1.
10
7
2
1
4
PE
5
D1
IEC logic symbol
6
D2
D3
PARALLEL LOAD
CIRCUITRY
0
CET
TC
CEP
MR
14
Q1
13
Functional diagram
74LVC161
Product data sheet
Q2
12
Q3
11
1
2
3
4
15
5
14
6
13
7
15
BINARY
COUNTER
CP
Q0
Fig. 3.
mna906
Fig. 2.
D0
10
1 mna905
Logic symbol
3
9
2
12
mna907
11
10
9
8
mna908
Fig. 4.
State diagram
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Rev. 7 — 22 September 2021
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Nexperia B.V. 2021. All rights reserved
2 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
MR
PE
D0
D1
D2
D3
CP
CEP
CET
Q0
Q1
Q2
Q3
TC
12
reset
preset
13
14
15
0
1
2
count
inhibit
mna909
Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen, zero,
one and two; inhibit.
Fig. 5.
Timing sequence
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
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Nexperia B.V. 2021. All rights reserved
3 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
D1
D0
D2
D3
CET
CEP
PE
D
FF0
Q
D
CP
RD
FF1
Q
D
CP
Q
RD
FF2
Q
D
CP
Q
RD
FF3
Q
CP
Q
RD
Q
CP
MR
Q0
Q1
Q2
Q3
TC
mna910
Fig. 6.
Logic diagram
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
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Nexperia B.V. 2021. All rights reserved
4 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
5. Pinning information
5.1. Pinning
1
74LVC161
CP
2
15 TC
MR
1
16 VCC
D0
3
14 Q0
CP
2
15 TC
D1
4
13 Q1
D0
3
14 Q0
D2
5
D3
6
CEP
7
12 Q2
4
13 Q1
D2
5
12 Q2
8
9
D3
6
11 Q3
GND
PE
GND(1)
D1
CEP
7
10 CET
GND
8
9
11 Q3
10 CET
001aad087
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
PE
001aad086
Fig. 7.
MR
terminal 1
index area
16 VCC
74LVC161
Pin configuration SOT109-1 (SO16) and
SOT403-1 (TSSOP16)
Fig. 8.
Pin configuration SOT763-1 (DHVQFN16)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
MR
1
synchronous master reset (active LOW)
CP
2
clock input (LOW-to-HIGH, edge-triggered)
D0, D1, D2, D3
3, 4, 5, 6
data input
CEP
7
count enable input
GND
8
ground (0 V)
PE
9
parallel enable input (active LOW)
CET
10
count enable carry input
Q0, Q1, Q2, Q3
14, 13, 12, 11
flip-flop output
TC
15
terminal count output
VCC
16
supply voltage
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
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Nexperia B.V. 2021. All rights reserved
5 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
6. Functional description
Table 3. Function table
* = the TC output is HIGH when CET is HIGH and the counter is at terminal count (HHHH);
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
q = lower case letters indicate the state of the referenced output one set-up time prior to the LOW-to-HIGH clock transition;
X = don’t care; ↑ = LOW-to-HIGH clock transition
Operating
modes
Input
MR
Output
CP
CEP
CET
PE
Dn
Qn
TC
Reset (clear) L
X
X
X
X
X
L
L
Parallel load H
↑
X
X
l
l
L
L
H
↑
X
X
l
h
H
*
Count
H
↑
h
h
h
X
count
*
Hold
(do nothing)
H
X
l
X
h
X
qn
*
H
X
X
l
h
X
qn
L
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
-0.5
+6.5
V
-50
-
-0.5
+6.5
V
-
±50
mA
-0.5
VCC + 0.5
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO
output voltage
IO
output current
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
Ptot
total power dissipation
-
500
mW
[1]
[2]
[3]
VI < 0
[1]
VO > VCC or VO < 0
[2]
VO = 0 V to VCC
Tamb = -40 °C to +125 °C
[3]
mA
V
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
©
Nexperia B.V. 2021. All rights reserved
6 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
VCC
Conditions
supply voltage
Min
Typ
Max
Unit
1.65
-
3.6
V
1.2
-
-
V
0
-
5.5
V
functional
VI
input voltage
VO
output voltage
Tamb
ambient temperature
in free air
Δt/ΔV
input transition rise and fall rate
0
-
VCC
V
-40
-
+125
°C
VCC = 1.65 V to 2.7 V
0
-
20
ns/V
VCC = 2.7 V to 3.6 V
0
-
10
ns/V
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VIH
VIL
VOH
VOL
HIGH-level
input voltage
LOW-level
input voltage
Conditions
-40 °C to +85 °C
VCC = 1.2 V
VCC = 1.65 V to 1.95 V
Min
Typ [1]
Max
Min
Max
1.08
-
-
1.08
-
V
0.65 × VCC
-
-
0.65 × VCC
-
V
1.7
-
-
1.7
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
2.0
-
V
VCC = 1.2 V
-
-
0.12
-
0.12
V
VCC = 1.65 V to 1.95 V
-
-
0.35 × VCC
-
VCC = 2.3 V to 2.7 V
-
-
0.7
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
-
0.8
V
VCC - 0.2
-
-
VCC - 0.3
-
V
IO = -4 mA; VCC = 1.65 V
1.2
-
-
1.05
-
V
IO = -8 mA; VCC = 2.3 V
1.8
-
-
1.65
-
V
IO = -12 mA; VCC = 2.7 V
2.2
-
-
2.05
-
V
IO = -18 mA; VCC = 3.0 V
2.4
-
-
2.25
-
V
IO = -24 mA; VCC = 3.0 V
2.2
-
-
2.0
-
V
-
-
0.2
-
0.3
V
IO = 4 mA; VCC = 1.65 V
-
-
0.45
-
0.65
V
IO = 8 mA; VCC = 2.3 V
-
-
0.6
-
0.8
V
IO = 12 mA; VCC = 2.7 V
-
-
0.4
-
0.6
V
IO = 24 mA; VCC = 3.0 V
-
-
0.55
-
0.8
V
VI = VIH or VIL
LOW-level
output voltage
IO = 100 μA;
VCC = 1.65 V to 3.6 V
Product data sheet
Unit
VCC = 2.3 V to 2.7 V
VI = VIH or VIL
HIGH-level
output voltage
IO = -100 μA;
VCC = 1.65 V to 3.6 V
74LVC161
-40 °C to +125 °C
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 22 September 2021
0.35 × VCC V
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Nexperia B.V. 2021. All rights reserved
7 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
Unit
II
input leakage VCC = 3.6 V; VI = 5.5 V or GND
current
-
±0.1
±5
-
±20
μA
ICC
supply current VCC = 3.6 V; VI = VCC or GND;
IO = 0 A
-
0.1
10
-
40
μA
ΔICC
additional
per input pin;
supply current VCC = 2.7 V to 3.6 V;
VI = VCC - 0.6 V; IO = 0 A
-
5
500
-
5000
μA
CI
input
capacitance
-
5.0
-
-
-
pF
[1]
VCC = 0 V to 3.6 V;
VI = GND to VCC
All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 14.
Symbol Parameter
tpd
Conditions
-40 °C to +85 °C
Typ [1]
Max
Min
Max
-
17
-
-
-
ns
VCC = 1.65 V to 1.95 V
1.5
7.0
14.5
1.5
16.7
ns
VCC = 2.3 V to 2.7 V
2.5
4.0
8.1
2.5
9.4
ns
VCC = 2.7 V
1.5
3.8
7.2
1.5
9.0
ns
VCC = 3.0 V to 3.6 V
1.5
3.6
7.3
1.5
9.5
ns
-
20
-
-
-
ns
VCC = 1.65 V to 1.95 V
1.8
8.1
15.5
1.8
17.9
ns
VCC = 2.3 V to 2.7 V
2.8
4.6
8.7
2.8
10.1
ns
VCC = 2.7 V
1.5
4.3
7.8
1.5
10.0
ns
VCC = 3.0 V to 3.6 V
1.5
4.2
7.8
1.5
10.0
ns
-
16
-
-
-
ns
VCC = 1.65 V to 1.95 V
1.5
5.9
11.9
1.5
13.7
ns
VCC = 2.3 V to 2.7 V
1.9
3.4
6.7
1.9
7.7
ns
VCC = 2.7 V
1.5
3.6
6.5
1.5
8.5
ns
VCC = 3.0 V to 3.6 V
1.5
3.1
6.0
1.5
7.5
ns
[2]
VCC = 1.2 V
CP to TC; see Fig. 9
[2]
VCC = 1.2 V
CET to TC; see Fig. 10
VCC = 1.2 V
Product data sheet
Unit
Min
propagation delay CP to Qn; see Fig. 9
74LVC161
-40 °C to +125 °C
[2]
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8 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
Symbol Parameter
Conditions
-40 °C to +85 °C
Min
tPHL
MR to Qn; see Fig. 11
HIGH to LOW
propagation delay
VCC = 1.2 V
Typ [1]
-40 °C to +125 °C
Max
Min
Unit
Max
-
17
-
-
-
ns
VCC = 1.65 V to 1.95 V
1.5
6.2
12.7
1.5
14.6
ns
VCC = 2.3 V to 2.7 V
1.9
3.6
7.1
1.9
8.3
ns
VCC = 2.7 V
1.5
3.9
7.1
1.5
9.0
ns
VCC = 3.0 V to 3.6 V
1.5
3.2
6.4
1.5
8.0
ns
-
18
-
-
-
ns
VCC = 1.65 V to 1.95 V
1.7
8.3
15.9
1.7
18.4
ns
VCC = 2.3 V to 2.7 V
2.7
4.8
8.9
2.7
10.3
ns
VCC = 2.7 V
1.5
4.9
8.6
1.5
11.0
ns
VCC = 3.0 V to 3.6 V
1.5
4.3
8.0
1.5
10.0
ns
VCC = 1.65 V to 1.95 V
6.0
-
-
6.0
-
ns
VCC = 2.3 V to 2.7 V
5.0
-
-
5.0
-
ns
VCC = 2.7 V
5.0
-
-
5.0
-
ns
VCC = 3.0 V to 3.6 V
4.0
1.2
-
4.0
-
ns
VCC = 1.65 V to 1.95 V
5.0
-
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
-
4.0
-
ns
VCC = 2.7 V
4.0
-
-
4.0
-
ns
VCC = 3.0 V to 3.6 V
3.0
1.6
-
3.0
-
ns
VCC = 1.65 V to 1.95 V
1.0
-
-
1.0
-
ns
VCC = 2.3 V to 2.7 V
1.0
-
-
1.0
-
ns
VCC = 2.7 V
0.0
-
-
0.0
-
ns
VCC = 3.0 V to 3.6 V
0.5
0.0
-
0.5
-
ns
VCC = 1.65 V to 1.95 V
5.0
-
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
-
4.0
-
ns
VCC = 2.7 V
3.0
-
-
3.0
-
ns
VCC = 3.0 V to 3.6 V
2.5
1.0
-
2.5
-
ns
VCC = 1.65 V to 1.95 V
4.5
-
-
4.5
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
-
4.0
-
ns
VCC = 2.7 V
3.5
-
-
3.5
-
ns
VCC = 3.0 V to 3.6 V
3.0
1.2
-
3.0
-
ns
VCC = 1.65 V to 1.95 V
8.0
-
-
8.0
-
ns
VCC = 2.3 V to 2.7 V
6.0
-
-
6.0
-
ns
VCC = 2.7 V
5.5
-
-
5.5
-
ns
VCC = 3.0 V to 3.6 V
5.0
2.1
-
5.0
-
ns
MR to TC; see Fig. 11
VCC = 1.2 V
tW
pulse width
clock HIGH or LOW; see Fig. 9
MR LOW; see Fig. 11
trec
tsu
recovery time
set-up time
MR to CP; see Fig. 11
Dn to CP; see Fig. 12
PE to CP; see Fig. 12
CEP, CET to CP; see Fig. 13
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
©
Nexperia B.V. 2021. All rights reserved
9 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
Symbol Parameter
th
Conditions
Unit
Min
Typ [1]
Max
Min
Max
VCC = 1.65 V to 1.95 V
3.0
-
-
3.0
-
ns
VCC = 2.3 V to 2.7 V
2.5
-
-
2.5
-
ns
VCC = 2.7 V
0.0
-
-
0.0
-
ns
VCC = 3.0 V to 3.6 V
0.5
0.0
-
0.5
-
ns
VCC = 1.65 V to 1.95 V
100
-
-
80
-
MHZ
VCC = 2.3 V to 2.7 V
125
-
-
100
-
MHZ
VCC = 2.7 V
150
-
-
120
-
MHz
VCC = 3.0 V to 3.6 V
150
200
-
120
-
MHz
-
-
1.0
-
1.5
ns
-
11.1
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
14.7
-
-
-
pF
VCC = 3.0 V to 3.6 V
-
17.9
-
-
-
pF
see Fig. 9
maximum
frequency
tsk(o)
output skew time
CPD
power dissipation per input; VI = GND to VCC
capacitance
VCC = 1.65 V to 1.95 V
[1]
[2]
[3]
[4]
-40 °C to +125 °C
Dn, PE, CEP, CET to CP;
see Fig. 12 and Fig. 13
hold time
fmax
-40 °C to +85 °C
VCC = 3.0 V to 3.6 V
[3]
[4]
Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
tpd is the same as tPLH and tPHL.
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + ∑(CL × VCC × fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
2
∑(CL × VCC × fo) = sum of outputs
10.1. Waveforms and test circuit
1/fmax
VI
CP input
VM
GND
tW
t PHL
t PLH
VOH
VM
Qn, TC output
VOL
mna911
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 9.
Clock (CP) to outputs (Qn, TC) propagation delays, the clock pulse width, and maximum frequency
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
©
Nexperia B.V. 2021. All rights reserved
10 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
VI
CET input
VM
GND
t PLH
t PHL
VOH
TC output
VM
VOL
mna912
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 10. Input (CET) to output (TC) propagation delays
VI
VM
MR input
GND
t rec
tW
VI
CP input
VM
GND
t PHL
VOH
Qn, TC output
VM
VOL
mna913
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 11. Master reset (MR) pulse width, the master reset to output (Qn, TC) propagation delays, and the master
reset to clock (CP) removal times
VI
VM
PE input
GND
t su
th
t su
th
VI
VM
CP input
GND
t su
t su
th
th
VI
VM
Dn input
GND
mna914
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig. 12. Set-up and hold times for the input (Dn) and parallel enable input (PE)
74LVC161
Product data sheet
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11 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
VI
CEP, CET input
VM
GND
t su
th
t su
th
VI
CP input
VM
GND
mna915
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig. 13. CEP and CET set-up and hold times
Table 8. Measurement points
Supply voltage
Input
Output
VCC
VI
VM
VM
1.2 V
VCC
0.5 × VCC
0.5 × VCC
1.65 V to 1.95 V
VCC
0.5 × VCC
0.5 × VCC
2.3 V to 2.7 V
VCC
0.5 × VCC
0.5 × VCC
2.7 V
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
2.7 V
1.5 V
1.5 V
74LVC161
Product data sheet
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12 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
tW
VI
90 %
negative
pulse
VM
VM
10 %
0V
VI
tf
tr
tr
tf
90 %
positive
pulse
VM
VM
10 %
0V
tW
VCC
PULSE
GENERATOR
VI
VO
DUT
RT
CL
RL
001aaf615
Test data is given in Table 9. Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig. 14. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
Input
Load
VI
tr, tf
CL
RL
1.2 V
VCC
≤ 2 ns
30 pF
1 kΩ
1.65 V to 1.95 V
VCC
≤ 2 ns
30 pF
1 kΩ
2.3 V to 2.7 V
VCC
≤ 2 ns
30 pF
500 Ω
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
74LVC161
Product data sheet
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13 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
11. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
HE
v M A
Z
16
9
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
8
e
w M
bp
0
2.5
detail X
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.05
0.039
0.016
0.028
0.020
0.01
0.01
0.004
0.028
0.012
0.244
0.041
0.228
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT109-1
076E07
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig. 15. Package outline SOT109-1 (SO16)
74LVC161
Product data sheet
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14 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
D
SOT403-1
E
A
X
c
y
HE
v M A
Z
9
16
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
8
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.40
0.06
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT403-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig. 16. Package outline SOT403-1 (TSSOP16)
74LVC161
Product data sheet
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15 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
SOT763-1
16 terminals; body 2.5 x 3.5 x 0.85 mm
B
D
A
A
E
A1
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
b
2
7
y
y1 C
v M C A B
w M C
L
1
8
Eh
e
16
9
15
10
Dh
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D (1)
Dh
E (1)
Eh
e
e1
L
v
w
y
y1
mm
1
0.05
0.00
0.30
0.18
0.2
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
2.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT763-1
---
MO-241
---
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17
03-01-27
Fig. 17. Package outline SOT763-1 (DHVQFN16)
74LVC161
Product data sheet
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Rev. 7 — 22 September 2021
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16 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
12. Abbreviations
Table 10. Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74LVC161 v.7
20210922
Product data sheet
-
Modifications:
•
•
•
•
•
74LVC161 v.6
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Section 1 and Section 2 updated.
Type number 74LVC161DB (SOT338-1/SSOP16) removed.
Section 7: Derating values for Ptot total power dissipation updated.
74LVC161 v.6
20130930
Modifications:
•
74LVC161 v.5
20121123
Product data sheet
-
74LVC161 v.4
74LVC161 v.4
20121122
Product data sheet
-
74LVC161 v.3
74LVC161 v.3
20040330
Product specification
-
74LVC161 v.2
74LVC161 v.2
19980520
Product specification
-
74LVC161 v.1
74LVC161 v.1
19960823
Product specification
-
-
74LVC161
Product data sheet
Product data sheet
-
74LVC161 v.5
Fig. 6: Logic diagram corrected (errata).
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17 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
14. Legal information
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
74LVC161
Product data sheet
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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18 / 19
74LVC161
Nexperia
Presettable synchronous 4-bit binary counter; asynchronous reset
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................5
5.1. Pinning.........................................................................5
5.2. Pin description............................................................. 5
6. Functional description................................................. 6
7. Limiting values............................................................. 6
8. Recommended operating conditions..........................7
9. Static characteristics....................................................7
10. Dynamic characteristics............................................ 8
10.1. Waveforms and test circuit...................................... 10
11. Package outline........................................................ 14
12. Abbreviations............................................................ 17
13. Revision history........................................................17
14. Legal information......................................................18
©
Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 22 September 2021
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Product data sheet
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19 / 19