SY8079AAC

Application Note: SY8079 High Efficiency 6.5V, 2A continuous, 3A peak, 1MHz Synchronous Step Down Regulator Preliminary Specification Features The SY8079 is a high-efficiency, high frequency synchronous step-down DC-DC regulator IC capable of delivering up to 2A output current. The SY8079 operates over a wide input voltage range from 2.7V to 6.5V and integrates main switch and synchronous switch with very low RDS(ON) to minimize the conduction loss. • Low RDS(ON) for internal switches (top/bottom):125mΩ/95mΩ • 2.7-6.5V input voltage range • 2A continuous, 3A peak load current capability • 1MHz switching frequency minimizes the external components • Internal softstart limits the inrush current • 100% dropout operation • RoHS Compliant and Halogen Free • Compact package: SOT23-5 Temperature Code Package Code Optional Spec Code 4 IN LX Co rp VIN: 2.7-6.5V er gy 1 wo ky 96 VOUT: 1.8V 92 R1 200k C1 22pF COUT 22µFх2 88 5 EN R2 100k GND Sil ON/ OFF Efficiency vs. Load Current 3 L1:2.2µH CIN 22µF FB rs fid .C on Typical Applications Note en Package type SOT23-5 LCD TV Set Top Box Net PC Mini-Notebook PC Access Point Router tia l-P re p • • • • • SY8079 □(□□)□ ar ed Applications Ordering Information Ordering Number SY8079AAC fo Low output voltage ripple and small external inductor and capacitor sizes are achieved with greater than 1MHz switching frequency. rth General Description VIN=3.3V,VOUT=1.8V VIN=4.2V,VOUT=1.8V VIN=5.0V,VOUT=1.8V 84 2 80 0.01 0.10 1.00 10.00 Load Current (A) Figure 1.Schematic diagram AN_SY8079 Rev. 0.1 Figure 2. Efficiency vs Load Current Silergy Corp. Confidential- Prepared for Customer Use Only 1 SY8079 wo rth Pinout (top view) ky (SOT23-5) fo Pin Description Enable control. Pull high to turn on. Do not float. Ground pin. Inductor pin. Connect this pin to the switching node of inductor. Input pin. Decouple this pin to GND pin with at least 10µF ceramic cap. Output Feedback Pin. Connect this pin to the center point of the output resistor divider (as shown in Figure 1) to program the output voltage: Vout=0.6*(1+R1/R2). ar ed Pin Number 1 2 3 4 5 tia l-P re p Pin Name EN GND LX IN FB rs Top Mark: UHxyz (device code: UH, x=year code, y=week code, z= lot number code) Absolute Maximum Ratings (Note 1) Co rp .C on fid en Supply Input Voltage ----------------------------------------------------------------------------------------------- -0.3V to 7.0V Enable, FB Voltage-------------------------------------------------------------------------------------------------- -0.3V to7.0V Power Dissipation, PD @ TA = 25°C, SOT23-5 -------------------------------------------------------------------------------------------------------------- 0.6W Package Thermal Resistance (Note 2) θ JA --------------------------------------------------------------------------------------------------------------- 170°C/W θ JC ----------------------------------------------------------------------------------------------------------------130°C/W Junction Temperature Range ----------------------------------------- ------------------------------------------ -40°C to 150°C Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------------- 260°C Storage Temperature Range ------------------------------------------------------------------------------------- -65°C to 150°C er gy Recommended Operating Conditions (Note 3) Sil Supply Input Voltage ------------------------------------------------------------------------------------------------ 2.7V to 6.5V Enable, FB Voltage ------------------------------------------------------------------------------------------------------ VIN+0.3V Junction Temperature Range ------------------------------------------------------------------------------------ -40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------- -40°C to 85°C AN_SY8079 Rev. 0.1 Silergy Corp. Confidential- Prepared for Customer Use Only 2 SY8079 Sil er gy Co rp .C on fid en tia l-P re p ar ed fo rs ky wo rth Block Diagram AN_SY8079 Rev. 0.1 Silergy Corp. Confidential- Prepared for Customer Use Only 3 SY8079 Electrical Characteristics (VIN = 5V, VOUT = 2.5V, L = 2.2µH, COUT = 22µF, TA = 25°C, unless otherwise specified) TSS RDISCH TSD IOUT=0, VFB=VREF ⋅ 105% EN=0 Min 2.7 Typ ar ed IOUT=500mA fo rs ky 3.5 1.5 1 0.612 wo 0.588 55 0.1 0.6 125 95 Max 6.5 rth Test Conditions tia l-P re p Symbol VIN IQ ISHDN VREF RDS(ON),P RDS(ON),N ILIM VENH VENL VUVLO VHYS FOSC VSCP 0.4 2.65 0.2 1 0.3 75 Unit V µA µA V mΩ mΩ A V V V V MHz V 1.0 50 ns % ms Ω 150 °C 100 en Parameter Input Voltage Range Quiescent Current Shutdown Current Feedback Reference Voltage PFET RON NFET RON PFET Current Limit EN rising threshold EN falling threshold Input UVLO threshold UVLO hysteresis Oscillator Frequency Short Circuit Protection Latch Off Threshold Min ON Time Max Duty Cycle Soft Start Time Output Discharge Switch On Resistance Thermal Shutdown Temperature .C on fid Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Co rp Note 2: Test condition: Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground plane. Sil er gy Note 3: The device is not guaranteed to function outside its operating conditions. AN_SY8079 Rev. 0.1 Silergy Corp. Confidential- Prepared for Customer Use Only 4 SY8079 Typical Performance Characteristics Efficiency vs. Load Current Efficiency vs. Load Current 95 96 90 92 rth 85 88 VIN=3.3V,VOUT=1.2V VIN=4.2V,VOUT=1.2V VIN=5.0V,VOUT=1.2V VIN=3.3V,VOUT=1.8V VIN=4.2V,VOUT=1.8V VIN=5.0V,VOUT=1.8V 84 ky 75 wo 80 0.10 1.00 0.01 10.00 Efficiency vs. Load Current 10.00 Load Transient (VIN=5.0V, VOUT=1.8V, IOUT=0.2-2.0A) 98 tia l-P re p 96 94 92 90 88 VOUT IL 0.2V/div 1A/div en 86 VIN=4.2V,VOUT=3.3V VIN=5.0V,VOUT=3.3V fid 82 1.00 Load Current (A) ar ed Load Current (A) 84 0.10 fo 0.01 rs 80 70 0.01 0.10 .C on 80 1.00 10.00 Time (40µs/div) Sil er gy Co rp Load Current (A) AN_SY8079 Rev. 0.1 Silergy Corp. Confidential- Prepared for Customer Use Only 5 SY8079 Short Circuit Protection 1V/div IL 2A/div rs ky wo VOUT rth (VIN=5.0V, VOUT=1.8V, 2A to Short) ar ed fo Time (4ms/div) Output Ripple VLX 2V/div IL 2A/div en 10mV/div .C on fid ∆VOUT tia l-P re p (VIN=5.0V, VOUT=1.8V, IOUT=2.0A) Sil er gy Co rp Time (400ns/div) AN_SY8079 Rev. 0.1 Silergy Corp. Confidential- Prepared for Customer Use Only 6 SY8079 Applications Information rth wo ky tia l-P re p Because of the high integration in the SY8079 IC, the application circuit based on this regulator IC is rather simple. Only input capacitor CIN, output capacitor COUT, output inductor L and feedback resistors (R1 and R2) need to be selected for the targeted applications specifications. Output capacitor COUT: The output capacitor is selected to handle the output ripple noise requirements. Both steady state ripple and transient requirements must be taken into consideration when selecting this capacitor. For the best performance, it is recommended to use X5R or better grade ceramic capacitor with 6.3V rating and greater than 22µF capacitance. rs Short Circuit Protection The frequency is folded back to about 30% of the nominal frequency and the current limit is folded back to 3.0A to prevent the inductor current from runaway and to reduce the power dissipation of the IC under short circuit conditions. With the maximum load current at 2.0A. A typical X5R or better grade ceramic capacitor with 10V rating and more than 1 pcs 22µ F capacitor can handle this ripple current well. To minimize the potential noise problem, ceramic capacitor should really be placed close to the IN and GND pins. Care should be taken to minimize the loop area formed by CIN, and IN/GND pins fo SY8079 is a synchronous buck regulator IC that integrates the PWM control, top and bottom switches on the same die to minimize the switching transition loss and conduction loss. With ultra low RDS(ON) power switches and proprietary PWM control, this regulator IC can achieve the highest efficiency and the highest switch frequency simultaneously to minimize the external inductor and capacitor size, and thus achieving the minimum solution footprint. This formula has a maximum at VIN=2VOUT condition, where ICIN_RMS=IOUT/2. This simple worst-case condition is commonly used for DC/DC design. ar ed Operation Principle .C on fid en Feedback resistor dividers R1 and R2: Choose R1 and R2 to program the proper output voltage. To minimize the power consumption under light loads, it is desirable to choose large resistance values for both R1 and R2. A value of between 10k and 1M is highly recommended for both resistors. If Vout is 1.8V, R1=100k is chosen, then R2 can be calculated to be 50k.: 0.6V R 1 (Ω) . VOUT -0.6V Co rp R2 = er gy VOUT R1 FB L= VOUT (1 − VOUT /VIN, MAX ) FSW × IOUT, MAX × 40% where Fsw is the switching frequency and IOUT,MAX is the maximum load current. The SY8079 regulator IC is quite tolerant of different ripple current amplitude. Consequently, the final choice of inductance can be slightly off the calculation value without significantly impacting the performance. 2) The saturation current rating of the inductor must be selected to be greater than the peak inductor current under full load conditions. R2 Sil GND Output inductor L: There are several considerations in choosing this inductor. 1) Choose the inductance to provide the desired ripple current. It is suggested to choose the ripple current to be about 40% of the maximum output current. The inductance is calculated as: ISAT, MIN > IOUT, MAX + Input capacitor CIN: This ripple current through input capacitor is calculated as: ICIN_RMS =IOUT × D(1-D) AN_SY8079 Rev. 0.1 VOUT(1-VOUT/VIN,MAX) 2 ⋅ FSW ⋅ L 3) The DCR of the inductor and the core loss at the switching frequency must be low enough to achieve the desired efficiency requirement. It is Silergy Corp. Confidential- Prepared for Customer Use Only 7 SY8079 rth wo ky 5) If the system chip interfacing with the EN pin has a high impedance state at shutdown mode and the IN pin is connected directly to a power source such as a LiIon battery, it is desirable to add a pull down 1MΩ resistor between the EN and GND pins to prevent the noise from falsely turning on the regulator at shutdown mode. Sil er gy Co rp .C on fid en tia l-P re p Layout Design: The layout design of SY8079 regulator is relatively simple. For the best efficiency and minimum noise problems, we should place the following components close to the IC: CIN, L, R1 and R2. 4) The components R1, R2, and the trace connecting to the FB pin must NOT be adjacent to the LX net on the PCB layout to avoid the noise problem. rs Load Transient Considerations: The SY8079 regulator IC integrates the compensation components to achieve good stability and fast transient responses. In some applications, adding a 22pF ceramic cap in parallel with R1 may further speed up the load transient responses and is thus recommended for applications with large load transient step requirements. 3) The PCB copper area associated with LX pin must be minimized to avoid the potential noise problem. fo Enable Operation Pulling the EN pin low (1.5V) will turn on the IC again. 1) It is desirable to maximize the PCB copper area connecting to GND pin to achieve the best thermal and noise performance. If the board space allowed, a ground plane is highly desirable. 2) CIN must be close to Pins IN and GND. The loop area formed by CIN and GND must be minimized. ar ed desirable to choose an inductor with DCR