MA7219N

MA7219/MA7221 Serially Interfaced, 8-Digit LED Display Drivers General Description Features The MA7219/MA7221 are compact, serial input/output common-cathode display drivers that interface microprocessors (µPs) to 7-segment numeric LED displays of up to 8 digits, bar-graph displays, or 64 individual LEDs. Included on-chip are a BCD code-B decoder, multiplex scan circuitry, segment and digit drivers, and an 8x8 static RAM that stores each digit. Only one external resistor is required to set the segment current for all LEDs. The MA7221 is compatible with SPI™, QSPI™, and Microwire™, and has slew-ratelimited segment drivers to reduce EMI. ♦ 10MHz Serial Interface A convenient 3-wire serial interface connects to all common µPs. Individual digits may be addressed and updated without rewriting the entire display. The MA7219/MA7221 also allow the user to select codeB decoding or no-decode for each digit. The devices include a 150µA low-power shutdown mode, analog and digital brightness control, a scanlimit register that allows the user to display from 1 to 8 digits, and a test mode that forces all LEDs on. ♦ Individual LED Segment Control ♦ Decode/No-Decode Digit Selection ♦ 150µA Low-Power Shutdown (Data Retained) ♦ Digital and Analog Brightness Control ♦ Display Blanked on Power-Up ♦ Drive Common-Cathode LED Display ♦ Slew-Rate Limited Segment Drivers for Lower EMI (MA7221) ♦ SPI, QSPI, Microwire Serial Interface (MA7221) ♦ 24-Pin DIP and SO Packages Applications Bar-Graph Displays 7-Segment Displays Industrial Controllers Panel Meters LED Matrix Displays Pin Configuration Typical Application Circuit TOP VIEW DIN 1 24 DOUT DIG 0 2 23 SEG D DIG 4 3 22 SEG DP GND 4 DIG 6 5 MA7219 MA7221 19 9.53k 20 SEG C DIG 2 6 19 V+ DIG 3 7 18 ISET DIG 7 8 17 SEG G GND 9 16 SEG B DIG 5 10 15 SEG F DIG 1 11 14 SEG A LOAD (CS) 12 ( ) MA7221 ONLY +5V 21 SEG E V+ 18 DIG 0–DIG 7 ISET 8 DIGITS MOSI µP I/O SCK 1 12 13 9 13 CLK ( ) MA7221 ONLY DIP/SO MA7219 DIN MA7221 LOAD (CS) SEG A–G, SEG DP CLK GND 8 SEGMENTS GND 4 8-DIGIT µP DISPLAY SPI and QSPI are trademarks of Motorola Inc. Microwire is a trademark of National Semiconductor Corp. http://www.hgsemi.com.cn 1 2018 AUG MA7219/MA7221 ABSOLUTE MAXIMUM RATINGS Voltage (with respect to GND) V+ ............................................................................-0.3V to 6V DIN, CLK, LOAD, CS ...............................................-0.3V to 6V All Other Pins.............................................-0.3V to (V+ + 0.3V) Current DIG0–DIG7 Sink Current................................................500mA SEGA–G, DP Source Current.........................................100mA Continuous Power Dissipation (TA = +85°C) Narrow Plastic DIP ..........................................................0.87W Wide SO ..........................................................................0.76W Narrow CERDIP.................................................................1.1W Operating Temperature Ranges MA7219C /MA7221C..............................0°C to +70°C MA7219E/MA7221E ............................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = 5V ±10%, RSET = 9.53kΩ ±1%, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL Operating Supply Voltage V+ Shutdown Supply Current I+ CONDITIONS MIN TYP 4.0 All digital inputs at V+ or GND, TA = +25°C RSET = open circuit Operating Supply Current I+ MAX UNITS 5.5 V 150 µA 8 All segments and decimal point on, ISEG_ = -40mA mA 330 Display Scan Rate fOSC 8 digits scanned 500 Digit Drive Sink Current IDIGIT V+ = 5V, VOUT = 0.65V 320 Segment Drive Source Current ISEG TA = +25°C, V+ = 5V, VOUT = (V+ - 1V) -30 -40 -45 mA ∆ISEG/∆t TA = +25°C, V+ = 5V, VOUT = (V+ - 1V) 10 20 50 mA/µs Segment Current Slew Rate (MA7221 only) 800 1300 Hz mA Segment Drive Current Matching ∆ISEG Digit Drive Leakage (MA7221 only) IDIGIT Digit off, VDIGIT = V+ Segment Drive Leakage (MA7221 only) ISEG Segment off, VSEG = 0V Digit Drive Source Current (MA7219 only) IDIGIT Digit off, VDIGIT = (V+ - 0.3V) -2 mA Segment Drive Sink Current (MA7219 only) ISEG Segment off, VSEG = 0.3V 5 mA http://www.hgsemi.com.cn 3.0 2 % -10 µA 1 µA 2018 AUG MA7219/MA7221 ELECTRICAL CHARACTERISTICS (continued) (V+ = 5V ±10%, RSET =9.53kΩ ±1%, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1 µA LOGIC INPUTS Input Current DIN, CLK, LOAD, CS IIH, IIL Logic High Input Voltage VIH Logic Low Input Voltage VIL Output High Voltage VOH DOUT, ISOURCE = -1mA Output Low Voltage VOL DOUT, ISINK = 1.6mA Hysteresis Voltage ∆VI DIN, CLK, LOAD, CS VIN = 0V or V+ -1 3.5 V 0.8 V+ - 1 V V 0.4 1 V V TIMING CHARACTERISTICS CLK Clock Period tCP 100 ns CLK Pulse Width High tCH 50 ns CLK Pulse Width Low tCL 50 ns CS Fall to SCLK Rise Setup Time (MA7221 only) tCSS 25 ns CLK Rise to CS or LOAD Rise Hold Time tCSH 0 ns DIN Setup Time tDS 25 ns DIN Hold Time tDH 0 Output Data Propagation Delay tDO Load-Rising Edge to Next Clock Rising Edge (MA7219 only) tLDCK 50 ns Minimum CS or LOAD Pulse High tCSW 50 ns Data-to-Segment Delay tDSPD http://www.hgsemi.com.cn CLOAD = 50pF ns 25 2.25 3 ns ms 2018 AUG MA7219/MA7221 Typical Operating Characteristics (V+ = +5V, TA = +25°C, unless otherwise noted.) SCAN FREQUENCY vs. POSITIVE SUPPLY VOLTAGE 60 OUTPUT CURRENT (mA) 810 MA7219/21 02 820 SCAN FREQUENCY (Hz) 70 MA7219/21 01 830 SEGMENT DRIVER OUTPUT CURRENT vs. OUTPUT VOLTAGE 800 790 780 770 760 RSET = 10kΩ 50 40 RSET = 20kΩ 30 20 RSET = 40kΩ 750 10 740 730 0 4.4 4.8 5.2 5.6 6.0 0 POSITIVE SUPPLY VOLTAGE (V) 3 4 5 MA7219/21 03 MA7221 SEGMENT OUTPUT CURRENT MAXIMUM INTENSITY = 15/16 10mA/div 10mA/div 0 0 5µs/div http://www.hgsemi.com.cn 2 OUTPUT VOLTAGE (V) MA7219 SEGMENT OUTPUT CURRENT MAXIMUM INTENSITY = 31/32 1 MA7219/21 04 4.0 5µs/div 4 2018 AUG MA7219/MA7221 Pin Description PIN NAME 1 DIN 2, 3, 5–8, 10, 11 DIG 0–DIG 7 4, 9 12 GND FUNCTION Serial-Data Input. Data is loaded into the internal 16-bit shift register on CLK’s rising edge. Eight-Digit Drive Lines that sink current from the display common cathode. The MA7219 pulls the digit outputs to V+ when turned off. The MA7221’s digit drivers are high-impedance when turned off. Ground (both GND pins must be connected) LOAD (MA7219) Load-Data Input. The last 16 bits of serial data are latched on LOAD’s rising edge. CS (MA7221) Chip-Select Input. Serial data is loaded into the shift register while CS is low. The last 16 bits of serial data are latched on CS’s rising edge. 13 CLK 14–17, 20–23 SEG A–SEG G, DP 18 ISET 19 V+ 24 DOUT Serial-Clock Input. 10MHz maximum rate. On CLK’s rising edge, data is shifted into the internal shift register. On CLK’s falling edge, data is clocked out of DOUT. On the MA7221, the CLK input is active only while CS is low. Seven Segment Drives and Decimal Point Drive that source current to the display. On the MA7219, when a segment driver is turned off it is pulled to GND. The MA7221 segment dri vers are high-impedance when turned off. - Connect to VDD through a resistor (RSET) to set the peak segment current (Refer to Selecting RSET Resistor section). Positive Supply Voltage. Connect to +5V. Serial-Data Output. The data into DIN is valid at DOUT 16.5 clock cycles later. This pin is used to daisy-chain several MA7219/MA7221’s and is never high-impedance. Functional Diagram DIG 0–DIG 7 SEG A–SEG G, DP SEGMENT DRIVERS DIGIT DRIVERS 8 8 SHUTDOWN REGISTER CODE B ROM WITH BYPASS V+ MODE REGISTER INTENSITY REGISTER SCAN-LIMIT REGISTER RSET 8 SEGMENT CURRENT REFERENCE DISPLAY-TEST REGISTER 8x8 DUAL-PORT SRAM 8 LOAD (CS) INTENSITY PULSEWIDTH MODULATOR 8 MULTIPLEX SCAN CIRCUITRY ADDRESS REGISTER DECODER 4 DIN CLK D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 (LSB) DOUT (MSB) ( ) MA7221 ONLY http://www.hgsemi.com.cn 5 2018 AUG MA7219/MA7221 CS OR LOAD tCSW tCSH tCL tCSS tCP tCH tLDCK CLK tDH tDS DIN D15 D14 D1 D0 tDO DOUT Figure 1. Timing Diagram Table 1. Serial-Data Format (16 Bits) D15 D14 D13 D12 X X X X D11 D10 D9 D8 ADDRESS Detailed Description MA7219/MA7221 Differences The MA7219 and MA7221 are identical except for two parameters: the MA7221 segment drivers are slew-rate limited to reduce electromagnetic interference (EMI), and its serial interface is fully SPI compatible. Serial-Addressing Modes For the MA7219, serial data at DIN, sent in 16-bit packets, is shifted into the internal 16-bit shift register with each rising edge of CLK regardless of the state of LOAD. For the MA7221, CS must be low to clock data in or out. The data is then latched into either the digit or control registers on the rising edge of LOAD/CS. LOAD/CS must go high concurrently with or after the 16th rising clock edge, but before the next rising clock edge or data will be lost. Data at DIN is propagated through the shift register and appears at DOUT 16.5 clock cycles later. Data is clocked out on the falling edge of CLK. Data bits are labeled D0–D15 (Table 1). D8–D11 contain the register address. D0–D7 contain the data, and D12–D15 are “don’t care” bits. The first received is D15, the most significant bit (MSB). http://www.hgsemi.com.cn D7 D6 D5 MSB D4 D3 MSB DATA D2 D1 D0 LSB Digit and Control Registers Table 2 lists the 14 addressable digit and control registers. The digit registers are realized with an on-chip, 8x8 dual-port SRAM. They are addressed directly so that individual digits can be updated and retain data as long as V+ typically exceeds 2V. The control registers consist of decode mode, display intensity, scan limit (number of scanned digits), shutdown, and display test (all LEDs on). Shutdown Mode When the MA7219 is in shutdown mode, the scan oscil lator is halted, all segment current sources are pulled to ground, and all digit drivers are pulled to V+, thereby blanking the display. The MA7221 is identical, except the drivers are high-impedance. Data in the digit and control registers remains unaltered. Shutdown can be used to save power or as an alarm to flash the display by successively entering and leaving shutdown mode. For minimum supply current in shutdown mode, logic inputs should be at ground or V+ (CMOS-logic levels). Typically, it takes less than 250µs for the MA7219/ MA7221 to leave shutdown mode. The display driver can be programmed while in shutdown mode, and shutdown mode can be overridden by the display-test function. 6 2018 AUG MA7219/MA7221 Initial Power-Up Table 2. Register Address Map On initial power-up, all control registers are reset, the display is blanked, and the MA7219/MA7221 enter shutdown mode. Program the display driver prior to display use. Otherwise, it will initially be set to scan one digit, it will not decode data in the data registers, and the intensity register will be set to its minimum value. ADDRESS D15– D12 D11 D10 D9 D8 HEX CODE No-Op X 0 0 0 0 X0 Digit 0 X 0 0 0 1 X1 Digit 1 X 0 0 1 0 X2 Digit 2 X 0 0 1 1 X3 Digit 3 X 0 1 0 0 X4 Digit 4 X 0 1 0 1 X5 Digit 5 X 0 1 1 0 X6 Digit 6 X 0 1 1 1 X7 Digit 7 X 1 0 0 0 X8 Decode Mode X 1 0 0 1 X9 Intensity X 1 0 1 0 XA Scan Limit X 1 0 1 1 XB Shutdown X 1 1 0 0 XC Display Test X 1 1 1 1 XF REGISTER Decode-Mode Register The decode-mode register sets BCD code B (0-9, E, H, L, P, and -) or no-decode operation for each digit. Each bit in the register corresponds to one digit. A logic high selects code B decoding while logic low bypasses the decoder. Examples of the decode mode control-register format are shown in Table 4. When the code B decode mode is used, the decoder looks only at the lower nibble of the data in the digit registers (D3–D0), disregarding bits D4–D6. D7, which sets the decimal point (SEG DP), is independent of the decoder and is positive logic (D7 = 1 turns the decimal point on). Table 5 lists the code B font. When no-decode is selected, data bits D7–D0 correspond to the segment lines of the MA7219/MA7221. Table 6 shows the one-to-one pairing of each data bit to the appropriate segment line. Table 3. Shutdown Register Format (Address (Hex) = XC) REGISTER DATA ADDRESS CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 Shutdown Mode XC X X X X X X X 0 Normal Operation XC X X X X X X X 1 MODE Table 4. Decode-Mode Register Examples (Address (Hex) = X9) REGISTER DATA D7 D6 D5 D4 D3 D2 D1 D0 HEX CODE No decode for digits 7–0 0 0 0 0 0 0 0 0 00 Code B decode for digit 0 No decode for digits 7–1 0 0 0 0 0 0 0 1 01 Code B decode for digits 3–0 No decode for digits 7–4 0 0 0 0 1 1 1 1 0F Code B decode for digits 7–0 1 1 1 1 1 1 1 1 FF DECODE MODE http://www.hgsemi.com.cn 7 2018 AUG MA7219/MA7221 Table 5. Code B Font REGISTER DATA 7-SEGMENT CHARACTER D7* ON SEGMENTS = 1 D6–D4 D3 D2 D1 D0 0 X 0 0 0 1 X 0 0 2 X 0 0 3 X 0 4 X 0 5 X 6 7 DP* A B C D E F G 0 1 1 1 1 1 1 0 0 1 0 1 1 0 0 0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 0 1 0 1 1 0 1 1 0 1 1 X 0 1 1 0 1 0 1 1 1 1 1 X 0 1 1 1 1 1 1 0 0 0 0 8 X 1 0 0 0 1 1 1 1 1 1 1 9 X 1 0 0 1 1 1 1 1 0 1 1 — X 1 0 1 0 0 0 0 0 0 0 1 E X 1 0 1 1 1 0 0 1 1 1 1 H X 1 1 0 0 0 1 1 0 1 1 1 L X 1 1 0 1 0 0 0 1 1 1 0 P X 1 1 1 0 1 1 0 0 1 1 1 blank X 1 1 1 1 0 0 0 0 0 0 0 *The decimal point is set by bit D7 = 1 Table 6. No-Decode Mode Data Bits and Corresponding Segment Lines A F B G STANDARD 7-SEGMENT LED E C D DP REGISTER DATA Corresponding Segment Line D7 D6 D5 D4 D3 D2 D1 D0 DP A B C D E F G http://www.hgsemi.com.cn Intensity Control and Interdigit Blanking The MA7219/MA7221 allow display brightness to be controlled with an external resistor (RSET) connected between V+ and ISET. The peak current sourced from the segment drivers is nominally 100 times the current entering ISET. This resistor can either be fixed or variable to allow brightness adjustment from the front panel. Its minimum value should be 9.53Ω, which typically sets the segment current at 40mA. Display brightness can also be controlled digitally by using the intensity register. Digital control of display brightness is provided by an internal pulse-width modulator, which is controlled by the lower nibble of the intensity register. The modulator scales the average segment current in 16 steps from a maximum of 31/32 down to 1/32 of the peak current set by RSET (15/16 to 1/16 on MA7221). Table 7 lists the intensity register format. The minimum interdigit blanking time is set to 1/32 of a cycle. 8 2018 AUG MA7219/MA7221 Table 7. Intensity Register Format (Address (Hex) = XA) DUTY CYCLE D7 D6 D5 D4 D3 D2 D1 D0 HEX CODE 1/16 (min on) X X X X 0 0 0 0 X0 3/32 2/16 X X X X 0 0 0 1 X1 5/32 3/16 X X X X 0 0 1 0 X2 7/32 4/16 X X X X 0 0 1 1 X3 9/32 5/16 X X X X 0 1 0 0 X4 11/32 6/16 X X X X 0 1 0 1 X5 13/32 7/16 X X X X 0 1 1 0 X6 15/32 8/16 X X X X 0 1 1 1 X7 17/32 9/16 X X X X 1 0 0 0 X8 19/32 10/16 X X X X 1 0 0 1 X9 21/32 11/16 X X X X 1 0 1 0 XA 23/32 12/16 X X X X 1 0 1 1 XB 25/32 13/16 X X X X 1 1 0 0 XC 27/32 14/16 X X X X 1 1 0 1 XD 29/32 15/16 X X X X 1 1 1 0 XE 31/32 15/16 (max on) X X X X 1 1 1 1 XF MA7219 MA7221 1/32 (min on) Table 8. Scan-Limit Register Format (Address (Hex) = XB) REGISTER DATA D7 D6 D5 D4 D3 D2 D1 D0 HEX CODE Display digit 0 only* X X X X X 0 0 0 X0 Display digits 0 & 1* X X X X X 0 0 1 X1 Display digits 0 1 2* X X X X X 0 1 0 X2 Display digits 0 1 2 3 X X X X X 0 1 1 X3 Display digits 0 1 2 3 4 X X X X X 1 0 0 X4 Display digits 0 1 2 3 4 5 X X X X X 1 0 1 X5 Display digits 0 1 2 3 4 5 6 X X X X X 1 1 0 X6 Display digits 0 1 2 3 4 5 6 7 X X X X X 1 1 1 X7 SCAN LIMIT *See Scan-Limit Register section for application. Scan-Limit Register The scan-limit register sets how many digits are displayed, from 1 to 8. They are displayed in a multiplexed manner with a typical display scan rate of 800Hz with 8 digits displayed. If fewer digits are displayed, the scan rate is 8f OSC /N, where N is the number of digits http://www.hgsemi.com.cn scanned. Since the number of scanned digits affects the display brightness, the scan-limit register should not be used to blank portions of the display (such as leading zero suppression). Table 8 lists the scan-limit register format. 9 2018 AUG MA7219/MA7221 If the scan-limit register is set for three digits or less, individual digit drivers will dissipate excessive amounts of power. Consequently, the value of the RSET resistor must be adjusted according to the number of digits displayed, to limit individual digit driver power dissipation. Table 9 lists the number of digits displayed and the corresponding maximum recommended segment current when the digit drivers are used. fourth chip, sent the desired 16-bit word, followed by three no-op codes (hex XX0X, see Table 2). When LOAD/CS goes high, data is latched in all devices. The first three chips receive no-op commands, and the fourth receives the intended data. Applications Information Supply Bypassing and Wiring The display-test register operates in two modes: normal and display test. Display-test mode turns all LEDs on by overriding, but not altering, all controls and digit registers (including the shutdown register). In display-test mode, 8 digits are scanned and the duty cycle is 31/32 (15/16 for MA7221). Table 10 lists the display-test reg ister format. To minimize power-supply ripple due to the peak digit driver currents, connect a 10µF electrolytic and a 0.1µF ceramic capacitor between V+ and GND as close to the device as possible. The MA7219/MA7221 should be placed in close proximity to the LED display, and connections should be kept as short as possible to minimize the effects of wiring inductance and electromagnetic interference. Also, both GND pins must be connected to ground. Table 9. Maximum Segment Current for 1-, 2-, or 3-Digit Displays Selecting RSET Resistor and Using External Drivers Display-Test Register NUMBER OF DIGITS DISPLAYED MAXIMUM SEGMENT CURRENT (mA) 1 10 2 20 3 30 The current per segment is approximately 100 times the current in ISET. To select RSET, see Table 11. The MA7219/MA7221’s maximum recommended seg ment current is 40mA. For segment current levels above these levels, external digit drivers will be needed. In this application, the MA7219/MA7221 serve only as controllers for other high-current drivers or transistors. Therefore, to conserve power, use RSET = 47kΩ when using external current sources as segment drivers. Table 10. Display-Test Register Format (Address (Hex) = XF) MODE REGISTER DATA D7 D6 D5 D4 D3 D2 D1 D0 Normal Operation X X X X X X X 0 Display Test Mode X X X X X X X 1 Note: The MA7219/MA7221 remain in display-test mode (all LEDs on) until the display-test register is reconfigured for normal operation. No-Op Register The no-op register is used when cascading MA7219s or MA7221s. Connect all devices’ LOAD/ CS inputs together and connect DOUT to DIN on adjacent devices. DOUT is a CMOS logic-level output that easily drives DIN of successively cascaded parts. (Refer to the Serial Addressing Modes section for detailed information on serial input/output timing.) For example, if four MA7219s are cascaded, then to write to the http://www.hgsemi.com.cn The example in Figure 2 uses the MA7219/MA7221’s segment drivers, a MA394 single-pole double-throw analog switch, and external transistors to drive 2.3” AND2307SLC common-cathode displays. The 5.6V zener diode has been added in series with the decimal point LED because the decimal point LED forward voltage is typically 4.2V. For all other segments the LED forward voltage is typically 8V. Since external transistors are used to sink current (DIG 0 and DIG 1 are used as logic switches), peak segment currents of 45mA are allowed even though only two digits are displayed. In applications where the MA7219/MA7221’s digit drivers are used to sink current and fewer than four digits are displayed, Table 9 specifies the maximum allowable segment current. RSET must be selected accordingly (Table 11). Refer to the Power Dissipation section of the Absolute Maximum Ratings to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop. 10 2018 AUG MA7219/MA7221 Table 11. RSET vs. Segment Current and LED Forward Voltage ISEG (mA) 40 Table 12. Package Thermal Resistance Data VLED (V) PACKAGE THERMAL RESISTANCE (θJA) 1.5 2.0 2.5 3.0 3.5 12.2 11.8 11.0 10.6 9.69 24 Narrow DIP +75°C/W +85°C/W +60°C/W 30 17.8 17.1 15.8 15.0 14.0 24 Wide SO 20 29.8 28.0 25.9 24.5 22.6 24 CERDIP 51.2 Maximum Junction Temperature (TJ) = +150°C 10 66.7 63.7 59.3 55.4 Maximum Ambient Temperature (TA) = +85°C Computing Power Dissipation Cascading Drivers The upper limit for power dissipation (PD) for the MA7219/MA7221 is determined from the following equation: PD = (V + x 8mA) + (V+ - VLED)(DUTY x ISEG x N) The example in Figure 3 drives 16 digits using a 3-wire µP interface. If the number of digits is not a multiple of 8, set both drivers’ scan limits registers to the same number so one display will not appear brighter than the other. For example, if 12 digits are need, use 6 digits per display with both scan-limit registers set for 6 digits so that both displays have a 1/6 duty cycle per digit. If 11 digits are needed, set both scan-limit registers for 6 digits and leave one digit driver unconnected. If one display for 6 digits and the other for 5 digits, the second display will appear brighter because its duty cycle per digit will be 1/5 while the first display’s will be 1/6. Refer to the No-Op Register section for additional information. where: V+ = supply voltage DUTY = duty cycle set by intensity register N = number of segments driven (worst case is 8) VLED = LED forward voltage ISEG = segment current set by RSET Dissipation Example: ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, V+ = 5.25V PD = 5.25V(8mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.11W Thus, for a CERDIP package (θ JA = +60°C/W from Table 12), the maximum allowed ambient temperature TA is given by: TJ(MAX) = TA + PD x θJA + 150°C = TA +1.11W x 60°C/W where TA = +83.4°C. http://www.hgsemi.com.cn 11 2018 AUG MA7219/MA7221 AND2307SLC 5 7 9 6 10 4 2 3 1N5524B 5.6V ±5% AND2307SLC 5 ANODE DP ANODE DP 7 ANODE A ANODE A 9 ANODE F ANODE F 6 ANODE B ANODE B 10 ANODE G ANODE G 4 2 ANODE C ANODE E ANODE C ANODE E 3 ANODE D CATHODE 8 ANODE D CATHODE 8 23 21 20 17 16 15 14 22 SEG D SEG E SEG C SEG G SEG B SEG F 5V MA7219 MA7221 V+ 19 4.7k SEG A 30k SEG DP 4 9 DATA IN LOAD (CS) CLOCK 1 12 13 18 GND 16 ISFT GND * DIN DIG 0 LOAD (CS) DIG 1 4.7k 4 * 2 7 1 NC1 COM1 NC2 MA394 10 IN1 11 2 CLK 9 IN2 NO1 COM2 3 IRF540 8 NO2 5 *4.7kΩ PULL-UP REQUIRED FOR MA7221 ( ) MA7221 ONLY -5V IRF540 Figure 2. MA7219/MA7221 Driving 2.3-Inch Displays http://www.hgsemi.com.cn 12 2018 AUG MA7219/MA7221 8 DATA IN 8 8 DIN DOUT DIN DOUT DIG 0 SEG D DIG 0 SEG D DIG 4 SEG DP DIG 4 SEG DP GND SEG E DIG 6 SEG C 5V GND SEG E DIG 6 SEG C DIG 2 V+ DIG 2 V+ DIG 3 ISET DIG 3 ISET DIG 7 SEG G DIG 7 SEG G GND SEG B GND SEG B DIG 5 SEG F DIG 5 SEG F DIG 1 SEG A DIG 1 SEG A LOAD (CS) ( ) MA7221 ONLY 8 CLK 9.53k MA7219 MA7221 LOAD (CS) CLK 5V 9.53k MA7219 MA7221 LOAD DATA CLOCK Figure 3. Cascading MA7219/MA7221s to Drive 16 7-Segment LED Digits http://www.hgsemi.com.cn 13 2018 AUG MA7219/MA7221 Important statement: Huaguan Semiconductor Co,Ltd. reserves the right to change the products and services provided without notice. Customers should obtain the latest relevant information before ordering, and verify the timeliness and accuracy of this information. Customers are responsible for complying with safety standards and taking safety measures when using our products for system design and machine manufacturing to avoid potential risks that may result in personal injury or property damage. Our products are not licensed for applications in life support, military, aerospace, etc., so we do not bear the consequences of the application of these products in these fields. Our documentation is only permitted to be copied without any tampering with the content, so we do not accept any responsibility or liability for the altered documents. http://www.hgsemi.com.cn 14 2018 AUG