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LP2951M-5.0/TR

LP2951M-5.0/TR

  • 厂商:

    HGSEMI(华冠)

  • 封装:

    SOP-8

  • 描述:

    可调微功率关断调压器 5V

  • 数据手册
  • 价格&库存
LP2951M-5.0/TR 数据手册
LP2950/LP2951 ADJUSTABLE MICROPOWER VOLTAGE REGULATORS WITH SHUTDOWN FEATURES • • • • • • • • • • • Wide Input Range…up to 30 V Rated Output Current of 100 mA Low Dropout…380 mV (Typ) at 100 mA Low Quiescent Current…75 µA (Typ) Tight Line Regulation…0.03% (Typ) Tight Load Regulation…0.04% (Typ) High VO Accuracy – 1.4% at 25°C – 2% Over Temperature Can Be Used as a Regulator or Reference LP2950...LP (TO-226/TO-92 PACKAGE (BOTTOM VIEW) OUTPUT GND INPUT Stable With Low ESR (>12 mΩ) Capacitors Current- and Thermal-Limiting Features LP2950 Only (3-Pin Package) – Fixed-Output Voltages of 5 V, 3.3 V, and 3 V LP2951 Only (8-Pin Package) – Fixed- or Adjustable-Output Voltages: 5 V/ADJ, 3.3 V/ADJ, and 3 V/ADJ – Low-Voltage Error Signal on Falling Output – Shutdown Capability – Remote Sense Capability for Optimal Output Regulation and Accuracy • LP2951...D (SOIC) PACKAGE (TOP VIEW) OUTPUT SENSE SHUTDOWN GND 1 8 2 7 3 6 4 5 INPUT FEEDBACK VTAP ERROR DESCRIPTION The LP2950 and LP2951 devices are bipolar, low-dropout voltage regulators that can accommodate a wide input supply-voltage range of up to 30 V. The easy-to-use, 3-pin LP2950 is available in fixed-output voltages of 5 V, 3.3 V, and 3 V. However, the 8-pin LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2951 outputs a fixed 5 V, 3.3 V, or 3 V (depending on the version). Alternatively, by leaving the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 1.235 V to 30 V. The 8-pin LP2951 also offers additional functionality that makes it particularly suitable for battery-powered applications. For example, a logic-compatible shutdown feature allows the regulator to be put in standby mode for power savings. In addition, there is a built-in supervisor reset function in which the ERROR output goes low when VOUT drops by 6% of its nominal value for whatever reasons – due to a drop in VIN, current limiting, or thermal shutdown. The LP2950 and LP2951 are designed to minimize all error contributions to the output voltage. With a tight output tolerance (0.5% at 25°C), a very low output voltage temperature coefficient (20 ppm typical), extremely good line and load regulation (0.3% and 0.4% typical), and remote sensing capability, the parts can be used as either low-power voltage references or 100-mA regulators. http://www.hgsemi.com.cn 1 2014 OCT LP2950/LP2951 LP2950 FUNCTIONAL BLOCK DIAGRAM Unregulated DC + INPUT VOUT IL 3 100 mA OUTPUT + − + ERROR Amplifier + See Application Information 1.23-V Reference GND LP2951 FUNCTIONAL BLOCK DIAGRAM Unregulated DC + VOUT IL 3 100 mA 7 8 1 INPUT FEEDBACK OUTPUT 2 SENSE + − ERROR Amplifier 3 From CMOS or TTL SHUTDOWN 6 VTAP 330 kW 5 + + ERROR 60 mV − + See Application Information See Application Information To CMOS or TTL + 1.235-V Reference 4 GND ERROR Detection Comparator http://www.hgsemi.com.cn 2 2014 OCT LP2950/LP2951 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VIN Continuous input voltage range –0.3 30 V VSHDN SHUTDOWN input voltage range –1.5 30 V ERROR comparator output voltage range (2) –1.5 30 V 30 V VFDBK FEEDBACK input voltage range (2) (3) θJA Package thermal impedance (4) (5) TJ Operating virtual junction temperature Tstg Storage temperature range (1) (2) (3) (4) (5) –1.5 D package 97 LP package 140 –65 °C/W 150 °C 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. May exceed input supply voltage If load is returned to a negative power supply, the output must be diode clamped to GND. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions MIN VIN Supply input voltage TJ Operating virtual junction temperature (1) MAX UNIT (1) 30 V –40 125 °C Minimum VIN is the greater of: a. 2 V (25°C), 2.3 V (over temperature), or b. VOUT(MAX) + Dropout (Max) at rated IL http://www.hgsemi.com.cn 3 2014 OCT LP2950/LP2951 Electrical Characteristics VIN = VOUT (nominal) + 1 V, IL = 100 µA, CL = 1 µF (5-V versions) or CL = 2.2 µF (3-V and 3.3-V versions), 8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7 V PARAMETER TEST CONDITIONS TJ MIN TYP MAX UNIT 3-V VERSION (LP295x-30) VOUT Output voltage IL = 100µA 25°C 2.970 3 3.030 –40°C to 125°C 2.940 3 3.060 V 3.3-V VERSION (LP295x-33) VOUT Output voltage IL = 100µA 25°C 3.267 3.3 3.333 –40°C to 125°C 3.234 3.3 3.366 25°C 4.950 5 5.050 –40°C to 125°C 4.900 5 5.100 V 5-V VERSION (LP295x-50) VOUT Output voltage IL = 100µA V ALL VOLTAGE OPTIONS Output voltage temperature coefficient (1) IL = 100 µA Line regulation (2) VIN = [VOUT(NOM) + 1 V] to 30 V Load regulation (2) IL = 100 µA to 100 mA –40°C to 125°C 0.03 –40°C to 125°C 25°C 0.04 –40°C to 125°C 50 380 75 –40°C to 125°C 8 –40°C to 125°C Dropout ground current VIN = VOUT(NOM) – 0.5 V, IL = 100 µA Current limit VOUT = 0 V 25°C 110 –40°C to 125°C 120 12 170 200 25°C 160 200 220 25°C 0.05 CL = 1 µF (5 V only) Output noise (RMS), 10 Hz to 100 kHz 450 14 –40°C to 125°C IL = 100 µA % 80 140 25°C IL = 100 mA %/V mV 600 25°C GND current 0.2 150 –40°C to 125°C IL = 100 µA 0.2 0.3 25°C IL = 100 mA 100 ppm/°C 0.4 –40°C to 125°C VIN – VOUT Dropout voltage (3) Thermal regulation (4) 25°C 25°C IL = 100 µA IGND 20 0.2 µA mA µA mA %/W 430 CL = 200 µF 160 LP2951-50: CL = 3.3 µF, CBypass = 0.01 µF between pins 1 and 7 µV 25°C 100 (LP2951-xx) 8-PIN VERSION ONLY ADJ Reference voltage VOUT = VREF to (VIN – 1 V), VIN = 2.3 V to 30 V, IL = 100 µA to 100 mA Reference voltage temperature coefficient (1) (1) (2) (3) (4) 25°C 1.218 1.235 1.252 –40°C to 125°C 1.212 1.257 –40°C to 125°C 1.200 1.272 V 25°C 20 ppm/°C Output or reference voltage temperature coefficient is defined as the worst-case voltage change divided by the total temperature range. Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation. Dropout voltage is defined as the input-to-output differential at which the output voltage drops 100 mV, below the value measured at 1-V differential. The minimum input supply voltage of 2 V (2.3 V over temperature) must be observed. Thermal regulation is defined as the change in output voltage at a time (T) after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 50-mA load pulse at VIN = 30 V, VOUT = 5 V (1.25-W pulse) for t = 10 ms. http://www.hgsemi.com.cn 4 2014 OCT LP2950/LP2951 Electrical Characteristics (continued) VIN = VOUT (nominal) + 1 V, IL = 100 µA, CL = 1 µF (5-V versions) or CL = 2.2 µF (3-V and 3.3-V versions), 8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7 V PARAMETER TEST CONDITIONS TJ MIN 25°C FEEDBACK bias current TYP MAX 20 40 –40°C to 125°C FEEDBACK bias current temperature coefficient 60 25°C 0.1 25°C 0.01 UNIT nA nA/°C ERROR COMPARATOR Output leakage current VOUT = 30 V Output low voltage VIN = VOUT(NOM) – 0.5 V, IOL = 400 µA –40°C to 125°C Upper threshold voltage (ERROR output high) (5) 2 25°C 150 –40°C to 125°C 25°C 40 –40°C to 125°C 25 60 75 –40°C to 125°C Hysteresis (6) 250 400 25°C Lower threshold voltage (ERROR output low) (5) 1 mV mV 95 140 25°C µA 15 mV mV SHUTDOWN INPUT Input logic voltage Low (regulator ON) –40°C to 125°C High (regulator OFF) 25°C VTAP = 2.4 V 25°C VTAP = 30 V (5) (6) 30 50 450 600 –40°C to 125°C SHUTDOWN input current Regulator output current in shutdown 0.7 2 100 –40°C to 125°C VSHUTDOWN ≥ 2 V, VIN ≤ 30 V, VOUT = 0, FEEDBACK tied to VTAP 25°C –40°C to 125°C V µA 750 3 10 20 µA Comparator thresholds are expressed in terms of a voltage differential equal to the nominal reference voltage (measured at VIN – VOUT = 1 V) minus FEEDBACK terminal voltage. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = VOUT/VREF = (R1 + R2)/R2. For example, at a programmed output voltage of 5 V, the ERROR output is specified to go low when the output drops by 95 mV × 5 V/1.235 V = 384 mV. Thresholds remain constant as a percentage of VOUT (as VOUT is varied), with the low-output warning occurring at 6% below nominal (typ) and 7.7% (max). Comparator thresholds are expressed in terms of a voltage differential equal to the nominal reference voltage (measured at VIN – VOUT = 1 V) minus FEEDBACK terminal voltage. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = VOUT/VREF = (R1 + R2)/R2. For example, at a programmed output voltage of 5 V, the ERROR output is specified to go low when the output drops by 95 mV × 5 V/1.235 V = 384 mV. Thresholds remain constant as a percentage of VOUT (as VOUT is varied), with the low-output warning occurring at 6% below nominal (typ) and 7.7% (max). http://www.hgsemi.com.cn 5 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS QUIESCENT CURRENT vs LOAD CURRENT INPUT CURRENT vs INPUT VOLTAGE 100 10 RL = ∞ 80 1 Input Current – µA Quiescent Current – mA 90 0.1 70 60 50 40 30 20 10 0.01 0.0001 0.001 0.01 0.1 0 IL – Load Current – A 0 1 2 3 4 5 6 7 8 9 10 8 9 10 VIN – Input Voltage – V INPUT CURRENT vs INPUT VOLTAGE 200 INPUT CURRENT vs INPUT VOLTAGE 120 RL = 50 kΩ RL = 50 Ω 110 180 100 160 Input Current – mA Input Current – µA 90 140 120 100 80 60 80 70 60 50 40 30 40 20 20 10 0 0 1 2 3 4 5 6 7 8 9 0 10 0 VIN – Input Voltage – V http://www.hgsemi.com.cn 1 2 3 4 5 6 7 VIN – Input Voltage – V 6 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE vs TEMPERATURE QUIESCENT CURRENT vs INPUT VOLTAGE 5.100 120 110 IL = 0 5.075 5.050 5.025 Quiescent Current – µA VOUT – Output Voltage – V 100 IL = 100 µA 5.000 IL = 100 m A 4.975 4.950 90 80 70 60 50 40 30 20 4.925 10 4.900 -40 -25 -10 5 0 0 20 35 50 65 80 95 110 125 1 2 3 4 5 TA – Temperature – °C VIN – Input Voltage – V QUIESCENT CURRENT vs INPUT VOLTAGE QUIESCENT CURRENT vs INPUT VOLTAGE 6 7 8 6 7 8 8 120 IL = 100 mA IL = 1 mA 110 7 90 Quiescent Current – µA Quiescent Current – µA 100 80 70 60 50 40 30 20 6 5 4 3 2 1 10 0 0 0 1 2 3 4 5 6 7 0 8 2 3 4 5 VIN – Input Voltage – V VIN – Input Voltage – V http://www.hgsemi.com.cn 1 7 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 100 10 9.5 IL = 100 m A V IN = 6 V 95 90 Quiescent Current – µA Quiescent Current – mA 9 8.5 8 7.5 7 6.5 85 80 75 70 65 6 60 5.5 55 5 -40 -25 -10 5 20 35 50 65 80 50 -40 -25 -10 95 110 125 5 20 35 50 65 80 TA – Temperature – °C TA – Temperature – °C SHORT-CIRCUIT CURRENT vs TEMPERATURE DROPOUT VOLTAGE vs TEMPERATURE 250 450 (V IN – V OUT ) – Dropout Voltage – mV 200 175 150 125 100 75 50 -40 -25 -10 95 110 125 500 225 Short-Circuit Current – A IL = 100 µA V IN = 6 V 5 20 35 50 65 80 350 RL = 100 m A 300 250 200 150 100 RL = 100 µA 50 0 -40 -25 -10 95 110 125 TA – Tem perature – °C http://www.hgsemi.com.cn 400 5 20 35 50 65 80 95 110 125 TA – Temperature – °C 8 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) LP2951 MINIMUM OPERATING VOLTAGE vs TEMPERATURE 400 2 350 1.95 Minimum Operating Voltage – V (V IN – V OUT ) – Dropout Voltage – mV DROPOUT VOLTAGE vs OUTPUT CURRENT 300 250 200 150 100 50 1.9 1.85 1.8 1.75 1.7 1.65 0 0.0001 0.001 0.01 1.6 -40 -25 -10 0.1 30 8 25 7 20 6 15 10 5 0 -5 4 3 1 -15 0 50-kW resistor to VOUT 0 45 70 95 95 110 125 5 -10 20 65 80 50-kW resistor to external 5-V supply 2 -5 35 50 LP2951 ERROR COMPARATOR OUTPUT vs INPUT VOLTAGE ERROR Output – V FEEDBACK Bias Current – nA LP2951 FEEDBACK BIAS CURRENT vs TEMPERATURE -30 20 TA – Temperature – °C IO – Output Current – A -20 -55 5 1 2 3 4 5 6 7 8 V IN – Input Voltage – V 120 145 TA – Temperature – °C http://www.hgsemi.com.cn 9 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) LINE TRANSIENT RESPONSE vs TIME LP2951 ERROR COMPARATOR SINK CURRENT vs OUTPUT LOW VOLTAGE 2 ISINK – Sink Current – mA 1.75 TA = 125 Input Voltage 2 V/div 1.5 1.25 TA = 25 1 Output Voltage 80 mV/div 0.75 TA = –40 0.5 0.25 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VOL – Output Low Voltage – V LOAD TRANSIENT RESPONSE vs TIME (VOUT = 5 V, CL = 1 µF) LOAD TRANSIENT RESPONSE vs TIME (VOUT = 5 V, CL = 10 µF) Output Voltage 100 mV/div Output Voltage 100 mV/div Output Load 100 mA/div Output Load 100 mA/div http://www.hgsemi.com.cn 10 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) ENABLE TRANSIENT RESPONSE vs TIME (CL = 1 µF, IL = 1 mA) ENABLE TRANSIENT RESPONSE vs TIME (CL = 10 µF, IL = 1 mA) OUTPUT IMPEDANCE vs FREQUENCY RIPPLE REJECTION vs FREQUENCY 100 90 Power-Supply Ripple Rejection – dB Ω Output Impedance – Ohm IL = 100 µA 10 1 IL = 1 m A 0.1 IL = 100 m A 0.01 10 1.E+01 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 80 IL = 0 70 60 50 IL = 100 µA 40 30 V IN = 6 V CL = 1 µF 20 10 1.E+01 1M 1.E+06 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 1M 1.E+06 f – Frequency – Hz f – Frequency – Hz http://www.hgsemi.com.cn 11 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) RIPPLE REJECTION vs FREQUENCY RIPPLE REJECTION vs FREQUENCY 100 100 VIN = 6 V 90 Power-Supply Ripple Rejection – dB Power-Supply Ripple Rejection – dB VIN = 6 V CL = 1 µF 90 80 70 60 50 IL = 1 mA 40 30 20 80 CL = 1 µF IL = 50 mA 70 60 50 40 IL = 100 mA 30 20 IL = 10 mA 10 1.E+01 10 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k 10 10 1.E+01 1.E+06 1M 100 1.E+02 1k 1.E+03 f – Frequency – Hz 100k 1.E+05 1M 1.E+06 f – Frequency – Hz LP2951 OUTPUT NOISE vs FREQUENCY LP2951 DIVIDER RESISTANCE vs TEMPERATURE 400 RP2P4 – Pin 2 to Pin 4 Resistance – k W 6 5 Output Noise – µV 10k 1.E+04 4 CL = 200 µF 3 CL = 1 µF 2 1 350 300 250 200 150 100 50 CL = 3.3 µF 0 1.E+01 10 1.E+02 100 1.E+03 1k 1.E+04 10k 0 -40 -25 -10 1.E+05 100k 20 35 50 65 80 95 110 125 TA – Temperature – °C f – Frequency – Hz http://www.hgsemi.com.cn 5 12 2014 OCT LP2950/LP2951 TYPICAL CHARACTERISTICS (continued) SHUTDOWN THRESHOLD VOLTAGE (ON TO OFF) vs TEMPERATURE 1.7 1.7 1.6 1.6 Input Logic Voltage (ON to OFF) – V Input Logic Voltage (OFF to ON) – V SHUTDOWN THRESHOLD VOLTAGE (OFF TO ON) vs TEMPERATURE 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 -40 -25 -10 5 20 35 50 65 80 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 -40 -25 -10 95 110 125 TA – Temperature – °C 5 20 35 50 65 80 95 110 125 TA – Temperature – °C LINE REGULATION vs INPUT VOLTAGE 6 Output Voltage Change – mV 5 4 3 2 1 0 -1 -2 0 5 10 15 20 25 30 VIN – Input Voltage – V http://www.hgsemi.com.cn 13 2014 OCT LP2950/LP2951 APPLICATION INFORMATION Input Capacitor (CIN) A 1-µF (tantalum, ceramic, or aluminum) electrolytic capacitor should be placed locally at the input of the LP2950 or LP2951 if there is, or will be, significant impedance between the ac filter capacitor and the input; for example, if a battery is used as the input or if the ac filter capacitor is located more than 10 in away. There are no ESR requirements for this capacitor, and the capacitance can be increased without limit. Output Capacitor (COUT) As with most PNP LDOs, stability conditions require the output capacitor to have a minimum capacitance and an ESR that falls within a certain range. Capacitance Value For VOUT ≥ 5 V, a minimum of 1 µF is required. For lower VOUT, the regulator ’sloop gain is running closer to unity gain and, thus, has lower phase margins. Consequently, a larger capacitance is needed for stability. For VOUT = 3 V or 3.3 V, a minimum of 2.2 µF is recommended. For worst case, VOUT = 1.23 V (using the ADJ version), a minimum of 3.3 µF is recommended. COUT can be increased without limit and only improves the regulator stability and transient response. Regardless of its value, the output capacitor should have a resonant frequency less than 500 kHz. The minimum capacitance values given above are for maximum load current of 100 mA. If the maximum expected load current is less than 100 mA, then lower values of COUT can be used. For instance, if IOUT < 10 mA, then only 0.33 µF is required for COUT. For IOUT < 1 mA, 0.1 µF is sufficient for stability requirements. Thus, for a worst-case condition of 100-mA load and VOUT = VREF = 1.235 V (representing the highest load current and lowest loop gain), a minimum COUT of 3.3 µF is recommended. For the LP2950, no load stability is inherent in the design — a desirable feature in CMOS circuits that are put in standby (such as RAM keep-alive applications). If the LP2951 is used with external resistors to set the output voltage, a minimum load current of 1 µA is recommended through the resistor divider. ESR Range The regulator control loop relies on the ESR of the output capacitor to provide a zero to add sufficient phase margin to ensure unconditional regulator stability; this requires the closed-loop gain to intersect the open-loop response in a region where the open-loop gain rolls off at 20 dB/decade. This ensures that the phase always is less than 180° (phase margin greater than 0°) at unity gain. Thus, a minimum-maximum range for the ESR must be observed. The upper limit of this ESR range is established by the fact that too high an ESR could result in the zero occurring too soon, causing the gain to roll off too slowly, which, in turn allows a third pole to appear before unity gain and introduce enough phase shift to cause instability. This typically limits the max ESR to approximately 5 Ω. Conversely, the lower limit of the ESR is tied to the fact that too low an ESR shifts the zero too far out (past unity gain) and, thus, allows the gain to roll off at 40 dB/decade at unity gain, with a resulting phase shift of greater than 180°. Typically, this limits the minimum ESR to approximately 20 mΩ to 30 mΩ. For specific ESR requirements, see Typical Characteristics . http://www.hgsemi.com.cn 14 2014 OCT LP2950/LP2951 APPLICATION INFORMATION (continued) Capacitor Types Most tantalum or aluminum electrolytics are suitable for use at the input. Film-type capacitors also work, but at higher cost. When operating at low temperature, care should be taken with aluminum electrolytics, as their electrolytes often freeze at –30°C. For this reason, solid tantalum capacitors should be used at temperatures below –25°C. Ceramic capacitors can be used, but due to their low ESR (as low as 5 mΩ to 10 mΩ), they may not meet the minimum ESR requirement previously discussed. If a ceramic capacitor is used, a series resistor between 0.1 Ω to 2 Ω must be added to meet the minimum ESR requirement. In addition, ceramic capacitors have one glaring disadvantage that must be taken into account — a poor temperature coefficient, where the capacitance can vary significantly with temperature. For instance, a large-value ceramic capacitor (≥2.2 µF) can lose more than half of its capacitance as temperature rises from 25°C to 85°C. Thus, a 2.2-µF capacitor at 25°C drops well below the minimum COUT required for stability as ambient temperature rises. For this reason, select an output capacitor that maintains the minimum 2.2-µF required for stability for the entire operating temperature range. CBYPASS: Noise and Stability Improvement In the LP2951, an external FEEDBACK pin directly connected to the error amplifier noninverting input can allow stray capacitance to cause instability by shunting the error amplifier feedback to GND, especially at high frequencies. This is worsened if high-value external resistors are used to set the output voltage, because a high resistance allows the stray capacitance to play a more significant role; i.e., a larger RC time delay is introduced between the output of the error amplifier and its FEEDBACK input, leading to more phase shift and lower phase margin. A solution is to add a 100-pF bypass capacitor (CBYPASS) between OUTPUT and FEEDBACK; because CBYPASS is in parallel with R1, it lowers the impedance seen at FEEDBACK at high frequencies, in effect offsetting the effect of the parasitic capacitance by providing more feedback at higher frequencies. More feedback forces the error amplifier to work at a lower loop gain, so COUT should be increased to a minimum of 3.3 µF to improve the regulator ’sphase margin. CBYPASS can be also used to reduce output noise in the LP2951. This bypass capacitor reduces the closed loop gain of the error amplifier at the high frequency, so noise no longer scales with the output voltage. This improvement is more noticeable with higher output voltages, because loop gain reduction is greatest. A suitable CBYPASS is calculated as shown in Equation 1: 1 f (CBYPASS) ] 200 Hz ³ CBYPASS + 2p R1 200 Hz (1) On the 3-pin LP2950, noise reduction can be achieved by increasing the output capacitor, which causes the regulator bandwidth to be reduced, therefore, eliminating high-frequency noise. However, this method is relatively inefficient, as increasing COUT from 1 µF to 220 µF only reduces the regulator ’soutput noise from 430 µV to 160 µV (over a 100-kHz bandwidth). ERROR Function (LP2951 Only) The LP2951 has a low-voltage detection comparator that outputs a logic low when the output voltage drops by ≈6% from its nominal value, and outputs a logic high when VOUT has reached ≈95% of its nominal value. This 95% of nominal figure is obtained by dividing the built-in offset of ≈60 mV by the 1.235-V bandgap reference, and remains independent of the programmed output voltage. For example, the trip-point threshold (ERROR output goes high) typically is 4.75 V for a 5-V output and 11.4 V for a 12-V output. Typically, there is a hysteresis of 15 mV between the thresholds for high and low ERROR output. A timing diagram is shown in Figure 1 for ERROR vs VOUT (5 V), as VIN is ramped up and down. ERROR becomes valid (low) when VIN ≈ 1.3 V. When VIN ≈ 5 V, VOUT = 4.75 V, causing ERROR to go high. Because the dropout voltage is load dependent, the output trip-point threshold is reached at different values of VIN, depending on the load current. For instance, at higher load current, ERROR goes high at a slightly higher value of VIN, and vice versa for lower load current. The output-voltage trip point remains at ≈4.75 V, regardless of the load. Note that when VIN ≤ 1.3 V, the ERROR comparator output is turned off and pulled high to its pullup voltage. If VOUT is used as the pullup voltage, rather than an external 5-V source, ERROR typically is ≈1.2 V. In this condition, an equal resistor divider (10 kΩ is suitable) can be tied to ERROR to divide down the voltage to a valid logic low during any fault condition, while still enabling a logic high during normal operation. http://www.hgsemi.com.cn 15 2014 OCT LP2950/LP2951 APPLICATION INFORMATION (continued) Output Voltage 4.75 V ERROR 5V Input Voltage 1.3 V Figure 1. ERROR Output Timing Because the ERROR comparator has an open-collector output, an external pullup resistor is required to pull the output up to VOUT or another supply voltage (up to 30 V). The output of the comparator is rated to sink up to 400 µA. A suitable range of values for the pullup resistor is from 100 kΩ to 1 MΩ. If ERROR is not used, it can be left open. Programming Output Voltage (LP2951 Only) A unique feature of the LP2951 is its ability to output either a fixed voltage or an adjustable voltage, depending on the external pin connections. To output the internally programmed fixed voltage, tie the SENSE pin to the OUTPUT pin and the FEEDBACK pin to the VTAP pin. Alternatively, a user-programmable voltage ranging from the internal 1.235-V reference to a 30-V max can be set by using an external resistor divider pair. The resistor divider is tied to VOUT, and the divided-down voltage is tied directly to FEEDBACK for comparison against the internal 1.235-V reference. To satisfy the steady-state condition in which its two inputs are equal, the error amplifier drives the output to equal Equation 2: V OUT + V REF ǒ 1 ) R1 Ǔ*I R2 FB R1 (2) Where: VREF = 1.235 V applied across R2 IFB = FEEDBACK bias current, typically 20 nA A minimum regulator output current of 1 µA must be maintained. Thus, in an application where a no-load condition is expected (for example, CMOS circuits in standby), this 1-µA minimum current must be provided by the resistor pair, effectively imposing a maximum value of R2 = 1.2 MΩ (1.235 V/1.2 MΩ ≈ 1 µA). IFB = 20 nA introduces an error of ≈0.02% in VOUT. This can be offset by trimming R1. Alternatively, increasing the divider current makes IFB less significant, thus, reducing its error contribution. For instance, using R2 = 100 kΩ reduces the error contribution of IFB to 0.17% by increasing the divider current to ≈12 µA. This increase in the divider current still is small compared to the 600-µA typical quiescent current of the LP2951 under no load. http://www.hgsemi.com.cn 16 2014 OCT
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LP2951M-5.0/TR
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