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74AUP1T97UKAZ

74AUP1T97UKAZ

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    WLCSP6_0.65X0.44MM

  • 描述:

    电压电平 转换器 单向 1 电路 1 通道WLCSP6

  • 详情介绍
  • 数据手册
  • 价格&库存
74AUP1T97UKAZ 数据手册
74AUP1G97 Low-power configurable multiple function gate Rev. 10 — 28 March 2017 1 Product data sheet General description The 74AUP1G97 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G97 has Schmitt trigger inputs making it capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH. 2 Features and benefits • Wide supply voltage range from 0.8 V to 3.6 V • High noise immunity • ESD protection: – HBM JESD22-A114F exceeds 5000 V – MM JESD22-A115-A exceeds 200 V – CDM JESD22-C101E exceeds 1000 V • Low static power consumption; ICC = 0.9 μA (maximum) • Latch-up performance exceeds 100 mA per JESD 78 Class II • Inputs accept voltages up to 3.6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial power-down mode operation • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C 74AUP1G97 Nexperia Low-power configurable multiple function gate 3 Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G97GW -40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP1G97GM -40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 74AUP1G97GF -40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm SOT891 74AUP1G97GN -40 °C to +125 °C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm SOT1115 74AUP1G97GS -40 °C to +125 °C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm SOT1202 74AUP1G97GX -40 °C to +125 °C X2SON6 plastic thermal extremely thin small outline package; no leads; 6 terminals; body 1 x 0.8 x 0.35 mm SOT1255 74AUP1G97UK -40 °C to +125 °C WLCSP6 wafer level chip-scale package; 6 bumps; 0.65 x 0.44 x 0.27 mm SOT1454-1 4 Marking Table 2. Marking Type number Marking code 74AUP1G97GW aV 74AUP1G97GM aV 74AUP1G97GF aV 74AUP1G97GN aV 74AUP1G97GS aV 74AUP1G97GX aV 74AUP1G97UK 7 [1] [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 2 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 5 Functional diagram 3 A 4 Y 1 B 6 C 001aad998 Figure 1. Logic symbol 6 Pinning information 6.1 Pinning 74AUP1G97 74AUP1G97 B 1 6 C GND 2 5 VCC A 3 4 B 1 6 C GND 2 5 VCC A 3 4 Y Y 001aae000 Transparent top view 001aad999 Figure 2. Pin configuration SOT363 (SC-88) Figure 3. Pin configuration SOT886 (XSON6) 74AUP1G97 74AUP1G97 B 1 6 C GND 2 5 VCC A 3 4 Y B 1 GND 2 3 A 001aae001 Transparent top view Figure 4. Pin configuration SOT891, SOT1115 and SOT1202 (XSON6) 1 aaa-019827 74AUP1G97UK 2 1 2 A A B C B B GND VCC C C A Y aaa-026279 Transparent top view Transparent top view Figure 6. Pin configuration SOT1454-1 (WLCSP6) Product data sheet 4 Y Figure 5. Pin configuration SOT1255 (X2SON6) aaa-026278 74AUP1G97 VCC 5 Transparent top view 74AUP1G97UK ball A1 index area C 6 Figure 7. Ball mapping for SOT1454-1 (WLCSP6) All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 3 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 6.2 Pin description Table 3. Pin description Symbol Pin Description SC88, XSON6 and X2SON6 WLCSP6 B 1 A1 data input GND 2 B1 ground (0 V) A 3 C1 data input Y 4 C2 data output VCC 5 B2 supply voltage C 6 A2 data input 7 Logic configurations Table 4. Function selection table Logic function Figure 2-input MUX see Figure 8 2-input AND see Figure 9 2-input OR with one input inverted see Figure 10 2-input NAND with one input inverted see Figure 10 2-input AND with one input inverted see Figure 11 2-input NOR with one input inverted see Figure 11 2-input OR see Figure 12 Inverter see Figure 13 Buffer see Figure 14 VCC B A C Figure 8. 2-input MUX 74AUP1G97 Product data sheet B Y A 1 6 2 5 3 4 VCC C A C Y A Y 1 6 2 5 3 4 C Y 001aae003 001aae002 Figure 9. 2-input AND gate All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 4 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate VCC A C A C Y Y A 1 6 2 5 3 4 VCC C B C Y B C Y B Y 1 6 2 5 3 4 001aae004 C Y 001aae005 Figure 10. 2-input NAND gate with input A inverted or 2input OR gate with input C inverted Figure 11. 2-input NOR gate with input B inverted or 2input AND gate with input C inverted VCC VCC B B C Y 1 6 2 5 3 4 C C Y Y 1 6 2 5 3 4 C Y 001aae007 001aae006 Figure 12. 2-input OR gate Figure 13. Inverter VCC B B Y 1 6 2 5 3 4 Y 001aae008 Figure 14. Buffer 8 Functional description Table 5. Function table [1] Output Input C B A Y L L L L L L H L L H L H L H H H H L L L H L H H H H L L H H H H [1] H = HIGH voltage level; L = LOW voltage level. 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 5 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 9 Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current Conditions VI < 0 V [1] VI input voltage IOK output clamping current VO < 0 V [1] Min Max Unit -0.5 +4.6 V -50 - -0.5 +4.6 -50 - -0.5 +4.6 V - ±20 mA mA V mA VO output voltage Active mode and Power-down mode IO output current VO = 0 V to VCC ICC supply current - 50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C - 250 mW Ptot [1] [2] total power dissipation Tamb = -40 °C to +125 °C [2] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 package: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. For X2SON6 and XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K. For WLCSP6 package: above 102.5 °C the value of Ptot derates linearly with 5.3 mW/K. 10 Recommended operating conditions Table 7. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb Conditions Min Max 0.8 3.6 V 0 3.6 V Active mode 0 VCC V Power-down mode; VCC = 0 V 0 3.6 V -40 +125 °C ambient temperature 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 Unit © Nexperia B.V. 2017. All rights reserved. 6 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 11 Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.75VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.11 - - V IO = -1.9 mA; VCC = 1.65 V 1.32 - - V IO = -2.3 mA; VCC = 2.3 V 2.05 - - V IO = -3.1 mA; VCC = 2.3 V 1.9 - - V IO = -2.7 mA; VCC = 3.0 V 2.72 - - V IO = -4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V Tamb = 25 °C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VT+ or VT- VI = VT+ or VT- II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 40 μA CI input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 1.1 - pF CO output capacitance VO = GND; VCC = 0 V - 1.7 - pF VCC - 0.1 - - V 0.7VCC - - V [1] Tamb = -40 °C to +85 °C VOH HIGH-level output voltage VI = VT+ or VTIO = -20 μA; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 7 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate Symbol Parameter VOL LOW-level output voltage Conditions Min Typ Max Unit IO = -1.7 mA; VCC = 1.4 V 1.03 - - V IO = -1.9 mA; VCC = 1.65 V 1.30 - - V IO = -2.3 mA; VCC = 2.3 V 1.97 - - V IO = -3.1 mA; VCC = 2.3 V 1.85 - - V IO = -2.7 mA; VCC = 3.0 V 2.67 - - V IO = -4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.37 V IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V VI = VT+ or VT- II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.6 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 50 μA VCC - 0.11 - - V IO = -1.1 mA; VCC = 1.1 V 0.6VCC - - V IO = -1.7 mA; VCC = 1.4 V 0.93 - - V IO = -1.9 mA; VCC = 1.65 V 1.17 - - V IO = -2.3 mA; VCC = 2.3 V 1.77 - - V IO = -3.1 mA; VCC = 2.3 V 1.67 - - V IO = -2.7 mA; VCC = 3.0 V 2.40 - - V IO = -4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - 0.33VCC V [1] Tamb = -40 °C to +125 °C VOH VOL HIGH-level output voltage LOW-level output voltage 74AUP1G97 Product data sheet VI = VT+ or VTIO = -20 μA; VCC = 0.8 V to 3.6 V VI = VT+ or VT- All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 8 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate Symbol Parameter Conditions Min Typ Max Unit IO = 1.7 mA; VCC = 1.4 V - - 0.41 V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V IO = 4.0 mA; VCC = 3.0 V - - 0.50 V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 75 μA [1] [1] One input at VCC - 0.6 V, other input at VCC or GND. 12 Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 16. Symbol Parameter Conditions 25 °C Min Typ [1] -40 °C to +125 °C Max Min Unit Max Max (85 °C) (125 °C) CL = 5 pF tpd propagation delay A, B, C to Y; see Figure 15 [2] VCC = 0.8 V - 23.0 - - - - ns VCC = 1.1 V to 1.3 V 2.8 6.6 12.6 2.5 13.0 13.2 ns VCC = 1.4 V to 1.6 V 2.3 4.7 7.6 2.5 8.2 8.6 ns VCC = 1.65 V to 1.95 V 2.2 3.9 6.2 2.0 6.8 7.2 ns VCC = 2.3 V to 2.7 V 2.0 3.2 4.5 1.7 5.1 5.3 ns VCC = 3.0 V to 3.6 V 1.9 2.9 3.9 1.5 4.1 4.3 ns - 26.6 - - - - ns VCC = 1.1 V to 1.3 V 3.2 7.4 14.3 2.9 14.9 15.2 ns VCC = 1.4 V to 1.6 V 2.6 5.3 8.7 2.8 9.4 9.8 ns VCC = 1.65 V to 1.95 V 2.5 4.5 7.0 2.3 7.8 8.2 ns CL = 10 pF tpd propagation delay A, B, C to Y; see Figure 15 VCC = 0.8 V 74AUP1G97 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 9 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate Symbol Parameter Conditions 25 °C Min Typ VCC = 2.3 V to 2.7 V 2.4 VCC = 3.0 V to 3.6 V [1] -40 °C to +125 °C Unit Max Min Max Max (85 °C) (125 °C) 3.7 5.2 2.1 5.9 6.1 ns 2.3 3.4 4.6 1.9 4.9 5.1 ns - 30.1 - - - - ns VCC = 1.1 V to 1.3 V 3.6 8.2 16.0 3.2 16.7 17.0 ns VCC = 1.4 V to 1.6 V 2.9 5.9 9.6 3.1 10.4 10.9 ns VCC = 1.65 V to 1.95 V 2.8 5.0 7.8 2.5 8.7 9.1 ns VCC = 2.3 V to 2.7 V 2.7 4.2 5.8 2.4 6.5 6.9 ns VCC = 3.0 V to 3.6 V 2.5 3.8 5.1 2.2 5.5 5.7 ns - 38.3 - - - - ns VCC = 1.1 V to 1.3 V 4.6 10.5 20.9 4.0 21.8 22.2 ns VCC = 1.4 V to 1.6 V 3.7 7.4 12.2 3.8 13.3 14.0 ns VCC = 1.65 V to 1.95 V 3.5 6.3 9.9 3.2 11.1 11.8 ns VCC = 2.3 V to 2.7 V 3.4 5.3 7.4 3.1 8.3 8.8 ns VCC = 3.0 V to 3.6 V 3.2 4.9 6.6 2.8 7.0 7.4 ns VCC = 0.8 V - 2.6 - - - - pF VCC = 1.1 V to 1.3 V - 2.8 - - - - pF VCC = 1.4 V to 1.6 V - 2.9 - - - - pF VCC = 1.65 V to 1.95 V - 3.1 - - - - pF VCC = 2.3 V to 2.7 V - 3.7 - - - - pF VCC = 3.0 V to 3.6 V - 4.3 - - - - pF CL = 15 pF tpd propagation delay A, B, C to Y; see Figure 15 [2] VCC = 0.8 V CL = 30 pF tpd propagation delay A, B, C to Y; see Figure 15 [2] VCC = 0.8 V CL = 5 pF, 10 pF, 15 pF and 30 pF CPD [1] [2] [3] power dissipation capacitance fi = 1 MHz; VI = GND to VCC [3] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + ∑(CL x VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of outputs. 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 10 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 12.1 Waveforms and test circuit VI A, B, C input VM VM GND t PHL t PLH VOH VM Y output VM VOL t PLH t PHL VOH Y output VM VM VOL 001aab593 Measurement points are given in Table 10. VOL and VOH are typical output voltage levels that occur with the output load. Figure 15. Input A, B and C to output Y propagation delay times Table 10. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5VCC 0.5VCC VCC ≤ 3.0 ns 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 11 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate VCC G VI DUT VEXT 5 kΩ VO RT CL RL 001aac521 Test data is given inTable 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Figure 16. Test circuit for measuring switching times Table 11. Test data Supply voltage Load VEXT VCC CL 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ [1] RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ open GND 2VCC For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 12 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 12.2 Transfer characteristics Table 12. Transfer characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 16. Symbol Parameter VT+ positive-going threshold voltage VT- negative-going threshold voltage VH hysteresis voltage 74AUP1G97 Product data sheet Conditions 25 °C -40 °C to +125 °C Unit Min Typ Max Min Max Max (85 °C) (125 °C) VCC = 0.8 V 0.30 - 0.60 0.30 0.60 0.62 V VCC = 1.1 V 0.53 - 0.90 0.53 0.90 0.92 V VCC = 1.4 V 0.74 - 1.11 0.74 1.11 1.13 V VCC = 1.65 V 0.91 - 1.29 0.91 1.29 1.31 V VCC = 2.3 V 1.37 - 1.77 1.37 1.77 1.80 V VCC = 3.0 V 1.88 - 2.29 1.88 2.29 2.32 V VCC = 0.8 V 0.10 - 0.60 0.10 0.60 0.60 V VCC = 1.1 V 0.26 - 0.65 0.26 0.65 0.65 V VCC = 1.4 V 0.39 - 0.75 0.39 0.75 0.75 V VCC = 1.65 V 0.47 - 0.84 0.47 0.84 0.84 V VCC = 2.3 V 0.69 - 1.04 0.69 1.04 1.04 V VCC = 3.0 V 0.88 - 1.24 0.88 1.24 1.24 V VCC = 0.8 V 0.07 - 0.50 0.07 0.50 0.50 V VCC = 1.1 V 0.08 - 0.46 0.08 0.46 0.46 V VCC = 1.4 V 0.18 - 0.56 0.18 0.56 0.56 V VCC = 1.65 V 0.27 - 0.66 0.27 0.66 0.66 V VCC = 2.3 V 0.53 - 0.92 0.53 0.92 0.92 V VCC = 3.0 V 0.79 - 1.31 0.79 1.31 1.31 V see Figure 17 and Figure 18 see Figure 17 and Figure 18 (VT+ - VT-); see Figure 17 and Figure 18, Figure 19 and Figure 20 All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 13 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 12.3 Waveforms transfer characteristics VO VI VT+ mna208 VT+ and VT- limits at 70 % and 20 %. mna207 Figure 18. Definition of VT+, VT- and VH Figure 17. Transfer characteristic 001aad691 240 VH VT- VO VI VH VT- VT+ ICC (µA) 001aad692 1200 ICC (µA) 160 800 80 400 0 0 0.4 0.8 1.2 1.6 VI (V) 2.0 Figure 19. Typical transfer characteristics; VCC = 1.8 V 74AUP1G97 Product data sheet 0 0 1.0 2.0 VI (V) 3.0 Figure 20. Typical transfer characteristics; VCC = 3.0 V All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 14 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 13 Package outline Plastic surface-mounted package; 6 leads SOT363 D B E y A X HE 6 5 v M A 4 Q pin 1 index A 1 2 e1 A1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT363 JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Figure 21. Package outline SOT363 (SC-88) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 15 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate SOT886 XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm b 1 2 3 4x (2) L L1 e 6 5 e1 4 e1 6x A (2) A1 D E terminal 1 index area 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit mm max nom min A(1) 0.5 A1 b D E 0.04 0.25 1.50 1.05 0.20 1.45 1.00 0.17 1.40 0.95 e e1 0.6 0.5 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. Outline version SOT886 sot886_po References IEC JEDEC JEITA European projection Issue date 04-07-22 12-01-05 MO-252 Figure 22. Package outline SOT886 (XSON6) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 16 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 4 e1 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15 SOT891 Figure 23. Package outline SOT891 (XSON6) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 17 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm 1 SOT1115 b 3 2 (4×)(2) L L1 e 6 5 4 e1 e1 (6×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 max 0.35 0.04 0.20 0.95 1.05 nom 0.15 0.90 1.00 0.55 min 0.12 0.85 0.95 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1115_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-07 SOT1115 Figure 24. Package outline SOT1115 (XSON6) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 18 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm 1 SOT1202 b 3 2 (4×)(2) L L1 e 6 5 4 e1 e1 (6×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.05 1.05 0.35 0.40 nom 0.15 1.00 1.00 0.55 0.35 0.30 0.35 min 0.12 0.95 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1202_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-06 SOT1202 Figure 25. Package outline SOT1202 (XSON6) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 19 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate X2SON6: plastic thermal enhanced extremely thin small outline package; no leads; 6 terminals; body 1.0 x 0.8 x 0.35 mm SOT1255 X A D B A pin 1 ID area E A1 detail X C e1 b (4x) 4 3 y1 C A B v y L (4x) 2 5 Dh (2x) 1 6 e2 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A A1 D Dh E e1 e2 b L v y y1 max 0.35 0.04 1.05 0.30 0.85 0.30 0.25 nom 0.32 0.02 1.00 0.25 0.80 0.60 0.40 0.25 0.20 0.10 0.05 0.05 0.22 0.17 min 0.30 0.00 0.95 0.22 0.75 sot1255_po Outline version References IEC JEDEC JEITA European projection Issue date 15-07-20 15-07-22 SOT1255 Figure 26. Package outline SOT1255 (X2SON6) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 20 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate WLCSP6: wafer level chip-scale package, 6 bumps; 0.65 x 0.44 x 0.27 mm A E SOT1454-1 B ball A1 index area A2 A D A1 detail X e1 C Øv Øw b C A B C y1 C y C e e2 B A 1 ball A1 index area 2 X 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A max 0.30 nom 0.27 min 0.24 A1 A2 b D E e e1 e2 v w y y1 0.085 0.070 0.055 0.22 0.20 0.18 0.100 0.085 0.070 0.68 0.65 0.62 0.47 0.44 0.41 0.22 0.23 0.44 0.15 0.05 0.05 0.1 sot1454-1_po Outline version SOT1454-1 References IEC JEDEC JEITA European projection Issue date 15-11-16 14-12-16 --- Figure 27. Package outline SOT1454-1 (WLCSP6) 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 21 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 14 Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP1G97 v.10 20170328 Product data sheet - 74AUP1G97 v.9 Modifications: • Added type number 74AUP1G97UK (SOT1454-1/WLCSP6). 74AUP1G97 v.9 20150917 Modifications: • Added type number 74AUP1G97GX (SOT1255/X2SON6). 74AUP1G97 v.8 20120815 Modifications: • Package outline drawing of SOT886 (Figure 22) modified. 74AUP1G97 v.7 20111128 Product data sheet - 74AUP1G97 v.6 74AUP1G97 v.6 20110110 Product data sheet - 74AUP1G97 v.5 74AUP1G97 v.5 20101020 Product data sheet - 74AUP1G97 v.4 74AUP1G97 v.4 20090623 Product data sheet - 74AUP1G97 v.3 74AUP1G97 v.3 20090518 Product data sheet - 74AUP1G97 v.2 74AUP1G97 v.2 20090327 Product data sheet - 74AUP1G97 v.1 74AUP1G97 v.1 20061107 Product data sheet - - Product data sheet Product data sheet - 74AUP1G97 v.8 74AUP1G97 v.7 14.1 Abbreviations Table 14. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 74AUP1G97 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 22 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate 15 Legal information 15.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia's aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical 74AUP1G97 Product data sheet systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 23 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer 74AUP1G97 Product data sheet design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 10 — 28 March 2017 © Nexperia B.V. 2017. All rights reserved. 24 / 25 74AUP1G97 Nexperia Low-power configurable multiple function gate Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 12.1 12.2 12.3 13 14 14.1 15 General description ............................................ 1 Features and benefits .........................................1 Ordering information .......................................... 2 Marking .................................................................2 Functional diagram ............................................. 3 Pinning information ............................................ 3 Pinning ............................................................... 3 Pin description ................................................... 4 Logic configurations ...........................................4 Functional description ........................................5 Limiting values .................................................... 6 Recommended operating conditions ................ 6 Static characteristics .......................................... 7 Dynamic characteristics .....................................9 Waveforms and test circuit .............................. 11 Transfer characteristics ................................... 13 Waveforms transfer characteristics ..................14 Package outline .................................................15 Revision history ................................................ 22 Abbreviations ................................................... 22 Legal information .............................................. 23 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © Nexperia B.V. 2017. All rights reserved. For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 28 March 2017 Document identifier: 74AUP1G97 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74AUP1G97GF,132 74AUP1G97GM,115 74AUP1G97GM,132 74AUP1G97GW,125 74AUP1G97GN,132 74AUP1G97GS,132 74AUP1G97GXZ 74AUP1G97UKAZ
74AUP1T97UKAZ
1. 物料型号:74AUP1G97

2. 器件简介:74AUP1G97是一款高速CMOS双路四总线缓冲器/线驱动器,具有3.3V供电电压和低功耗特性,适用于高速数据传输和低功耗应用。

3. 引脚分配:该器件共有24个引脚,包括供电引脚、地引脚、输入/输出引脚和使能引脚。

4. 参数特性:工作电压范围为1.65V至3.6V,工作温度范围为-40°C至+125°C,典型功耗为2.5mW。

5. 功能详解:74AUP1G97具有双路缓冲/线驱动功能,可以用于扩展数据总线,提高信号完整性。

6. 应用信息:适用于高速数据通信、低功耗系统、工业控制等领域。

7. 封装信息:该器件采用QFN24封装,尺寸为4mm x 4mm。
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