74AVC20T245DGG-Q1J

74AVC20T245-Q100 20-bit dual supply translating transceiver with configurable voltage translation; 3-state Rev. 2 — 14 January 2019 Product data sheet 1. General description The 74AVC20T245-Q100 is a 20-bit, dual supply transceiver that enables bi-directional voltage level translation. The device can be used as two 10-bit transceivers or as a single 20-bit transceiver. It features four 10-bit input-output ports (1An, 1Bn and 2An, 2Bn), two output enable inputs (nOE), two direction inputs (nDIR) and dual supplies (VCC(A) and VCC(B)). VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for bi-directional voltage level translation between any of the low voltage nodes: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The 1An and 2An ports, nOE and nDIR are referenced to VCC(A), the 1Bn and 2Bn ports are referenced to VCC(B). A HIGH on a 1DIR allows transmission from 1An to 1Bn and a LOW on 1DIR allows transmission from 1Bn to 1An. A HIGH on nOE causes the outputs to assume a HIGH impedance OFF-state. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, all output ports will assume a high impedance OFF-state. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range: • VCC(A): 0.8 V to 3.6; VCC(B): 0.8 V to 3.6 V Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) ESD protection: • MIL-STD-883, method 3015 Class 3B exceeds 8000 V • HBM JESD22-A114F Class 3B exceeds 8000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) Maximum data rates: • 380 Mbit/s (≥ 1.8 V to 3.3 V translation) • 260 Mbit/s (≥ 1.1 V to 3.3 V translation) • 260 Mbit/s (≥ 1.1 V to 2.5 V translation) • 210 Mbit/s (≥ 1.1 V to 1.8 V translation) • 120 Mbit/s (≥ 1.1 V to 1.5 V translation) • 100 Mbit/s (≥ 1.1 V to 1.2 V translation) Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V IOFF circuitry provides partial Power-down mode operation 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 3. Ordering information Table 1. Ordering information Type number Package 74AVC20T245DGG-Q100 Temperature range Name Description Version -40 °C to +125 °C plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 TSSOP56 4. Functional diagram 1DIR 2DIR 1OE 1A1 2OE 2A1 1B1 VCC(A) VCC(B) 2B1 VCC(A) to other nine channels Fig. 1. VCC(B) to other nine channels 001aal240 Logic diagram 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 2 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 2 3 1B1 VCC(A) 56 1 1B2 1B4 9 1B5 10 1B6 12 1B7 13 1B8 14 1B9 1B10 1DIR 1A2 1A4 52 16 2B1 VCC(A) 1A3 54 15 51 17 2B2 1A5 49 19 2B3 1A6 48 20 2B4 1A7 47 21 2B5 1A8 45 23 2B6 1A9 44 43 24 2B7 1A10 26 2B8 27 2B9 2B10 VCC(B) 2OE 2DIR 2A1 42 Fig. 2. 1B3 8 1OE 55 28 6 VCC(B) 1A1 29 5 2A2 41 2A3 40 2A4 38 2A5 37 2A6 36 2A7 34 2A8 33 2A9 31 2A10 30 001aal239 Logic symbol 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 3 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 5. Pinning information 5.1. Pinning 74AVC20T245 1DIR 1 56 1OE 1B1 2 55 1A1 1B2 3 54 1A2 GND 4 53 GND 1B3 5 52 1A3 1B4 6 51 1A4 VCC(B) 7 1B5 8 50 VCC(A) 49 1A5 1B6 9 48 1A6 1B7 10 47 1A7 GND 11 46 GND 1B8 12 45 1A8 1B9 13 44 1A9 1B10 14 43 1A10 2B1 15 42 2A1 2B2 16 41 2A2 2B3 17 40 2A3 GND 18 39 GND 2B4 19 38 2A4 2B5 20 37 2A5 2B6 21 36 2A6 VCC(B) 22 2B7 23 35 VCC(A) 34 2A7 2B8 24 33 2A8 GND 25 32 GND 2B9 26 31 2A9 2B10 27 30 2A10 2DIR 28 29 2OE 001aal241 Fig. 3. Pin configuration SOT364-1 (TSSOP56) 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 4 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 5.2. Pin description Table 2. Pin description Symbol Pin Description 1DIR, 2DIR direction control 1, 28 1B1 to 1B10 2, 3, 5, 6, 8, 9, 10, 12, 13, 14 data input or output 2B1 to 2B10 15, 16, 17, 19, 20, 21, 23, 24,26, 27 data input or output GND[1] 4, 11, 18, 25, 32, 39, 46, 53 ground (0 V) VCC(B) 7, 22 supply voltage B (nBn inputs are referenced to VCC(B)) 1OE, 2OE 56, 29 output enable input (active LOW) 1A1 to 1A10 55, 54, 52, 51, 49, 48, 47, 45,44, 43 data input or output 2A1 to 2A10 42, 41, 40, 38, 37, 36, 34, 33,31, 30 data input or output VCC(A) supply voltage A (nAn, nOE and nDIR inputs are referenced to VCC(A)) [1] 35, 50 All GND pins must be connected to ground (0 V). 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Supply voltage Input VCC(A), VCC(B) nOE[2] nDIR[2] nAn[2] nBn[2] 0.8 V to 3.6 V L L nAn = nBn input 0.8 V to 3.6 V L H input nBn = nAn 0.8 V to 3.6 V H X Z Z GND[1] X X Z Z [1] [2] Input/output[1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. The nAn, nDIR and nOE input circuit is referenced to VCC(A); The nBn input circuit is referenced to VCC(B). 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 5 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC(A) Conditions Min Max Unit supply voltage A -0.5 +4.6 V VCC(B) supply voltage B -0.5 +4.6 V IIK input clamping current VI input voltage IOK output clamping current VO < 0 V VO output voltage Active mode VI < 0 V [1] -50 - -0.5 +4.6 -50 - [1][2][3] -0.5 Suspend or 3-state mode [1] -0.5 [2] mA V mA VCCO + 0.5 V +4.6 V - ±50 mA - 100 mA IO output current VO = 0 V to VCCO ICC supply current ICC(A) or ICC(B) IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 600 mW [1] [2] [3] [4] Tamb = -40 °C to +125 °C [4] The minimum input and minimum output voltage ratings may be exceeded if the input and output clamping current ratings are observed. VCCO is the supply voltage associated with the output port. VCCO + 0.5 V should not exceed 4.6 V. Above 55 °C the value of Ptot derates linearly with 8.0 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC(A) supply voltage A 0.8 3.6 V VCC(B) supply voltage B 0.8 3.6 V VI input voltage 0 3.6 V VO output voltage 0 VCCO V 0 3.6 V -40 +125 °C - 5 Active mode [1] Suspend or 3-state mode Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] [2] VCCI = 0.8 V to 3.6 V [2] ns/V VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the input port. 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 6 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 9. Static characteristics Table 6. Typical static characteristics at Tamb = 25 °C At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1][2] Symbol Parameter Conditions VOH VI = VIH or VIL HIGH-level output voltage IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V VOL LOW-level output voltage Min Typ Max Unit - 0.69 - V - 0.07 - V VI = VIH or VIL IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V II input leakage current nDIR, nOE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V [3] - ±0.5 ±2.5 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [3] - ±0.5 ±2.5 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [3] - ±0.5 ±2.5 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V - ±0.1 ±1 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V - ±0.1 ±1 μA IOFF power-off leakage current - ±0.025 ±0.25 μA CI input capacitance nDIR, nOE input; VI = 0 V or 3.3 V; VCC(A) = VCC(B) = 3.3 V - 2.0 - pF CI/O input/output capacitance A and B port; VO = 3.3 V or 0 V; VCC(A) = VCC(B) = 3.3 V - 4.0 - pF [1] [2] [3] VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the data input port. For I/O ports, the parameter IOZ includes the input leakage current. Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1][2] Symbol Parameter VIH HIGH-level input voltage Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCCI = 0.8 V 0.70VCCI - 0.70VCCI - V VCCI = 1.1 V to 1.95 V 0.65VCCI - 0.65VCCI - V VCCI = 2.3 V to 2.7 V 1.6 - 1.6 - V VCCI = 3.0 V to 3.6 V 2 - 2 - V VCC(A) = 0.8 V 0.70VCC(A) - 0.70VCC(A) - V VCC(A) = 1.1 V to 1.95 V 0.65VCC(A) - 0.65VCC(A) - V VCC(A) = 2.3 V to 2.7 V 1.6 - 1.6 - V VCC(A) = 3.0 V to 3.6 V 2 - 2 - V data input nDIR, nOE input 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 7 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state Symbol Parameter VIL LOW-level input voltage Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCCI = 0.8 V - 0.30VCCI - 0.30VCCI V VCCI = 1.1 V to 1.95 V - 0.35VCCI - 0.35VCCI V VCCI = 2.3 V to 2.7 V - 0.7 - 0.7 V VCCI = 3.0 V to 3.6 V - 0.8 - 0.8 V VCC(A) = 0.8 V - 0.30VCC(A) - 0.30VCC(A) V VCC(A) = 1.1 V to 1.95 V - 0.35VCC(A) - 0.35VCC(A) V VCC(A) = 2.3 V to 2.7 V - 0.7 - 0.7 V VCC(A) = 3.0 V to 3.6 V - 0.8 - 0.8 V VCCO - 0.1 - VCCO - 0.1 - V IO = -3 mA; VCC(A) = VCC(B) = 1.1 V 0.85 - 0.85 - V IO = -6 mA; VCC(A) = VCC(B) = 1.4 V 1.05 - 1.05 - V IO = -8 mA; VCC(A) = VCC(B) = 1.65 V 1.2 - 1.2 - V IO = -9 mA; VCC(A) = VCC(B) = 2.3 V 1.75 - 1.75 - V IO = -12 mA; VCC(A) = VCC(B) = 3.0 V 2.3 - 2.3 - V - 0.1 - 0.1 V IO = 3 mA; VCC(A) = VCC(B) = 1.1 V - 0.25 - 0.25 V IO = 6 mA; VCC(A) = VCC(B) = 1.4 V - 0.35 - 0.35 V IO = 8 mA; VCC(A) = VCC(B) = 1.65 V - 0.45 - 0.45 V IO = 9 mA; VCC(A) = VCC(B) = 2.3 V - 0.55 - 0.55 V IO = 12 mA; VCC(A) = VCC(B) = 3.0 V - 0.7 - 0.7 V - ±1 - ±5 μA data input nDIR, nOE input VOH VOL VI = VIH or VIL HIGH-level output voltage IO = -100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V VI = VIH or VIL LOW-level output voltage IO = 100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V II input leakage current nDIR, nOE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V [3] - ±5 - ±30 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [3] - ±5 - ±30 μA suspend mode B port;VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [3] - ±5 - ±30 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V - ±5 - ±30 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V - ±5 - ±30 μA IOFF power-off leakage current 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 8 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 45 - 190 μA VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 35 - 140 μA VCC(A) = 3.6 V; VCC(B) = 0 V - 35 - 140 μA VCC(A) = 0 V; VCC(B) = 3.6 V -5 - -20 - μA VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 45 - 190 μA VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 35 - 140 μA VCC(A) = 3.6 V; VCC(B) = 0 V -5 - -20 - μA VCC(A) = 0 V; VCC(B) = 3.6 V - 35 - 140 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 80 - 270 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 65 - 220 μA supply current A port; VI = 0 V or VCCI; IO = 0 A ICC B port; VI = 0 V or VCCI; IO = 0 A [1] [2] [3] VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the data input port. For I/O ports, the parameter IOZ includes the input leakage current. Table 8. Typicaltotal supply current (ICC(A) + ICC(B)) VCC(A) VCC(B) Unit 0V 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 0.1 0.1 0.1 0.1 0.1 0.1 μA 0.8 V 0.1 0.1 0.1 0.1 0.1 0.3 1.6 μA 1.2 V 0.1 0.1 0.1 0.1 0.1 0.1 0.8 μA 1.5 V 0.1 0.1 0.1 0.1 0.1 0.1 0.4 μA 1.8 V 0.1 0.1 0.1 0.1 0.1 0.1 0.2 μA 2.5 V 0.1 0.3 0.1 0.1 0.1 0.1 0.1 μA 3.3 V 0.1 1.6 0.8 0.4 0.2 0.1 0.1 μA 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 9 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 10. Dynamic characteristics Table 9. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V).[1][2] Symbol Parameter CPD [1] [2] Conditions VCC(A) = VCC(B) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V power dissipation A port: (direction A to B); output enabled capacitance A port: (direction A to B); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pF 0.2 0.2 0.2 0.2 0.3 0.4 pF A port: (direction B to A); output enabled 9.5 9.7 9.8 9.9 10.7 11.9 pF A port: (direction B to A); output disabled 0.6 0.6 0.6 0.6 0.7 0.7 B port: (direction A to B); output enabled 9.5 9.7 9.8 9.9 10.7 11.9 pF B port: (direction A to B); output disabled 0.6 0.6 0.6 0.6 0.7 0.7 pF B port: (direction B to A); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pF B port: (direction B to A); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pF pF CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω. Table 10. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5.[1] Symbol Parameter tpd tdis ten [1] Conditions VCC(B) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V propagation delay nAn to nBn 14.4 7.0 6.2 6.0 5.9 6.0 ns nBn to nAn 14.4 12.4 12.1 11.9 11.8 11.8 ns nOE to nAn 16.2 16.2 16.2 16.2 16.2 16.2 ns nOE to nBn 17.6 10.0 9.0 9.1 8.7 9.3 ns nOE to nAn 21.9 21.9 21.9 21.9 21.9 21.9 ns nOE to nBn 22.2 11.1 9.8 9.4 9.4 9.6 ns disable time enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Table 11. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5[1] Symbol Parameter tpd tdis ten [1] Conditions VCC(A) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V propagation delay nAn to nBn 14.4 12.4 12.1 11.9 11.8 11.8 ns nBn to nAn 14.4 7.0 6.2 6.0 5.9 6.0 ns nOE to nAn 16.2 5.9 4.4 4.2 3.1 3.5 ns nOE to nBn 17.6 14.2 13.7 13.6 13.3 13.1 ns nOE to nAn 21.9 6.4 4.4 3.5 2.6 2.3 ns nOE to nBn 22.2 17.7 17.2 17.0 16.8 16.7 ns disable time enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 10 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state Table 12. Dynamic characteristics for temperature range -40 °C to +85 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5.[1] Symbol Parameter Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.1 V to 1.3 V tpd tdis ten propagation delay nAn to nBn 0.5 9.4 0.5 7.1 0.5 6.2 0.5 5.2 0.5 5.1 ns nBn to nAn 0.5 9.4 0.5 8.9 0.5 8.7 0.5 8.4 0.5 8.2 ns disable time nOE to nAn 2.0 11.9 2.0 11.9 2.0 11.9 2.0 11.9 2.0 11.9 ns nOE to nBn 1.5 12.7 1.5 9.8 1.5 9.6 1.0 8.1 1.0 9.0 ns nOE to nAn 1.5 15.3 1.5 15.3 1.5 15.3 1.5 15.3 1.5 15.3 ns nOE to nBn 1.0 15.6 1.0 11.5 1.0 10.0 0.5 8.4 0.5 8.0 ns propagation delay nAn to nBn 0.5 8.9 0.5 6.4 0.5 5.4 0.5 4.3 0.5 3.9 ns nBn to nAn 0.5 7.1 0.5 6.4 0.5 6.1 0.5 5.8 0.5 5.7 ns disable time nOE to nAn 2.0 9.0 2.0 9.0 2.0 9.0 2.0 9.0 2.0 9.0 ns nOE to nBn 1.5 11.7 1.5 9.0 1.5 7.8 1.0 6.4 1.0 6.0 ns nOE to nAn 1.5 10.3 1.5 10.3 1.5 10.3 1.5 10.2 1.5 10.2 ns nOE to nBn 1.0 14.3 1.0 10.3 1.0 8.4 0.5 6.1 0.5 5.3 ns enable time VCC(A) = 1.4 V to 1.6 V tpd tdis ten enable time VCC(A) = 1.65 V to 1.95 V propagation delay nAn to nBn 0.5 8.7 0.5 6.1 0.5 5.0 0.5 3.9 0.5 3.5 ns nBn to nAn 0.5 6.2 0.5 5.4 0.5 5.0 0.5 4.7 0.5 4.6 ns tdis disable time nOE to nAn 2.0 7.4 2.0 7.4 2.0 7.4 2.0 7.4 2.0 7.4 ns nOE to nBn 1.5 11.3 1.5 8.7 1.5 7.4 1.0 5.8 1.0 5.6 ns ten enable time nOE to nAn 1.0 8.1 1.0 8.1 1.0 7.9 1.0 7.9 1.0 7.9 ns nOE to nBn 0.5 13.8 0.5 10.0 0.5 7.9 0.5 5.7 0.5 4.8 ns tpd VCC(A) = 2.3 V to 2.7 V tpd propagation delay nAn to nBn 0.5 8.4 0.5 5.8 0.5 4.7 0.5 3.5 0.5 3.0 ns nBn to nAn 0.5 5.2 0.5 4.3 0.5 3.9 0.5 3.5 0.5 3.4 ns tdis disable time nOE to nAn 1.1 5.2 1.1 5.2 1.1 5.2 1.1 5.2 1.1 5.2 ns nOE to nBn 1.2 10.8 1.2 8.2 1.2 6.9 1.0 5.3 1.0 5.2 ns nOE to nAn 0.5 5.4 0.5 5.4 0.5 5.3 0.5 5.2 0.5 5.2 ns nOE to nBn 0.5 13.3 0.5 9.6 0.5 7.6 0.5 5.3 0.5 4.3 ns propagation delay nAn to nBn 0.5 8.2 0.5 5.7 0.5 4.6 0.5 3.4 0.5 2.9 ns nBn to nAn 0.5 5.1 0.5 3.9 0.5 3.5 0.5 3.0 0.5 2.9 ns disable time nOE to nAn 0.8 5.0 0.8 5.0 0.8 5.0 0.8 5.0 0.8 5.0 ns nOE to nBn 1.2 10.5 1.2 8.1 1.2 6.7 1.0 5.1 0.8 5.0 ns nOE to nAn 0.5 4.4 0.5 4.4 0.5 4.3 0.5 4.2 0.5 4.1 ns nOE to nBn 1.0 13.1 1.0 9.6 0.5 7.5 0.5 5.1 0.5 4.1 ns ten enable time VCC(A) = 3.0 V to 3.6 V tpd tdis ten [1] enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 11 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state Table 13. Dynamic characteristics for temperature range -40 °C to +125 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5[1] Symbol Parameter Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.1 V to 1.3 V tpd tdis ten propagation delay nAn to nBn 0.5 10.4 0.5 7.9 0.5 6.9 0.5 5.8 0.5 5.7 ns nBn to nAn 0.5 10.4 0.5 9.8 0.5 9.6 0.5 9.3 0.5 9.1 ns disable time nOE to nAn 2.0 13.1 2.0 13.1 2.0 13.1 2.0 13.1 2.0 13.1 ns nOE to nBn 1.5 14.0 1.5 10.8 1.5 10.6 1.0 9.0 1.0 9.9 ns nOE to nAn 1.5 16.9 1.5 16.9 1.5 16.9 1.5 16.9 1.5 16.9 ns nOE to nBn 1.0 17.2 1.0 12.7 1.0 11.0 0.5 9.3 0.5 8.8 ns propagation delay nAn to nBn 0.5 9.8 0.5 7.1 0.5 6.0 0.5 4.8 0.5 4.3 ns nBn to nAn 0.5 7.9 0.5 7.1 0.5 6.8 0.5 6.4 0.5 6.3 ns disable time nOE to nAn 2.0 9.9 2.0 9.9 2.0 9.9 2.0 9.9 2.0 9.9 ns nOE to nBn 1.5 12.9 1.5 9.9 1.5 8.6 1.0 7.1 1.0 6.6 ns nOE to nAn 1.5 11.4 1.5 11.4 1.5 11.4 1.5 11.3 1.5 11.3 ns nOE to nBn 1.0 15.8 1.0 11.4 1.0 9.3 0.5 6.8 0.5 5.9 ns enable time VCC(A) = 1.4 V to 1.6 V tpd tdis ten enable time VCC(A) = 1.65 V to 1.95 V propagation delay nAn to nBn 0.5 9.6 0.5 6.8 0.5 5.5 0.5 4.3 0.5 3.9 ns nBn to nAn 0.5 6.9 0.5 6.0 0.5 5.5 0.5 5.2 0.5 5.1 ns tdis disable time nOE to nAn 2.0 8.2 2.0 8.2 2.0 8.2 2.0 8.2 2.0 8.2 ns nOE to nBn 1.5 12.5 1.5 9.6 1.5 8.2 1.0 6.4 1.0 6.2 ns ten enable time nOE to nAn 1.0 9.0 1.0 9.0 1.0 8.7 1.0 8.7 1.0 8.7 ns nOE to nBn 0.5 15.2 0.5 11.0 0.5 8.7 0.5 6.3 0.5 5.3 ns tpd VCC(A) = 2.3 V to 2.7 V tpd propagation delay nAn to nBn 0.5 9.3 0.5 6.4 0.5 5.2 0.5 3.9 0.5 3.3 ns nBn to nAn 0.5 5.8 0.5 4.8 0.5 4.3 0.5 3.9 0.5 3.8 ns tdis disable time nOE to nAn 1.1 5.8 1.1 5.8 1.1 5.8 1.1 5.8 1.1 5.8 ns nOE to nBn 1.2 11.9 1.2 9.1 1.2 7.6 1.0 5.9 1.0 5.8 ns nOE to nAn 0.5 6.0 0.5 6.0 0.5 5.9 0.5 5.8 0.5 5.8 ns nOE to nBn 0.5 14.7 0.5 10.6 0.5 8.4 0.5 5.9 0.5 4.8 ns propagation delay nAn to nBn 0.5 9.1 0.5 6.3 0.5 5.1 0.5 3.8 0.5 3.2 ns nBn to nAn 0.5 5.7 0.5 4.3 0.5 3.9 0.5 3.3 0.5 3.2 ns disable time nOE to nAn 0.8 5.5 0.8 5.5 0.8 5.5 0.8 5.5 0.8 5.5 ns nOE to nBn 1.2 11.6 1.2 9.0 1.2 7.4 1.0 5.7 0.8 5.5 ns nOE to nAn 0.5 4.9 0.5 4.9 0.5 4.8 0.5 4.7 0.5 4.6 ns nOE to nBn 1.0 14.5 1.0 10.6 0.5 8.3 0.5 5.7 0.5 4.6 ns ten enable time VCC(A) = 3.0 V to 3.6 V tpd tdis ten [1] enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 12 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 10.1. Waveforms and test circuit VI nAn, nBn input VM GND tPHL tPLH VOH nBn, nAn output VM VOL 001aak285 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 4. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times VI VM nOE input GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCCO VM VX VOL tPHZ output HIGH-to-OFF OFF-to-HIGH VOH tPZH VY VM GND outputs enabled outputs disabled outputs enabled 001aak286 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. Enable and disable times Table 14. Measurement points Supply voltage Input [1] Output [2] VCC(A), VCC(B) VM VM VX VY 0.8 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V 3.0 V to 3.6 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V [1] [2] VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 13 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state tW VI 90 % negative pulse VM VM 10 % 0V VI tf tr tr tf 90 % positive pulse VM VM 10 % 0V tW VEXT VCC VI G RL VO DUT RT CL RL 001aae331 Test data is given in Table 15. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance. VEXT = External voltage for measuring switching times. Fig. 6. Test circuit for measuring switching times Table 15. Test data Supply voltage Input Load VEXT VCC(A), VCC(B) VI [1] Δt/ΔV [2] CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [3] 0.8 V to 1.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 1.65 V to 2.7 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 3.0 V to 3.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO [1] [2] [3] VCCI is the supply voltage associated with the data input port. dV/dt ≥ 1.0 V/ns VCCO is the supply voltage associated with the output port. 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 14 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 11. Typical propagation delay characteristics 001aai476 24 tpd (ns) (1) (2) (3) (4) (5) (6) tpd (ns) (1) 20 001aai477 21 17 16 12 8 4 13 (2) (3) (4) (5) (6) 0 20 40 CL (pF) 60 9 0 20 40 CL (pF) a. Propagation delay (nAn to nBn); VCC(A) = 0.8 V b. Propagation delay (nAn to nBn); VCC(B) = 0.8 V (1) VCC(B) = 0.8 V (2) VCC(B) = 1.2 V (3) VCC(B) = 1.5 V (4) VCC(B) = 1.8 V (5) VCC(B) = 2.5 V (6) VCC(B) = 3.3 V (1) VCC(A) = 0.8 V (2) VCC(A) = 1.2 V (3) VCC(A) = 1.5 V (4) VCC(A) = 1.8 V (5) VCC(A) = 2.5 V (6) VCC(A) = 3.3 V Fig. 7. 60 Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 15 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 001aai478 7 tPLH (ns) 001aai491 7 (1) tPHL (ns) (2) 5 (1) 5 (3) (2) (3) (4) (4) (5) (5) 3 1 3 0 20 40 CL (pF) 1 60 a. LOW to HIGH propagation delay (nAn to nBn); VCC(A) = 1.2 V (1) tPLH (ns) 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (nAn to nBn); VCC(A) = 1.2 V 001aai479 7 0 001aai480 7 tPHL (ns) (1) 5 5 (2) (3) (2) (3) (4) (5) 3 1 0 20 40 CL (pF) c. LOW to HIGH propagation delay (nAn to nBn); VCC(A) = 1.5 V (4) (5) 3 60 1 0 20 40 CL (pF) 60 d. HIGH to LOW propagation delay (nAn to nBn); VCC(A) = 1.5 V (1) VCC(B) = 1.2 V (2) VCC(B) = 1.5 V (3) VCC(B) = 1.8 V (4) VCC(B) = 2.5 V (5) VCC(B) = 3.3 V Fig. 8. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 16 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 001aai481 7 (1) tPLH (ns) 5 001aai482 7 tPHL (ns) (1) 5 (2) (3) (3) (4) 3 1 (2) (5) 0 20 40 CL (pF) 1 60 a. LOW to HIGH propagation delay (nAn to nBn); VCC(A) = 1.8 V tPLH (ns) 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (nAn to nBn); VCC(A) = 1.8 V 001aai483 7 (4) (5) 3 001aai486 7 tPHL (ns) (1) 5 (1) 5 (2) (2) (3) (3) (4) 3 3 (4) (5) (5) 1 0 20 40 CL (pF) c. LOW to HIGH propagation delay (nAn to nBn); VCC(A) = 2.5 V 60 1 0 20 40 CL (pF) 60 d. HIGH to LOW propagation delay (nAn to nBn); VCC(A) = 2.5 V (1) VCC(B) = 1.2 V (2) VCC(B) = 1.5 V (3) VCC(B) = 1.8 V (4) VCC(B) = 2.5 V (5) VCC(B) = 3.3 V Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 17 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 001aai485 7 tPLH (ns) 001aai484 7 tPHL (ns) (1) 5 (1) 5 (2) (2) (3) (3) 3 3 (4) (4) (5) (5) 1 0 20 40 CL (pF) a. LOW to HIGH propagation delay (nAn to nBn); VCC(A) = 3.3 V 60 1 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (nAn to nBn); VCC(A) = 3.3 V (1) VCC(B) = 1.2 V (2) VCC(B) = 1.5 V (3) VCC(B) = 1.8 V (4) VCC(B) = 2.5 V (5) VCC(B) = 3.3 V Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 18 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 12. Package outline TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 E D A X c HE y v M A Z 56 29 Q A2 (A 3 ) A1 pin 1 index A θ Lp L 1 28 w M bp e detail X 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z θ mm 1.2 0.15 0.05 1.05 0.85 0.25 0.28 0.17 0.2 0.1 14.1 13.9 6.2 6.0 0.5 8.3 7.9 1 0.8 0.4 0.50 0.35 0.25 0.08 0.1 0.5 0.1 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT364-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig. 11. Package outline SOT364-1 (TSSOP56) 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 19 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state 13. Abbreviations Table 16. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 14. Revision history Table 17. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AVC20T245_Q100 v.2 20190114 Product data sheet - 74AVC20T245_Q100 v.1 Modifications: • • 74AVC20T245_Q100 v.1 74AVC20T245_Q100 Product data sheet The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 20160407 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 - © Nexperia B.V. 2019. All rights reserved 20 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 21 / 22 74AVC20T245-Q100 Nexperia 20-bit dual supply translating transceiver with configurable voltage translation; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Functional diagram.......................................................2 5. Pinning information......................................................4 5.1. Pinning.........................................................................4 5.2. Pin description............................................................. 5 6. Functional description................................................. 5 7. Limiting values............................................................. 6 8. Recommended operating conditions..........................6 9. Static characteristics....................................................7 10. Dynamic characteristics.......................................... 10 10.1. Waveforms and test circuit...................................... 13 11. Typical propagation delay characteristics.............. 15 12. Package outline........................................................ 19 13. Abbreviations............................................................ 20 14. Revision history........................................................20 15. Legal information......................................................21 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 14 January 2019 74AVC20T245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 January 2019 © Nexperia B.V. 2019. All rights reserved 22 / 22 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74AVC20T245DGG,118 74AVC20T245DGG-Q1J