74CBTLVD3245-Q100
8-bit level-shifting bus switch with output enable
Rev. 3 — 16 April 2019
Product data sheet
1. General description
The 74CBTLVD3245-Q100 is an 8-pole, single-throw bus switch. The device features a single
output enable input (OE) that controls eight switch channels. The switches are disabled when OE
is HIGH. Schmitt trigger action at control inputs makes the circuit tolerant of slower input rise and
fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device when it
is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supply voltage range from 3.0 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
• JESD8-B/JESD36 (3.0 V to 3.6 V)
ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• CDM AEC-Q100-011 revision B exceeds 1000 V
5 Ω switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
SOT360-1
74CBTLVD3245PW-Q100 -40 °C to +125 °C
TSSOP20
74CBTLVD3245BQ-Q100 -40 °C to +125 °C
DHVQFN20 plastic dual-in-line compatible thermal
SOT764-1
enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 × 4.5 × 0.85 mm
74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
4. Functional diagram
OE
19
A1
A2
A3
A4
A5
A6
A7
A8
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
B1
Fig. 1.
B2
B3
B4
B5
B6
B7
A1
A8
B8
Logic symbol
Fig. 2.
18
9
11
B1
B8
19
OE
001aao116
2
001aao117
Logic diagram
5. Pinning information
5.1. Pinning
1
n.c.
terminal 1
index area
1
20 VCC
A1
2
19 OE
A2
3
18 B1
A3
4
17 B2
A4
5
16 B3
A5
6
15 B4
A6
7
14 B5
A7
8
13 B6
A8
9
12 B7
GND 10
11 B8
19 OE
A2
3
18 B1
A3
4
17 B2
A4
5
16 B3
A5
6
15 B4
A6
7
A7
8
A8
9
14 B5
GND(1)
13 B6
12 B7
aaa-020101
Transparent top view
(1) This is not a supply pin, the substrate is attached to
this pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However if it is soldered the solder land should remain
floating or be connected to GND.
aaa-020100
Fig. 3.
2
B8 11
n.c.
A1
GND 10
74CBTLVD3245-Q100
20 VCC
74CBTLVD3245-Q100
Pin configuration SOT360-1 (TSSOP20)
Fig. 4.
Pin configuration SOT764-1 (DHVQFN20)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
n.c.
1
not connected
A1 to A8
2, 3, 4, 5, 6, 7, 8, 9
data input/output (A port)
GND
10
ground (0 V)
B1 to B8
18, 17, 16, 15, 14, 13, 12, 11
data input/output (B port)
OE
19
output enable input (active LOW)
VCC
20
positive supply voltage
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
6. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Input
Input/output
OE
An, Bn
L
An = Bn
H
Z
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
-0.5
+4.6
V
+4.6
V
VCC
supply voltage
VI
input voltage
VSW
switch voltage
enable and disable mode
IIK
input clamping current
VI/O < -0.5 V
-50
-
mA
ISK
switch clamping current
VI < -0.5 V
-50
-
mA
ISW
switch current
VSW = 0 V to VCC
-
±128
mA
ICC
supply current
-
+100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
Ptot
total power dissipation
-
500
mW
Min
Max
Unit
3.0
3.6
V
0
3.6
V
[1]
[2]
Tamb = -40 °C to +125 °C
[1]
-0.5
[1]
-0.5
[2]
VCC + 0.5 V
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP20 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN20 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
VCC
supply voltage
VI
input voltage
VSW
switch voltage
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
[1]
Conditions
enable and disable mode
VCC = 3.0 V to 3.6 V
[1]
0
VCC
V
-40
+125
°C
0
200
ns/V
Applies to control signal levels.
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
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8-bit level-shifting bus switch with output enable
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
VCC = 3.0 V to 3.6 V
-40 °C to +125 °C Unit
Min
Typ [1]
Max
Min
Max
2.0
-
-
2.0
-
V
VIH
HIGH-level
input voltage
VIL
LOW-level input VCC = 3.0 V to 3.6 V
voltage
-
-
0.9
-
0.9
V
II
input leakage
current
pin OE; VI = GND to VCC; VCC = 3.6 V
-
-
±1
-
±20
μA
Vpass
pass voltage
VI = VCC; see Fig. 7 to Fig. 11
-
-
-
-
-
V
IS(OFF)
OFF-state
VCC = 3.6 V; see Fig. 5
leakage current
-
-
±1
-
±20
μA
IS(ON)
ON-state
VCC = 3.6 V; see Fig. 6
leakage current
-
-
±1
-
±20
μA
IOFF
power-off
VI or VO = 0 V to 3.6 V; VCC = 0 V
leakage current
-
-
±10
-
±50
μA
ICC
supply current
VI = VCC; IO = 0 A; VCC = 3.6 V;
VSW = GND or VCC
-
-
20
-
50
μA
VI = GND; IO = 0 A; VCC = 3.6 V;
VSW = GND or VCC
-
-
100
-
150
μA
-
-
300
-
2000
μA
ΔICC
additional
supply current
pin OE; VI = VCC - 0.6 V;
VSW = GND or VCC; VCC = 3.6 V
CI
input
capacitance
pin OE; VCC = 3.3 V; VI = 0 V to 3.3 V
-
0.9
-
-
-
pF
CS(OFF)
OFF-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V
-
2.5
-
-
-
pF
CS(ON)
ON-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V
-
9.0
-
-
-
pF
[1]
[2]
[2]
All typical values are measured at Tamb = 25 °C.
One input at 3 V, other inputs at VCC or GND.
9.1. Test circuits
VCC
VCC
OE
VIH
Is
A
VI
Bn
An
OE
VIL
Is
Is
A
A
GND
VI
VO
An
Bn
GND
VO
001aan148
001aan147
VI = VCC or GND and VO = GND or VCC.
Fig. 5.
VI = VCC or GND and VO = open circuit.
Test circuit for measuring OFF-state leakage
current (one switch)
74CBTLVD3245_Q100
Product data sheet
Fig. 6.
Test circuit for measuring ON-state leakage
current (one switch)
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
9.2. Typical pass voltage graphs
001aam102
1.90
Vpass
(V)
1.85
20 µA
1.90
Vpass
(V)
1.85
1.80
100 µA
1.80
001aam103
20 µA
100 µA
1.75
1.75
1.70
1.70
2 mA
1.65
4 mA
2 mA
1.65
4 mA
1.60
1.55
3.0
Fig. 7.
3.2
1.60
3.4
VCC (V)
3.6
Pass voltage versus supply voltage;
Tamb = 125 °C (typical)
1.55
3.0
Fig. 8.
001aam104
3.2
3.4
VCC (V)
3.6
Pass voltage versus supply voltage;
Tamb = 85 °C (typical)
1.90
Vpass
(V)
1.85
20 µA
1.90
Vpass
(V)
1.85
1.80
100 µA
1.80
001aam105
20 µA
100 µA
1.75
1.75
1.70
1.70
2 mA
2 mA
4 mA
1.65
1.65
1.60
1.55
3.0
Fig. 9.
1.60
3.2
3.4
VCC (V)
Pass voltage versus supply voltage;
Tamb = 25 °C (typical)
74CBTLVD3245_Q100
Product data sheet
4 mA
3.6
1.55
3.0
3.2
3.4
VCC (V)
3.6
Fig. 10. Pass voltage versus supply voltage;
Tamb = 0 °C (typical)
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
001aam106
1.90
Vpass
(V)
1.85
1.80
20 µA
1.75
100 µA
1.70
1.65
2 mA
4 mA
1.60
1.55
3.0
3.2
3.4
VCC (V)
3.6
Fig. 11. Pass voltage versus supply voltage; Tamb = -40 °C (typical)
9.3. ON resistance
Table 7. Resistance RON
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 12.
Symbol Parameter
RON
[1]
[2]
ON resistance
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Typ [1]
Max
Min
Max
ISW = 64 mA; VI = 0 V
-
3.7
7.0
-
10.0
Ω
ISW = 24 mA; VI = 0 V
-
3.7
7.0
-
10.0
Ω
ISW = 15 mA; VI = 1.2 V
-
4.7
10.0
-
12.0
Ω
VCC = 3.0 V to 3.6 V
[2]
Typical values are measured at Tamb = 25 °C and nominal VCC.
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
VSW
V
VCC
OE
VIL
An
VI
Bn
GND
ISW
001aan149
RON = VSW / ISW.
Fig. 12. Test circuit for measuring ON resistance (one switch)
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
10. Dynamic characteristics
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Fig. 15
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ [1]
Max
Min
Max
-
-
0.11
-
0.22
ns
tpd
propagation
delay
An to Bn or Bn to An;
VCC = 3.0 V to 3.6 V; see Fig. 13
[2][3]
ten
enable time
OE to An or Bn;
VCC = 3.0 V to 3.6 V; see Fig. 14
[4]
1.5
2.9
5.0
1.5
6.0
ns
tdis
disable time
OE to An or Bn;
VCC = 3.0 V to 3.6 V; see Fig. 14
[5]
0.8
3.4
7.0
0.8
8.0
ns
[1]
[2]
[3]
[4]
[5]
All typical values are measured at Tamb = 25 °C and at nominal VCC.
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the load capacitance,
when driven by an ideal voltage source (zero output impedance).
tpd is the same as tPLH and tPHL.
ten is the same as tPZH and tPZL.
tdis is the same as tPHZ and tPLZ.
10.1. Waveforms and test circuit
VI
input
VM
VM
0V
tPHL
tPLH
VOH
VM
output
VM
VOL
001aai367
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 13. The data input (An, Bn) to output (Bn, An) propagation delay times
VI
OE input
VM
VM
GND
tPLZ
output
LOW-to-OFF
OFF-to-LOW
tPZL
1.8 V
VM
VX
VOL
tPZH
tPHZ
output
HIGH-to-OFF
OFF-to-HIGH
VOH
VY
VM
GND
switch
enabled
switch
disabled
switch
enabled
aaa-021720
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 14. Enable and disable times
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
Table 9. Measurement points
Supply voltage
Input
Output
VCC
VM
VI
tr = tf
VM
VX
VY
3.0 V to 3.6 V
0.5VCC
VCC
≤ 2.0 ns
0.9 V
VOL + 0.15 V
VOH - 0.15 V
tW
VI
90 %
negative
pulse
VM
VM
10 %
0V
VI
tf
tr
tr
tf
90 %
positive
pulse
VM
VM
10 %
0V
tW
VEXT
VCC
G
VI
RL
VO
DUT
RT
CL
RL
001aae331
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 15. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
Load
VEXT
VCC
CL
RL
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
3.0 V to 3.6 V
30 pF
1 kΩ
open
GND
3.6 V
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
10.2. Additional dynamic characteristics
Table 11. Additional dynamic characteristics
GND = 0 V.
Symbol Parameter
f(-3dB)
[1]
-3 dB frequency response
Conditions
Tamb = 25 °C
VCC = 3.3 V; RL = 50 Ω; see Fig. 16
[1]
Unit
Min
Typ
Max
-
575
-
MHz
fi is biased at 0.5VCC.
VCC
0.5VCC
OE
VIL
RL
Bn
fi
An
GND
dB
001aan156
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB.
Fig. 16. Test circuit for measuring the frequency response when channel is in ON-state
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
11. Package outline
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
D
SOT360-1
E
A
X
c
HE
y
v M A
Z
11
20
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
10
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.5
0.2
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT360-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-153
Fig. 17. Package outline SOT360-1 (TSSOP20)
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
B
D
SOT764-1
A
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
e1
C
e
b
2
9
v
w
C A B
C
y1 C
y
L
1
10
Eh
e
20
11
19
12
X
Dh
0
2.5
5 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A(1)
A1
b
max 1.00 0.05 0.30
nom 0.90 0.02 0.25
min 0.80 0.00 0.18
c
D(1)
Dh
E(1)
Eh
e
e1
L
v
0.2
4.6
4.5
4.4
3.15
3.00
2.85
2.6
2.5
2.4
1.15
1.00
0.85
0.5
3.5
0.5
0.4
0.3
0.1
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
IEC
JEDEC
JEITA
SOT764-1
---
MO-241
---
sot764-1_po
European
projection
Issue date
03-01-27
14-12-12
Fig. 18. Package outline SOT764-1 (DHVQFN20)
74CBTLVD3245_Q100
Product data sheet
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74CBTLVD3245-Q100
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8-bit level-shifting bus switch with output enable
12. Abbreviations
Table 12. Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
13. Revision history
Table 13. Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74CBTLVD3245_Q100 v.3
20190416
Product data sheet
-
Modifications:
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74CBTLVD3245_Q100 v.2
20160122
Modifications:
•
74CBTLVD3245_Q100 v.1
20151016
74CBTLVD3245_Q100
Product data sheet
74CBTLVD3245_Q100 v.2
Product data sheet
-
74CBTLVD3245_Q100 v.1
-
-
Fig. 14 updated.
Product data sheet
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74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
74CBTLVD3245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 April 2019
©
Nexperia B.V. 2019. All rights reserved
13 / 14
74CBTLVD3245-Q100
Nexperia
8-bit level-shifting bus switch with output enable
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description............................................................. 2
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................3
9. Static characteristics....................................................4
9.1. Test circuits..................................................................4
9.2. Typical pass voltage graphs........................................ 5
9.3. ON resistance..............................................................6
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 7
10.2. Additional dynamic characteristics.............................9
11. Package outline........................................................ 10
12. Abbreviations............................................................ 12
13. Revision history........................................................12
14. Legal information......................................................13
©
Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 16 April 2019
74CBTLVD3245_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 April 2019
©
Nexperia B.V. 2019. All rights reserved
14 / 14
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