74LVC2G3157DPJ

74LVC2G3157 Dual 10 Ω single-pole double-throw analog switch Rev. 3 — 25 March 2019 Product data sheet 1. General description The 74LVC2G3157 is a dual low-ohmic single-pole double-throw analog switch suitable for use as an analog or digital 2:1 multiplexer/demultiplexer. Each switch has a digital select input (nS), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). Schmitt trigger action at the select inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V. 2. Features and benefits • • • • • • • • • • • Wide supply voltage range from 1.65 V to 5.5 V Very low ON resistance: • 10.4 Ω (typical) at VCC = 2.7 V • 7.8 Ω (typical) at VCC = 3.3 V • 6.2 Ω (typical) at VCC = 5 V Switch current capability of 32 mA Break-before-make switching High noise immunity CMOS low power consumption TTL interface compatibility at 3.3 V Latch-up performance exceeds 100 mA per JESD 78 Class II ESD protection: • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV • MM JESD22-A115-C exceeds 200 V • CDM JESD22-C101E exceeds 1000 V Select input accepts voltages up to 5.5 V Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G3157DP -40 °C to +125 °C TSSOP10 plastic thin shrink small outline package; 10 leads; SOT552-1 body width 3 mm 74LVC2G3157GM -40 °C to +125 °C XQFN10 plastic extremely thin quad flat package; no leads; 10 terminals; body 1.55 x 2.00 x 0.50 mm SOT1049-3 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 4. Marking Table 2. Marking codes Type number Marking code[1] 74LVC2G3157DP YJ 74LVC2G3157GM YJ [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Y1 1Y0 2Y0 1S 2S 1Z 2Z 1Y1 S Z Y0 2Y1 001aac355 001aaj085 Fig. 1. Logic symbol Fig. 2. Logic diagram (one switch) 6. Pinning information 6.1. Pinning 1 10 1Z 2 9 1Y0 GND 3 8 VCC 2Y1 4 7 2Y0 2S 5 6 2Z 1Y1 9 1Y0 2 8 VCC GND 3 7 2Y0 2Y1 4 6 2Z Pin configuration SOT552-1 (TSSOP10) 74LVC2G3157 Product data sheet aaa-020230 Transparent top view aaa-020231 Fig. 3. 5 1S 1Y1 1 2S 74LVC2G3157 1S 10 1Z 74LVC2G3157 Fig. 4. Pin configuration SOT1049-3 (XQFN10) All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 2 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 6.2. Pin description Table 3. Pin description Symbol Pin Description 1S 1 select input 1Y1 2 independent input or output GND 3 ground (0 V) 2Y1 4 independent input or output 2S 5 select input 2Z 6 common output or input 2Y0 7 independent input or output VCC 8 supply voltage 1Y0 9 independent input or output 1Z 10 common output or input 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Input nS Channel on L nY0 H nY1 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage IIK input clamping current VI < -0.5 V ISK switch clamping current VI < -0.5 V or VI > VCC + 0.5 V VSW switch voltage enable and disable mode ISW switch current VSW > -0.5 V or VSW < VCC + 0.5 V - ±50 mA ICC supply current - 100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW [1] [2] [3] Conditions [1] Tamb = -40 °C to +125 °C [2] [3] Min Max Unit -0.5 +6.5 V -0.5 +6.5 V -50 - mA - ±50 mA -0.5 VCC + 0.5 V The minimum input voltage rating may be exceeded if the input current rating is observed. The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. For TSSOP10 package: above 120°C the value of Ptot derates linearly with 8.3 mW/K. For XQFN10 package: above 90°C the value of Ptot derates linearly with 4.2 mW/K. 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 3 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VSW switch voltage 0 - VCC V Tamb ambient temperature °C Δt/ΔV input transition rise and fall rate [1] [2] enable and disable mode [1] -40 - +125 VCC = 1.65 V to 2.7 V [2] - - 20 ns/V VCC = 2.7 V to 5.5 V [2] - - 10 ns/V To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit for the voltage drop across the switch. Applies to control signal levels. 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter VIH HIGH-level input voltage Conditions -40 °C to +85 °C Unit Min Typ[1] Max Min Max 0.65VCC - - 0.65VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 3 V to 3.6 V 2.0 - - 2.0 - V 0.7VCC - - 0.7VCC - V - - 0.35VCC - - - 0.7 - VCC = 3 V to 3.6 V - - 0.8 - VCC = 4.5 V to 5.5 V - - 0.3VCC [2] - ±0.1 ±1 VCC = 1.65 V to 1.95 V VCC = 4.5 V to 5.5 V LOW-level input VCC = 1.65 V to 1.95 V voltage VCC = 2.3 V to 2.7 V VIL -40 °C to +125 °C 0.7 V 0.8 V 0.3VCC V - ±1 μA II input leakage current IS(OFF) OFF-state VCC = 5.5 V; see Fig. 5 leakage current [2] - ±0.1 ±0.2 - ±0.5 μA IS(ON) ON-state VCC = 5.5 V; see Fig. 6 leakage current [2] - ±0.1 ±1 - ±2 μA ICC supply current VI = 5.5 V or GND; VSW = GND or VCC; VCC = 1.65 V to 5.5 V [2] - 0.1 4 - 4 μA ΔICC additional supply current pin nS; VI = VCC - 0.6 V; VCC = 5.5 V; VSW = GND or VCC [2] - 5 500 - 500 μA CI input capacitance - 2.5 - - - pF CS(OFF) OFF-state capacitance - 6.0 - - - pF CS(ON) ON-state capacitance - 18 - - - pF [1] [2] pin nS; VI = 5.5 V or GND; VCC = 0 V to 5.5 V 0.35VCC V Typical values are measured at Tamb = 25 °C. These typical values are measured at VCC = 3.3 V 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 4 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 10.1. Test circuits switch nS switch nS 1 VIH 1 VIL 2 VIL 2 VIH VCC VIL or VIH nS nY0 1 nZ nY1 2 switch VCC VIL or VIH lS lS VO VI nS nY0 1 nZ nY1 2 switch VO VI GND GND aaa-020232 aaa-020233 VI = VCC or GND and VO = GND or VCC. Fig. 5. VI = VCC or GND and VO = open circuit. Test circuit for measuring OFF-state leakage current Fig. 6. Test circuit for measuring ON-state leakage current 10.2. ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Fig. 8 to Fig. 13. Symbol Parameter RON(peak) ON resistance (peak) RON(rail) ON resistance (rail) Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max ISW = 4 mA;VCC = 1.65 V to 1.95 V - 34.0 130 - 195 Ω ISW = 8 mA; VCC = 2.3 V to 2.7 V - 12.0 30 - 45 Ω ISW = 12 mA; VCC = 2.7 V - 10.4 25 - 38 Ω ISW = 24 mA; VCC = 3.0 V to 3.6 V - 7.8 20 - 30 Ω ISW = 32 mA; VCC = 4.5 V to 5.5 V - 6.2 15 - 23 Ω ISW = 4 mA;VCC = 1.65 V to 1.95 V - 8.2 18 - 27 Ω ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.1 16 - 24 Ω ISW = 12 mA; VCC = 2.7 V - 6.9 14 - 21 Ω ISW = 24 mA; VCC = 3.0 V to 3.6 V - 6.5 12 - 18 Ω ISW = 32 mA; VCC = 4.5 V to 5.5 V - 5.8 10 - 15 Ω ISW = 4 mA;VCC = 1.65 V to 1.95 V - 10.4 30 - 45 Ω ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.6 20 - 30 Ω ISW = 12 mA; VCC = 2.7 V - 7.0 18 - 27 Ω ISW = 24 mA; VCC = 3.0 V to 3.6 V - 6.1 15 - 23 Ω ISW = 32 mA; VCC = 4.5 V to 5.5 V - 4.9 10 - 15 Ω VI = GND to VCC; see Fig. 7 VI = GND; see Fig. 7 VI = VCC; see Fig. 7 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 5 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch Symbol Parameter RON(flat) [1] [2] Conditions -40 °C to +85 °C Min Typ[1] Max Min Max ISW = 4 mA;VCC = 1.65 V to 1.95 V - 26.0 - - - Ω ISW = 8 mA; VCC = 2.3 V to 2.7 V - 5.0 - - - Ω ISW = 12 mA; VCC = 2.7 V - 3.5 - - - Ω ISW = 24 mA; VCC = 3.0 V to 3.6 V - 2.0 - - - Ω ISW = 32 mA; VCC = 4.5 V to 5.5 V - 1.5 - - - Ω VI = GND to VCC ON resistance (flatness) -40 °C to +125 °C Unit [2] Typical values are measured at Tamb = 25 °C and nominal VCC. Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. 10.3. ON resistance test circuit and graphs mna673 40 RON (Ω) 30 (1) 20 VSW V VCC VIL or VIH nS nY0 1 nZ nY1 2 switch nS 1 VIL 2 VIH 10 (4) 0 switch GND aaa-020235 RON = VSW/ISW. Fig. 7. Test circuit for measuring ON resistance 74LVC2G3157 Product data sheet 0 1 (5) 2 3 4 VI (V) 5 (1) VCC = 1.8 V. (2) VCC = 2.5 V. (3) VCC = 2.7 V. (4) VCC = 3.3 V. (5) VCC = 5.0 V. VI ISW (2) (3) Fig. 8. Typical ON resistance as a function of input voltage; Tamb = 25 °C All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 6 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 001aaa712 55 RON (Ω) 001aaa708 15 RON (Ω) 45 13 35 11 (4) (3) (2) (1) 25 (1) (2) 9 (3) (4) 15 5 7 0 0.4 0.8 1.2 1.6 VI (V) 5 2.0 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 9. 0 0.5 1.0 1.5 2.0 VI (V) 2.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. ON resistance as a function of input voltage; VCC = 1.8 V 001aaa709 13 RON (Ω) Fig. 10. ON resistance as a function of input voltage; VCC = 2.5 V 001aaa710 10 RON (Ω) 11 8 (1) (1) 9 (2) (2) 6 (3) (3) 7 (4) 5 0 0.5 1.0 (4) 1.5 2.0 2.5 3.0 VI (V) (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Product data sheet 0 1 2 3 VI (V) 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 11. ON resistance as a function of input voltage; VCC = 2.7 V 74LVC2G3157 4 Fig. 12. ON resistance as a function of input voltage; VCC = 3.3 V All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 7 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 001aaa711 7 RON (Ω) 6 5 (1) (2) (3) 4 (4) 3 0 1 2 3 4 VI (V) 5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 13. ON resistance as a function of input voltage; VCC = 5.0 V 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 8 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 17. Symbol Parameter tpd propagation delay ten enable time Conditions -40 °C to +85 °C Min Typ[1] VCC = 1.65 V to 1.95 V - VCC = 2.3 V to 2.7 V - VCC = 2.7 V Max Min Max - 2 - 3.0 ns - 1.2 - 2.0 ns - - 1.0 - 1.5 ns VCC = 3.0 V to 3.6 V - - 0.8 - 1.5 ns VCC = 4.5 V to 5.5 V - - 0.6 - 1.0 ns VCC = 1.65 V to 1.95 V 1 8.7 24 1 26.5 ns VCC = 2.3 V to 2.7 V 1 5.3 14 1 15.5 ns VCC = 2.7 V 1 4.9 14 1 15.5 ns 0.5 4 7.6 0.5 8.5 ns 0.5 3 5.7 0.5 6.6 ns 2.5 6 13 2.5 14.5 ns 2 4.4 7.5 2 8.5 ns VCC = 2.7 V 1.5 4.2 7.5 1.5 8.5 ns VCC = 3.0 V to 3.6 V 1.5 3.6 5.3 1.5 6 ns VCC = 4.5 V to 5.5 V 0.8 2.9 3.8 0.8 4.5 ns 0.5 - - 0.5 - ns VCC = 2.3 V to 2.7 V 0.5 - - 0.5 - ns VCC = 2.7 V 0.5 - - 0.5 - ns VCC = 3 V to 3.6 V 0.5 - - 0.5 - ns VCC = 4.5 V to 5.5 V 0.5 - - 0.5 - ns nYn to nZ or nZ to nYn; see Fig. 14 nS to nYn; see Fig. 15 [2][3] [4] VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V tdis disable time nS to nYn; see Fig. 15 [5] VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V break-before- CL = 35 pF; RL = 50 Ω; see Fig. 16 make time VCC = 1.65 V to 1.95 V tb-m [1] [2] [3] [4] [5] [6] -40 °C to +125 °C Unit [6] Typical values are measured at Tamb = 25 °C and nominal VCC. tpd is the same as tPLH and tPHL. Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance). ten is the same as tPZH and tPZL. tdis is the same as tPLZ and tPHZ. Break-before-make specified by design. 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 9 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 11.1. Waveforms and test circuits VI nYn or nZ input VM VM GND tPLH tPHL VOH nZ or nYn output VM VM VOL aaa-020236 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 14. Input (nYn or nZ) to output (nZ or nYn) propagation delays VI nS input VM GND tPLZ nYn output LOW to OFF OFF to LOW tPZL VCC VM VX VOL tPZH tPHZ nYn output HIGH to OFF OFF to HIGH VOH VY VM GND switch enabled switch disabled switch enabled aaa-020237 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 15. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 5.5 V 0.5VCC 0.5VCC VOL + 0.3 V VOH - 0.3 V 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 10 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch VCC G V I VO RL 0.5VCC nS nY0 nZ nY1 CL GND aaa-020239 a. Test circuit VI 0.5VI 0.9VO 0.9VO VO tb-m 001aag572 b. Input and output measurement points Fig. 16. Test circuit for measuring break-before-make timing VI negative pulse tW 90 % VM 0V VI tf tr tr tf 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC PULSE GENERATOR VI RL VO DUT RT CL RL 001aae235 Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Fig. 17. Test circuit for measuring switching times 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 11 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch Table 11. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 1.65 V to 1.95 V VCC ≤ 2.0 ns 50 pF 500 Ω open GND 2VCC 2.3 V to 2.7 V VCC ≤ 2.0 ns 50 pF 500 Ω open GND 2VCC 2.7 V VCC ≤ 2.5 ns 50 pF 500 Ω open GND 2VCC 3 V to 3.6 V VCC ≤ 2.5 ns 50 pF 500 Ω open GND 2VCC 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open GND 2VCC 11.2. Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C. Symbol Parameter Conditions THD fi = 600 Hz to 20 kHz; RL = 600 Ω; CL = 50 pF; VI = 0.5 V (p-p); see Fig. 18 f(-3dB) αiso Xtalk Qinj total harmonic distortion -3 dB frequency response isolation (OFF-state) crosstalk charge injection 74LVC2G3157 Product data sheet Min Typ Max Unit VCC = 1.65 V - 0.260 - % VCC = 2.3 V - 0.078 - % VCC = 3.0 V - 0.078 - % VCC = 4.5 V - 0.078 - % VCC = 1.65 V - 200 - MHz VCC = 2.3 V - 300 - MHz VCC = 3.0 V - 300 - MHz VCC = 4.5 V - 300 - MHz VCC = 1.65 V - -42 - dB VCC = 2.3 V - -42 - dB VCC = 3.0 V - -40 - dB VCC = 4.5 V - -40 - dB VCC = 1.65 V - -54 - dB VCC = 2.3 V - -54 - dB VCC = 3.0 V - -54 - dB VCC = 4.5 V - -54 - dB VCC = 1.8 V - 3.3 - pC VCC = 2.5 V - 4.1 - pC VCC = 3.3 V - 5.0 - pC VCC = 4.5 V - 6.4 - pC VCC = 5.5 V - 7.5 - pC RL = 50 Ω; see Fig. 19 RL = 50 Ω; CL = 5 pF; fi = 10 MHz; see Fig. 20 between switches; fi = 10 MHz; see Fig. 21 CL = 0.1 nF; Vgen = 0 V; Rgen = 0 Ω; fi = 1 MHz; RL = 1 MΩ; see Fig. 22 All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 12 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 11.3. Test circuits 0.5VCC VCC VIL or VIH fi 0.1 µF nS nY0 1 nZ nY1 2 switch nS 1 VIL 2 VIH RL 10 µF switch 600 Ω D CL GND aaa-020238 Fig. 18. Test circuit for measuring total harmonic distortion VCC VIL or VIH DC bias = 350 mV fi 0.1 µF nS nY0 1 nZ nY1 2 switch nS 1 VIL 2 VIH switch dB RL 50 Ω GND aaa-020240 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB. Fig. 19. Test circuit for measuring the frequency response when switch is in ON-state 0.5VCC RL VIL or VIH fi 0.1 µF VCC 0.5VCC nS nY0 1 nZ nY1 2 switch nS 1 VIH RL 2 VIL CL dB switch 50 Ω GND aaa-020241 Adjust fi voltage to obtain 0 dBm level at input. Fig. 20. Test circuit for measuring isolation (OFF-state) VCC VIL or VIH nS nY0 nZ nY1 50 Ω fi dB GND aaa-020244 Adjust fi voltage to obtain 0 dBm level at input. Fig. 21. Test circuit for measuring crosstalk 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 13 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch VCC G V I nS nY0 1 nZ nY1 2 switch Rgen RL CL VO Vgen GND aaa-020242 a. Test circuit logic (nS) input off on VO off VO aaa-020243 b. Input and output pulse definitions Qinj = ΔVO × CL. ΔVO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig. 22. Test circuit for measuring charge injection 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 14 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 12. Package outline TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm D E SOT552-1 A X c y HE v M A Z 6 10 A2 pin 1 index (A3) A1 A θ Lp L 1 5 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.15 0.23 0.15 3.1 2.9 3.1 2.9 0.5 5.0 4.8 0.95 0.7 0.4 0.1 0.1 0.1 0.67 0.34 6° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-07-29 03-02-18 SOT552-1 Fig. 23. Package outline SOT552-1 (TSSOP10) 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 15 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch XQFN10: plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.55 x 2.00 x 0.50 mm SOT1049-3 X B D A terminal 1 index area E A A1 c detail X Æv Æw b 5 C C A B C y1 C y 6 4 e1 e 9 b1 1 terminal 1 index area 10 L1 L 0 1 Dimensions Unit(1) max nom min mm 2 mm scale A 0.5 A1 b b1 c D 0.05 0.25 0.33 1.65 0.20 0.28 0.127 1.55 0.00 0.15 0.23 1.45 E e e1 2.1 2.0 1.9 0.5 1.5 L L1 0.48 0.40 0.43 0.35 0.38 0.30 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT1049-3 --- MO255 --- sot1049-3_po European projection Issue date 10-12-06 11-03-30 Fig. 24. Package outline SOT1049-3 (XQFN10) 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 16 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 13. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC2G3157 v.3 20190325 Product data sheet - 74LVC2G3157 v.2 Modifications: • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 74LVC2G3157 v.2 20161215 Modifications: • 74LVC2G3157 v.1 20151214 74LVC2G3157 Product data sheet Product data sheet - 74LVC2G3157 v.1 Table 7: The maximum limits for leakage current and supply current have changed. Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 - © Nexperia B.V. 2019. All rights reserved 17 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LVC2G3157 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 18 / 19 74LVC2G3157 Nexperia Dual 10 Ω single-pole double-throw analog switch Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................2 6.1. Pinning.........................................................................2 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 3 9. Recommended operating conditions..........................4 10. Static characteristics..................................................4 10.1. Test circuits................................................................5 10.2. ON resistance............................................................5 10.3. ON resistance test circuit and graphs........................6 11. Dynamic characteristics.............................................9 11.1. Waveforms and test circuits.....................................10 11.2. Additional dynamic characteristics........................... 12 11.3. Test circuits.............................................................. 13 12. Package outline........................................................ 15 13. Abbreviations............................................................ 17 14. Revision history........................................................17 15. Legal information......................................................18 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 25 March 2019 74LVC2G3157 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 March 2019 © Nexperia B.V. 2019. All rights reserved 19 / 19