PRMH13
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors
(RET)
14 September 2018
Product data sheet
1. General description
NPN/NPN Resistor-Equipped double Transistors (RET) in an ultra small DFN1412-6 (SOT1268)
leadless Surface-Mounted Device (SMD) plastic package.
NPN/PNP complement: PRMD13.
2. Features and benefits
•
•
•
•
•
•
•
100 mA output current capability
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
Low package height of 0.5 mm
AEC-Q101 qualified
3. Applications
•
•
•
•
Digital applications
Cost-saving alternative to BC847/BC857 series in digital applications
Control of IC inputs
Switching loads
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
open base
-
-
50
V
-
-
100
mA
100
-
-
[1]
3.3
4.7
6.1
[1]
8
10
12
Per transistor
VCEO
collector-emitter
voltage
IO
output current
hFE
DC current gain
VCE = 5 V; IC = 10 mA; Tamb = 25 °C
R1
bias resistor 1
Tamb = 25 °C
R2/R1
bias resistor ratio
[1]
See section "Test information" for resistor calculation and test conditions.
kΩ
PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
1
GND1
Simplified outline
Graphic symbol
GND (emitter) TR1
6
1
2
I1
input (base) TR1
3
O2
output (collector) TR2
4
GND2
GND (emitter) TR2
5
I2
input (base) TR2
6
O1
output (collector) TR1
7
O1
output (collector) TR1
8
O2
output (collector) TR2
7
2
8
4
R1
5
3
5
6
4
R2
TR2
TR1
R2
R1
Transparent top view
DFN1412-6
(SOT1268)
1
2
3
sym063
6. Ordering information
Table 3. Ordering information
Type number
Package
PRMH13
Name
Description
Version
DFN1412-6
plastic thermal enhanced ultra thin small outline package; no
leads; 6 terminals; body: 1.4 mm x 1.2 mm x 0.47 mm
SOT1268
7. Marking
Table 4. Marking codes
Type number
Marking code
PRMH13
C4
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
5
V
VI
input voltage
positive
-
30
V
negative
-
-5
V
-
100
mA
Per transistor
IO
output current
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
-
325
mW
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
-
480
mW
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
-55
150
°C
Tstg
storage temperature
-65
150
°C
Per device
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
aaa-024487
500
Ptot
(mW)
400
300
200
100
0
-75
-25
25
75
125
175
Tamb (°C)
FR4 PCB, standard footprint
Fig. 1.
Per device: Power derating curve
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1]
-
-
385
K/W
thermal resistance from in free air
junction to ambient
[1]
-
-
261
K/W
Per device
Rth(j-a)
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
aaa-024488
103
duty cycle = 1
Zth(j-a)
(K/W)
0.75
102
0.33
0.5
0.2
0.1
0.05
10
0.02
0.01
0
1
10-5
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
FR4 PCB, standard footprint
Fig. 2.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C
current
VCE = 30 V; IB = 0 A; Tj = 150 °C
-
-
1
µA
-
-
5
µA
ICBO
collector-base cut-off
current
VCB = 50 V; IE = 0 A; Tamb = 25 °C
-
-
100
nA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A; Tamb = 25 °C
-
-
170
µA
hFE
DC current gain
VCE = 5 V; IC = 10 mA; Tamb = 25 °C
100
-
-
VCEsat
collector-emitter
saturation voltage
IC = 5 mA; IB = 0.25 mA; Tamb = 25 °C
-
-
100
mV
VI(off)
off-state input voltage
VCE = 5 V; IC = 100 µA; Tamb = 25 °C
-
0.6
0.5
V
VI(on)
on-state input voltage
VCE = 0.3 V; IC = 5 mA; Tamb = 25 °C
R1
bias resistor 1
Tamb = 25 °C
R2/R1
bias resistor ratio
CC
collector capacitance
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;
Tamb = 25 °C
fT
transition frequency
VCE = 5 V; IC = 10 mA; f = 100 MHz;
Tamb = 25 °C
Per transistor
ICEO
[1]
[2]
1.3
0.9
-
V
[1]
3.3
4.7
6.1
kΩ
[1]
8
10
12
-
-
2.5
pF
-
230
-
MHz
[2]
See section "Test information" for resistor calculation and test conditions.
Characteristics of built-in transistor
006aac819
103
aaa-018581
0.1
hFE
(1)
0.63 mA
0.56 mA
0.70 mA
IC
(A)
0.08
(2)
0.49 mA
0.42 mA
(3)
102
0.35 mA
0.06
0.28 mA
0.21 mA
0.04
10
0.14 mA
0.02
IB = 0.07 mA
1
10-1
1
10
IC (mA)
0
102
VCE = 5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 3.
0
1
2
3
4
VCE (V)
5
Tamb = 25 °C
Fig. 4.
Collector current as a function of collectoremitter voltage; typical values
DC current gain as a function of collector
current; typical values
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
aaa-018585
1
006aac821
10
VCEsat
(V)
VI(on)
(V)
(1)
10-1
1
(2)
(3)
(1)
(2)
(3)
10-2
10-1
1
10
IC (mA)
10-1
10-1
102
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 5.
1
10
IC (mA)
102
VCE = 0.3 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Collector-emitter saturation voltage as a
function of collector current; typical values
Fig. 6.
006aac822
10
On-state input voltage as a function of collector
current; typical values
006aac823
3
Cc
(pF)
VI(off)
(V)
2
1
(1)
(2)
(3)
10-1
10-1
1
1
IC (mA)
0
10
VCE = 5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 7.
0
10
20
30
40
50
VCB (V)
f = 1 MHz; Tamb = 25 °C
Fig. 8.
Collector capacitance as a function of collectorbase voltage; typical values
Off-state input voltage as a function of collector
current; typical values
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
006aac757
103
fT
(MHz)
102
10
10-1
1
10
IC (mA)
102
VCE = 5 V; Tamb = 25 °C
Fig. 9.
Transition frequency as a function of collector current; typical values of built-in transistor
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
11. Test information
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
Resistor calculation
•
Calculation of bias resistor 1 (R1)
•
Calculation of bias resistor ratio (R2/R1)
n.c.
II1; II2
R1
II3; II4
R2
GND
aaa-020082
Fig. 10. Per transistor: Resistor test circuit
Resistor test conditions
Table 8. Resistor test conditions
R1 (kΩ)
4.7
PRMH13
Product data sheet
R2 (kΩ)
47
Test conditions
II1
II2
II3
II4
90 μA
140 μA
-55 μA
-105 μA
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
12. Package outline
DFN1412-6: plastic thermal enhanced ultra thin small outline package; no leads;
6 terminals; body: 1.4 x 1.2 x 0.47 mm
SOT1268
(2×)
E
B
A
pin 1
index area
A
D
A1
T
(6×)
detail X
C
E1
(2×)
Y1 C
L
(6×)
4
3
e
e1
2
5
b
(6×)
e1
D1
(2×)
1
e
6
V C A B
pin 1
index area
0
mm
A
A1
b
D
D1
X
1 mm
scale
Dimensions (mm are the original dimensions)
Unit(1)
Y
E
E1
min 0.44 0.00 0.15 1.35 0.43 1.15 0.32
nom 0.47
0.20 1.40 0.48 1.20 0.37
max 0.50 0.04 0.25 1.45 0.53 1.25 0.42
e
e1
L
T
V
0.5
0.35
0.145
0.195
0.245
0.10
0.16
0.22
0.1
Y
Y1
0.05 0.05
Note
1. Dimension A is including plating thickness.
Outline
version
SOT1268
sot1268_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
18-08-23
18-09-11
---
Fig. 11. Package outline DFN1412-6 (SOT1268)
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
13. Soldering
Footprint information for reflow soldering of DFN1412-6 package
SOT1268
1.6
1.4
1.3
0.3
0.2
0.25
0.5
0.3
0.35
0.27 0.37
1.71 1.51 1.41 0.71
0.17
0.43
0.17
1.23
occupied area
solder resist
solder lands
solder paste
Dimensions in mm
Issue date
16-04-18
16-09-02
sot1268_fr
Fig. 12. Reflow soldering footprint for DFN1412-6 (SOT1268)
PRMH13
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
14. Revision history
Table 9. Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PRMH13 v.2
20180914
Product data sheet
-
PRMH13 v.1
Modifications:
•
PRMH13 v.1
20170808
PRMH13
Product data sheet
Package outline drawing updated: Unit T added
Product data sheet
-
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PRMH13
Nexperia
50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
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Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
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Customers are responsible for the design and operation of their applications
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and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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sold subject to the general terms and conditions of commercial sale, as
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Notice: All referenced brands, product names, service names and
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Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
PRMH13
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50 V, 100 mA NPN/NPN Resistor-Equipped double Transistors (RET)
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................ 5
11. Test information.......................................................... 8
12. Package outline.......................................................... 9
13. Soldering................................................................... 10
14. Revision history........................................................11
15. Legal information......................................................12
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Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 14 September 2018
PRMH13
Product data sheet
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