74AHCT32D-Q100J

74AHC32-Q100; 74AHCT32-Q100 Quad 2-input OR gate Rev. 1 — 26 March 2013 Product data sheet 1. General description The 74AHC32-Q100; 74AHCT32-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC32-Q100; 74AHCT32-Q100 provides the 2-input OR function. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Balanced propagation delays  All inputs have Schmitt-trigger actions  Inputs accept voltages higher than VCC  Input levels:  For 74AHC32-Q100: CMOS level  For 74AHCT32-Q100: TTL level  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  Multiple package options 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC32D-Q100 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74AHC32PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74AHC32BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm SOT762-1 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74AHCT32PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74AHCT32BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm 74AHC32-Q100 74AHCT32-Q100 74AHCT32D-Q100 SOT762-1 4. Functional diagram 1 ≥1 3 ≥1 6 ≥1 8 ≥1 11 2 4 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B 1Y 3 5 2Y 6 9 10 3Y 8 4Y 11 12 13 mna243 mna242 Fig 1. Logic symbol Fig 2. IEC logic symbol A Y B Fig 3. mna241 Logic diagram (one gate) 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 2 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate 5. Pinning information 5.1 Pinning $ WHUPLQDO LQGH[DUHD  9&& $+&74 $+&74   9&& %   % %   % <   $ <   $ $   < $  %  <   $   $ *1'   <  %   < <  %   *1' %  < *1' $ DDD 7UDQVSDUHQWWRSYLHZ DDD (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A 1 data input 1B 2 data input 1Y 3 data output 2A 4 data input 2B 5 data input 2Y 6 data output GND 7 ground (0 V) 3Y 8 data output 3A 9 data input 3B 10 data input 4Y 11 data output 4A 12 data input 4B 13 data input VCC 14 supply voltage 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 3 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate 6. Functional description Table 3. Function table[1] Input Output nA nB nY L L L X H H H X H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage IIK input clamping current VI < 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current VO = 0.5 V to (VCC + 0.5 V) ICC supply current - +75 mA IGND ground current 75 - mA Tstg storage temperature 65 +150 C - 500 mW total power dissipation Ptot Conditions Tamb = 40 C to +125 C [2] Min Max Unit 0.5 +7.0 V 0.5 +7.0 V 20 - mA 20 +20 mA 25 +25 mA [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO14 packages: above 70 C the value of Ptot derates linearly at 8 mW/K. For TSSOP14 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN14 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K. 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter Conditions Min Typ Max Unit 2.0 5.0 5.5 V 74AHC32-Q100 VCC supply voltage VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.5 V - - 20 ns/V 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 4 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate Table 5. Operating conditions …continued Symbol Parameter Conditions Min Typ Max Unit 74AHCT32-Q100 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C t/V input transition rise and fall rate - - 20 ns/V VCC = 4.5 V to 5.5 V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74AHC32-Q100 VIH VIL VOH VOL HIGH-level input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V LOW-level input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V HIGH-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V 3.94 - - 3.80 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 2.0 - 20 - 40 A CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF 74AHC_AHCT32_Q100 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V VI = VCC or GND All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 5 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74AHCT32-Q100 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.80 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A IO = 8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A IO = 8.0 mA II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 2.0 - 20 - 40 A ICC additional per input pin; supply current VI = VCC  2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF VI = VCC or GND 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max CL = 15 pF - 3.9 7.9 1.0 9.5 1.0 10.0 ns CL = 50 pF - 5.6 11.4 1.0 13 1.0 14.5 ns - 2.8 5.5 1.0 6.5 1.0 7.0 ns - 4.1 7.5 1.0 8.5 1.0 9.5 ns - 10 - - - - - pF 74AHC32-Q100 tpd [2] propagation nA, nB to nY; see Figure 6 delay VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation capacitance 74AHC_AHCT32_Q100 Product data sheet [3] All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 6 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max - 3.1 6.9 1.0 8.0 1.0 9.0 ns - 4.3 7.9 1.0 9.0 1.0 10.0 ns - 12 - - - - - pF 74AHCT32-Q100; VCC = 4.5 V to 5.5 V [2] propagation nA, nB to nY; see Figure 6 delay CL = 15 pF tpd CL = 50 pF power fi = 1 MHz; VI = GND to VCC dissipation capacitance CPD [3] [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of the outputs. 11. Waveforms VI VM nA, nB input GND t PHL t PLH VOH VM nY output VOL mna224 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Table 8. Input to output propagation delays Measurement points Type Input Output VM VM 74AHC32-Q100 0.5  VCC 0.5  VCC 74AHCT32-Q100 1.5 V 0.5  VCC 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 7 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate VI negative pulse tW 90 % VM VM 10 % GND tr tf tr tf VI 90 % positive pulse GND VM VM 10 % tW VCC G VI VO DUT RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig 7. Table 9. Test circuit for measuring switching times Test data Type Input Load Test VI tr, tf CL 74AHC32-Q100 VCC  3.0 ns 15 pF, 50 pF tPLH, tPHL 74AHCT32-Q100 3.0 V  3.0 ns 15 pF, 50 pF tPLH, tPHL 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 8 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate 12. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 8. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT108-1 (SO14) 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 9 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 Fig 9. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Package outline SOT402-1 (TSSOP14) 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 10 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 11 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MIL Military MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT32_Q100 v.1 20130326 Product data sheet - - 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 12 of 15 74AHC32-Q100; 74AHCT32-Q100 Nexperia Quad 2-input OR gate 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74AHC_AHCT32_Q100 Product data sheet Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 13 of 15 Nexperia 74AHC32-Q100; 74AHCT32-Q100 Quad 2-input OR gate No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74AHC_AHCT32_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 26 March 2013 © Nexperia B.V. 2017. All rights reserved 14 of 15 Nexperia 74AHC32-Q100; 74AHCT32-Q100 Quad 2-input OR gate 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 26 March 2013 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74AHCT32D-Q100J 74AHCT32BQ-Q100X 74AHC32D-Q100J 74AHC32PW-Q100J 74AHC32BQ-Q100X 74AHCT32PW-Q100J