74AUP1G58GM,115

74AUP1G58 Low-power configurable multiple function gate Rev. 7 — 17 September 2015 Product data sheet 1. General description The 74AUP1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G58 has Schmitt trigger inputs making it capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT is defined as the input hysteresis voltage VH. 2. Features and benefits  Wide supply voltage range from 0.8 V to 3.6 V  High noise immunity  ESD protection:  HBM JESD22-A114F exceeds 5000 V  MM JESD22-A115-A exceeds 200 V  CDM JESD22-C101E exceeds 1000 V  Low static power consumption; ICC = 0.9 A (maximum)  Latch-up performance exceeds 100 mA per JESD 78 Class II  Inputs accept voltages up to 3.6 V  Low noise overshoot and undershoot < 10 % of VCC  IOFF circuitry provides partial power-down mode operation  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C 74AUP1G58 Nexperia Low-power configurable multiple function gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G58GW 40 C to +125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP1G58GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1  1.45  0.5 mm 74AUP1G58GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1  1  0.5 mm 74AUP1G58GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9  1.0  0.35 mm SOT1115 74AUP1G58GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0  1.0  0.35 mm SOT1202 74AUP1G58GX 40 C to +125 C X2SON6 plastic thermal extremely thin small outline package; no leads; 6 terminals; body 1  0.8  0.35 mm SOT1255 4. Marking Table 2. Marking Type number Marking code[1] 74AUP1G58GW aK 74AUP1G58GM aK 74AUP1G58GF aK 74AUP1G58GN aK 74AUP1G58GS aK 74AUP1G58GX aK [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram $   % & Fig 1.  <  DDE Logic symbol 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 2 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate 6. Pinning information 6.1 Pinning $83* $83* %   & *1'   9&& $   %   & *1'   9&& $   < < DDG 7UDQVSDUHQWWRSYLHZ DDG Fig 2. Pin configuration SOT363 Fig 3. Pin configuration SOT886 $83* $83* %  %   & *1'   9&& $   < *1' &    $ DDG  < DDD 7UDQVSDUHQWWRSYLHZ 7UDQVSDUHQWWRSYLHZ Fig 4. 9&&  Pin configuration SOT891, SOT1115 and SOT1202 Fig 5. Pin configuration SOT1255 (X2SON6) 6.2 Pin description Table 3. Pin description Symbol Pin Description B 1 data input GND 2 ground (0 V) A 3 data input Y 4 data output VCC 5 supply voltage C 6 data input 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 3 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate 7. Functional description Function table[1] Table 4. Input Output C B A Y L L L L L L H H L H L L L H H H H L L H H L H H H H L L H H H L [1] H = HIGH voltage level; L = LOW voltage level. 7.1 Logic configurations Table 5. Function selection table Logic function Figure 2-input NAND see Figure 6 2-input NAND with both inputs inverted see Figure 9 2-input AND with inverted input see Figure 7 and Figure 8 2-input NOR with inverted input see Figure 7 and Figure 8 2-input OR see Figure 9 2-input OR with both inputs inverted see Figure 6 2-input XOR see Figure 10 Buffer see Figure 11 Inverter see Figure 12 9&& % & % & < < %       9&& % & & < % & < < %       DDE Fig 6. 2-input NAND gate or 2-input OR with both inputs inverted 74AUP1G58 Product data sheet & < DDE Fig 7. 2-input AND gate with inverted B input or 2-input NOR gate with inverted C input All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 4 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate 9&& 9&& $ & < $ & $ <       $ & & < < $ & $ <       DDE Fig 8. & < DDE 2-input AND gate with inverted C input or 2-input NOR gate with inverted A input Fig 9. 2-input OR gate or 2-input NAND gate with both inputs inverted 9&& 9&& % % & <       & $ < $ <       < DDE DDE Fig 10. 2-input XOR gate Fig 11. Buffer 9&& % % <       < DDE Fig 12. Inverter 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current Conditions VI < 0 V [1] VO < 0 V VO output voltage Active mode and Power-down mode IO output current VO = 0 V to VCC ICC supply current 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 [1] Min Max Unit 0.5 +4.6 V 50 - 0.5 +4.6 50 - 0.5 +4.6 - 20 mA - 50 mA © mA V mA V Nexperia B.V. 2017. All rights reserved 5 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate Table 6. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter IGND ground current Tstg storage temperature Conditions Tamb = 40 C to +125 C total power dissipation Ptot Min Max Unit 50 - mA 65 +150 C - 250 mW [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SC-88 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For X2SON6 and XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 7. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Conditions Max Unit 0.8 3.6 V 0 3.6 V Active mode 0 VCC V Power-down mode; VCC = 0 V 0 3.6 V 40 +125 C ambient temperature Tamb Min 10. Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IO = 20 A; VCC = 0.8 V to 3.6 V VCC  0.1 - - V IO = 1.1 mA; VCC = 1.1 V 0.75  VCC - - V IO = 1.7 mA; VCC = 1.4 V 1.11 - - V IO = 1.9 mA; VCC = 1.65 V 1.32 - - V IO = 2.3 mA; VCC = 2.3 V 2.05 - - V Tamb = 25 C VOH VOL HIGH-level output voltage LOW-level output voltage 74AUP1G58 Product data sheet VI = VT+ or VT IO = 3.1 mA; VCC = 2.3 V 1.9 - - V IO = 2.7 mA; VCC = 3.0 V 2.72 - - V IO = 4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V VI = VT+ or VT All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 0.3  VCC V © Nexperia B.V. 2017. All rights reserved 6 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - 0.1 A IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.2 A IOFF additional power-off leakage VI or VO = 0 V to 3.6 V; current VCC = 0 V to 0.2 V - - 0.2 A ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 A ICC additional supply current VI = VCC  0.6 V; IO = 0 A; VCC = 3.3 V - - 40 A CI input capacitance VI = GND or VCC; VCC = 0 V to 3.6 V - 1.1 - pF CO output capacitance VO = GND; VCC = 0 V - 1.8 - pF IO = 20 A; VCC = 0.8 V to 3.6 V VCC  0.1 - - V IO = 1.1 mA; VCC = 1.1 V 0.7  VCC - - V Tamb = 40 C to +85 C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VT+ or VT IO = 1.7 mA; VCC = 1.4 V 1.03 - - V IO = 1.9 mA; VCC = 1.65 V 1.30 - - V IO = 2.3 mA; VCC = 2.3 V 1.97 - - V IO = 3.1 mA; VCC = 2.3 V 1.85 - - V IO = 2.7 mA; VCC = 3.0 V 2.67 - - V IO = 4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.1 V VI = VT+ or VT 0.3  VCC V IO = 1.1 mA; VCC = 1.1 V - - IO = 1.7 mA; VCC = 1.4 V - - 0.37 V IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V - - 0.5 A II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V IOFF power-off leakage current - - 0.5 A IOFF additional power-off leakage VI or VO = 0 V to 3.6 V; current VCC = 0 V to 0.2 V - - 0.6 A ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 A ICC additional supply current VI = VCC  0.6 V; IO = 0 A; VCC = 3.3 V - - 50 A 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 7 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IO = 20 A; VCC = 0.8 V to 3.6 V VCC  0.11 - - V IO = 1.1 mA; VCC = 1.1 V 0.6  VCC - - V IO = 1.7 mA; VCC = 1.4 V 0.93 - - V IO = 1.9 mA; VCC = 1.65 V 1.17 - - V Tamb = 40 C to +125 C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VT+ or VT IO = 2.3 mA; VCC = 2.3 V 1.77 - - V IO = 3.1 mA; VCC = 2.3 V 1.67 - - V IO = 2.7 mA; VCC = 3.0 V 2.40 - - V IO = 4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 A; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - IO = 1.7 mA; VCC = 1.4 V - - 0.41 V VI = VT+ or VT 0.33  VCC V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V - - 0.50 V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V IO = 4.0 mA; VCC = 3.0 V - - 0.75 A IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - 0.75 A IOFF additional power-off leakage VI or VO = 0 V to 3.6 V; current VCC = 0 V to 0.2 V - - 0.75 A ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 A ICC additional supply current VI = VCC  0.6 V; IO = 0 A; VCC = 3.3 V - - 75 A 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 8 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 14. Symbol Parameter 25 C Conditions Min Typ[1] 40 C to +125 C Max Min Unit Max Max (85 C) (125 C) CL = 5 pF tpd propagation delay [2] A, B and C to Y; see Figure 13 VCC = 0.8 V - 22.8 - - - - ns VCC = 1.1 V to 1.3 V 2.8 6.6 12.9 2.6 13.1 13.3 ns VCC = 1.4 V to 1.6 V 2.4 4.8 7.6 2.4 8.3 8.6 ns VCC = 1.65 V to 1.95 V 2.1 4.0 6.3 2.0 6.9 7.3 ns VCC = 2.3 V to 2.7 V 2.0 3.2 4.6 1.8 5.1 5.4 ns VCC = 3.0 V to 3.6 V 1.9 2.9 3.9 1.6 4.2 4.4 ns - 26.4 - - - - ns VCC = 1.1 V to 1.3 V 3.2 7.4 14.5 3.0 14.9 15.2 ns VCC = 1.4 V to 1.6 V 2.7 5.4 8.7 2.7 9.4 9.8 ns CL = 10 pF tpd propagation delay [2] A, B and C to Y; see Figure 13 VCC = 0.8 V VCC = 1.65 V to 1.95 V 2.5 4.5 7.1 2.3 7.9 8.3 ns VCC = 2.3 V to 2.7 V 2.4 3.8 5.3 2.2 5.9 6.2 ns VCC = 3.0 V to 3.6 V 2.3 3.5 4.6 1.9 4.9 5.1 ns - 29.9 - - - - ns VCC = 1.1 V to 1.3 V 3.6 8.3 16.1 3.3 16.7 17.0 ns VCC = 1.4 V to 1.6 V 3.0 5.9 9.7 3.0 10.5 11.0 ns VCC = 1.65 V to 1.95 V 2.8 5.0 7.9 2.5 8.7 9.2 ns VCC = 2.3 V to 2.7 V 2.7 4.2 5.9 2.5 6.6 6.9 ns VCC = 3.0 V to 3.6 V 2.5 3.9 5.2 2.2 5.5 5.8 ns CL = 15 pF tpd propagation delay [2] A, B and C to Y; see Figure 13 VCC = 0.8 V 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 9 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 14. Symbol Parameter 25 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min - 38.0 - - VCC = 1.1 V to 1.3 V 4.5 10.5 20.8 4.1 21.9 24.1 ns VCC = 1.4 V to 1.6 V 3.8 7.5 12.2 3.8 13.5 14.1 ns VCC = 1.65 V to 1.95 V 3.4 6.3 10.0 3.1 11.2 11.9 ns VCC = 2.3 V to 2.7 V 3.4 5.3 7.5 3.1 8.4 8.9 ns VCC = 3.0 V to 3.6 V 3.3 5.0 6.6 2.9 7.1 7.4 ns VCC = 0.8 V - 2.7 - - - - pF Max Max (85 C) (125 C) CL = 30 pF propagation delay tpd [2] A, B and C to Y; see Figure 13 VCC = 0.8 V - - ns CL = 5 pF, 10 pF, 15 pF and 30 pF power dissipation capacitance CPD fi = 1 MHz; VI = GND to VCC [3][4] VCC = 1.1 V to 1.3 V - 2.8 - - - - pF VCC = 1.4 V to 1.6 V - 3.0 - - - - pF VCC = 1.65 V to 1.95 V - 3.2 - - - - pF VCC = 2.3 V to 2.7 V - 3.8 - - - - pF VCC = 3.0 V to 3.6 V - 4.4 - - - - pF [1] All typical values are measured at nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] All specified values are the average typical values over all stated loads. [4] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of the outputs. 74AUP1G58 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 17 September 2015 © Nexperia B.V. 2017. All rights reserved 10 of 24 74AUP1G58 Nexperia Low-power configurable multiple function gate 12. Waveforms 9, $%&LQSXW 90 90 *1' W 3+/ W 3/+ 92+ 90