74AUP1T98GM,115

74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 5 — 5 October 2018 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T98 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply voltage. The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire VCC range. 2. Features and benefits • • • • • • • • • • Wide supply voltage range from 2.3 V to 3.6 V High noise immunity ESD protection: • HBM JESD22-A114F Class 3A exceeds 5000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101E exceeds 1000 V Low static power consumption; ICC = 1.5 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1T98GW -40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP1T98GM -40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 x 1.45 x 0.5 mm 74AUP1T98GF -40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1 x 1 x 0.5 mm 74AUP1T98GN -40 °C to +125 °C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm SOT1115 74AUP1T98GS -40 °C to +125 °C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm SOT1202 4. Marking Table 2. Marking Type number Marking code 74AUP1T98GW aR 74AUP1T98GM aR 74AUP1T98GF aR 74AUP1T98GN aR 74AUP1T98GS aR 5. Functional diagram A 3 4 B C Fig. 1. 1 Y 6 001aad987 Logic symbol 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 2 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 6. Pinning information 6.1. Pinning 74AUP1T98 74AUP1T98 B B 1 6 C GND 2 5 VCC A 3 4 6 2 5 VCC A 3 4 Y Y B 1 6 C GND 2 5 VCC A 3 4 Y 001aah841 001aah840 Transparent top view Pin configuration SOT363 74AUP1T98 C GND 001aah839 Fig. 2. 1 Fig. 3. Pin configuration SOT886 Transparent top view Fig. 4. Pin configuration SOT891, SOT1115 and SOT1202 6.2. Pin description Table 3. Pin description Symbol Pin Description B 1 data input GND 2 ground (0 V) A 3 data input Y 4 data output VCC 5 supply voltage C 6 data input 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Output Input C B A Y L L L H L L H H L H L L L H H L H L L H H L H L H H L H H H H L 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 3 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 7.1. Logic configurations Table 5. Function selection table Logic function Figure 2-input MUX (inverting) see Fig. 5 2-input NAND see Fig. 6 2-input NOR with one input inverted see Fig. 7 2-input AND with one input inverted see Fig. 7 2-input NAND with one input inverted see Fig. 8 2-input OR with one input inverted see Fig. 8 2-input NOR see Fig. 9 Buffer see Fig. 10 Inverter see Fig. 11 VCC B Y A C B A 1 6 2 5 3 4 VCC C A C Y Y A 1 6 2 5 3 4 001aad991 Fig. 5. C Y 001aad992 2-input MUX (inverting) Fig. 6. 2-input NAND gate VCC A C Y A C Y A 1 6 2 5 3 VCC C 4 Y B C Y B C Y B 1 6 2 5 3 4 001aad993 Fig. 7. C Y 001aad994 2-input AND gate with input A inverted or 2input NOR gate with input C inverted Fig. 8. 2-input OR gate with input B inverted or 2-input NAND gate with input C inverted VCC B B C Y 1 6 2 5 3 4 VCC C C Y Y 1 6 2 5 3 4 001aad995 Fig. 9. C Y 001aad996 2-input NOR gate Fig. 10. Buffer VCC B B Y 1 6 2 5 3 4 Y 001aad997 Fig. 11. Inverter 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 4 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC supply voltage -0.5 +4.6 V IIK input clamping current -50 - VI input voltage IOK output clamping current VO < 0 V -0.5 +4.6 -50 - VO output voltage Active mode and Power-down mode -0.5 +4.6 V IO output current VO = 0 V to VCC - ±20 mA ICC supply current - +50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW [1] [2] Conditions VI < 0 V [1] Tamb = -40 °C to +125 °C [1] [2] mA V mA The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 package: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 7. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC supply voltage 2.3 3.6 V VI input voltage 0 3.6 V VO output voltage 0 VCC V 0 3.6 V Tamb ambient temperature -40 +125 °C Active mode Power-down mode; VCC = 0 V 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 5 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 10. Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C VT+ positive-going threshold voltage VCC = 2.3 V to 2.7 V 0.60 - 1.10 V VCC = 3.0 V to 3.6 V 0.75 - 1.16 V VT- negative-going threshold voltage VCC = 2.3 V to 2.7 V 0.35 - 0.60 V VCC = 3.0 V to 3.6 V 0.50 - 0.85 V hysteresis voltage (VH = VT+ - VT-) VCC = 2.3 V to 2.7 V 0.23 - 0.60 V VCC = 3.0 V to 3.6 V 0.25 - 0.56 V VCC - 0.1 - - V IO = -2.3 mA; VCC = 2.3 V 2.05 - - V IO = -3.1 mA; VCC = 2.3 V 1.9 - - V IO = -2.7 mA; VCC = 3.0 V 2.72 - - V IO = -4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 μA; VCC = 2.3 V to 3.6 V - - 0.10 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V VH VOH HIGH-level output voltage VI = VT+ or VTIO = -20 μA; VCC = 2.3 V to 3.6 V VOL LOW-level output voltage VI = VT+ or VT- II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.1 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 2.3 V to 3.6 V - - 1.2 μA CI input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 0.8 - pF CO output capacitance VO = GND; VCC = 0 V - 1.7 - pF 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 6 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator Symbol Parameter Conditions Min Typ Max Unit Tamb = -40 °C to +85 °C VT+ positive-going threshold voltage VCC = 2.3 V to 2.7 V 0.60 - 1.10 V VCC = 3.0 V to 3.6 V 0.75 - 1.19 V VT- negative-going threshold voltage VCC = 2.3 V to 2.7 V 0.35 - 0.60 V VCC = 3.0 V to 3.6 V 0.50 - 0.85 V hysteresis voltage (VH = VT+ - VT-) VCC = 2.3 V to 2.7 V 0.10 - 0.60 V VCC = 3.0 V to 3.6 V 0.15 - 0.56 V VCC - 0.1 - - V IO = -2.3 mA; VCC = 2.3 V 1.97 - - V IO = -3.1 mA; VCC = 2.3 V 1.85 - - V IO = -2.7 mA; VCC = 3.0 V 2.67 - - V IO = -4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 μA; VCC = 2.3 V to 3.6 V - - 0.1 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V VH VOH HIGH-level output voltage VI = VT+ or VTIO = -20 μA; VCC = 2.3 V to 3.6 V VOL LOW-level output voltage VI = VT+ or VT- II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.5 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 2.3 V to 3.6 V - - 1.5 μA ΔICC additional supply current VCC = 2.3 V to 2.7 V; IO = 0 A [1] - - 4 μA VCC = 3.0 V to 3.6 V; IO = 0 A [2] - - 12 μA 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 7 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator Symbol Parameter Conditions Min Typ Max Unit Tamb = -40 °C to +125 °C VT+ positive-going threshold voltage VCC = 2.3 V to 2.7 V 0.60 - 1.10 V VCC = 3.0 V to 3.6 V 0.75 - 1.19 V VT- negative-going threshold voltage VCC = 2.3 V to 2.7 V 0.33 - 0.64 V VCC = 3.0 V to 3.6 V 0.46 - 0.85 V hysteresis voltage (VH = VT+ - VT-) VCC = 2.3 V to 2.7 V 0.10 - 0.60 V VCC = 3.0 V to 3.6 V 0.15 - 0.56 V VCC - 0.11 - - V IO = -2.3 mA; VCC = 2.3 V 1.77 - - V IO = -3.1 mA; VCC = 2.3 V 1.67 - - V IO = -2.7 mA; VCC = 3.0 V 2.40 - - V IO = -4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 μA; VCC = 2.3 V to 3.6 V - - 0.11 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V IO = 4.0 mA; VCC = 3.0 V - - 0.50 V VH VOH HIGH-level output voltage VI = VT+ or VTIO = -20 μA; VCC = 2.3 V to 3.6 V VOL LOW-level output voltage VI = VT+ or VT- II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 2.3 V to 3.6 V - - 3.5 μA ΔICC additional supply current VCC = 2.3 V to 2.7 V; IO = 0 A [1] - - 7 μA VCC = 3.0 V to 3.6 V; IO = 0 A [2] - - 22 μA [1] [2] One input at 0.3 V or 1.1 V, other input at VCC or GND. One input at 0.45 V or 1.2 V, other input at VCC or GND. 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 8 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 13. Symbol Parameter Conditions 25 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max (85 °C) Max (125 °C) CL = 5 pF 2.0 3.6 5.7 0.5 6.8 7.5 ns CL = 10 pF 2.5 4.2 6.3 1.0 7.9 8.7 ns CL = 15 pF 2.9 4.6 6.9 1.0 8.7 9.6 ns CL = 30 pF 3.9 5.8 8.3 1.5 10.8 11.9 ns CL = 5 pF 1.7 3.4 5.6 0.5 6.0 6.6 ns CL = 10 pF 2.1 4.0 6.3 1.0 7.1 7.9 ns CL = 15 pF 2.5 4.5 6.9 1.0 7.9 8.7 ns CL = 30 pF 3.4 5.6 8.4 1.5 10.0 11.0 ns CL = 5 pF 1.3 3.2 5.2 0.5 5.5 6.1 ns CL = 10 pF 1.8 3.7 5.9 1.0 6.5 7.2 ns CL = 15 pF 2.2 4.2 6.5 1.0 7.4 8.2 ns CL = 30 pF 3.1 5.4 7.9 1.5 9.5 10.5 ns CL = 5 pF 2.0 2.9 4.1 0.5 8.0 8.8 ns CL = 10 pF 2.4 3.5 4.8 1.0 8.5 9.4 ns CL = 15 pF 2.8 3.9 5.4 1.0 9.1 10.1 ns CL = 30 pF 3.6 5.1 6.9 1.5 9.8 10.8 ns CL = 5 pF 1.5 2.8 4.4 0.5 5.3 5.9 ns CL = 10 pF 2.0 3.4 5.1 1.0 6.1 6.8 ns CL = 15 pF 2.4 3.9 5.7 1.0 6.8 7.5 ns CL = 30 pF 3.4 5.0 7.2 1.5 8.5 9.4 ns CL = 5 pF 1.3 2.8 4.4 0.5 4.7 5.2 ns CL = 10 pF 1.7 3.3 5.2 1.0 5.7 6.3 ns CL = 15 pF 2.1 3.8 5.8 1.0 6.2 6.9 ns CL = 30 pF 3.1 5.0 7.2 1.5 7.8 8.6 ns VCC = 2.3 V to 2.7 V; VI = 1.65 V to 1.95 V tpd propagation delay A, B, C to Y; see Fig. 12 [2] VCC = 2.3 V to 2.7 V; VI = 2.3 V to 2.7 V tpd propagation delay A, B, C to Y; see Fig. 12 [2] VCC = 2.3 V to 2.7 V; VI = 3.0 V to 3.6 V tpd propagation delay A, B, C to Y; see Fig. 12 [2] VCC = 3.0 V to 3.6 V; VI = 1.65 V to 1.95 V tpd propagation delay A, B, C to Y; see Fig. 12 [2] VCC = 3.0 V to 3.6 V; VI = 2.3 V to 2.7 V tpd propagation delay A, B, C to Y; see Fig. 12 [2] VCC = 3.0 V to 3.6 V; VI = 3.0 V to 3.6 V tpd propagation delay A, B, C to Y; see Fig. 12 74AUP1T98 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 9 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator Symbol Parameter Conditions 25 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max (85 °C) Max (125 °C) VCC = 2.3 V to 2.7 V - 3.6 - - - - pF VCC = 3.0 V to 3.6 V - 4.3 - - - - pF Tamb = 25 °C CPD [1] [2] [3] power dissipation capacitance fi = 1 MHz; VI = GND to VCC [3] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL x VCC x fo) = sum of the outputs. 11.1. Waveforms and test circuits VI A, B, C input VM VM GND t PHL t PLH VOH VM Y output VM VOL t PLH t PHL VOH Y output VM VM VOL 001aab593 Measurement points are given in Table 10. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 12. Input A, B and C to output Y propagation delay times Table 10. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 2.3 V to 3.6 V 0.5 x VCC 0.5 x VI 1.65 V to 3.6 V ≤ 3.0 ns 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 10 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator VCC G VI DUT VEXT 5 kΩ VO RT CL RL 001aac521 Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 13. Test circuit for measuring switching times Table 11. Test data Supply voltage Load VCC CL RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 2.3 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ open GND 2 × VCC [1] VEXT For measuring enable and disable times RL = 5 kΩ. For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 11 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 12. Package outline Plastic surface-mounted package; 6 leads SOT363 D B E y A X HE 6 5 v M A 4 Q pin 1 index A 1 2 e1 A1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT363 JEITA EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 SC-88 Fig. 14. Package outline SOT363 (SC-88) 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 12 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator SOT886 XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm b 1 2 3 4x (2) L L1 e 6 5 e1 4 e1 6x A (2) A1 D E terminal 1 index area 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit mm max nom min A(1) 0.5 A1 b D E 0.04 0.25 1.50 1.05 0.20 1.45 1.00 0.17 1.40 0.95 e e1 0.6 0.5 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. Outline version SOT886 sot886_po References IEC JEDEC JEITA European projection Issue date 04-07-22 12-01-05 MO-252 Fig. 15. Package outline SOT886 (XSON6) 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 13 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 4 e1 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15 SOT891 Fig. 16. Package outline SOT891 (XSON6) 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 14 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm 1 SOT1115 b 3 2 (4×)(2) L L1 e 6 5 4 e1 e1 (6×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 max 0.35 0.04 0.20 0.95 1.05 nom 0.15 0.90 1.00 0.55 min 0.12 0.85 0.95 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1115_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-07 SOT1115 Fig. 17. Package outline SOT1115 (XSON6) 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 15 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm 1 SOT1202 b 3 2 (4×)(2) L L1 e 6 5 4 e1 e1 (6×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.05 1.05 0.35 0.40 nom 0.15 1.00 1.00 0.55 0.35 0.30 0.35 min 0.12 0.95 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1202_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-06 SOT1202 Fig. 18. Package outline SOT1202 (XSON6) 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 16 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 13. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP1T98 v.5 20181005 Product data sheet - 74AUP1T98 v.4 Modifications: • • 74AUP1T98 v.4 Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 20120815 Product data sheet - 74AUP1T98 v.3 Package outline drawing of SOT886 (Fig. 15) modified. 74AUP1T98 v.3 20111130 Product data sheet - 74AUP1T98 v.2 74AUP1T98 v.2 20101019 Product data sheet - 74AUP1T98 v.1 74AUP1T98 v.1 20080306 Product data sheet - - 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 17 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. 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However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74AUP1T98 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 18 / 19 74AUP1T98 Nexperia Low-power configurable gate with voltage-level translator Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 7.1. Logic configurations.....................................................4 8. Limiting values............................................................. 5 9. Recommended operating conditions..........................5 10. Static characteristics..................................................6 11. Dynamic characteristics.............................................9 11.1. Waveforms and test circuits.....................................10 12. Package outline........................................................ 12 13. Abbreviations............................................................ 17 14. Revision history........................................................17 15. Legal information......................................................18 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 5 October 2018 74AUP1T98 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 5 October 2018 © Nexperia B.V. 2018. All rights reserved 19 / 19 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74AUP1T98GF,132 74AUP1T98GM,115 74AUP1T98GM,132 74AUP1T98GW,125 74AUP1T98GN,132 74AUP1T98GS,132