74LVC1G04GV-Q100H

74LVC1G04-Q100 Single inverter Rev. 2 — 7 December 2016 Product data sheet 1. General description The 74LVC1G04-Q100 provides one inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Wide supply voltage range from 1.65 V to 5.5 V  5 V tolerant inputs for interfacing with 5 V logic  High noise immunity  Complies with JEDEC standard:  JESD8-7 (1.65 V to 1.95 V)  JESD8-5 (2.3 V to 2.7 V)  JESD8-B/JESD36 (2.7 V to 3.6 V)  24 mA output drive (VCC = 3.0 V)  CMOS low power consumption  Latch-up performance exceeds 250 mA  Direct interface with TTL levels  Inputs accept voltages up to 5 V  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 74LVC1G04-Q100 Nexperia Single inverter 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G04GW-Q100 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 74LVC1G04GV-Q100 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 4. Marking Table 2. Marking Type number Marking code[1] 74LVC1G04GW-Q100 VC 74LVC1G04GV-Q100 V04 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram  $ <     < $ PQD Fig 1. Logic symbol PQD PQD Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning /9&*4 QF  $  *1'   9&&  < DDD Fig 4. Pin configuration SOT353-1 and SOT753 74LVC1G04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 7 December 2016 © Nexperia B.V. 2017. All rights reserved 2 of 13 74LVC1G04-Q100 Nexperia Single inverter 6.2 Pin description Table 3. Pin description Symbol Pin Description n.c. 1 not connected A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table[1] Input Output A Y L H H L [1] H = HIGH voltage level; L = LOW voltage level 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current output voltage VO IO output current ICC supply current IGND ground current Ptot total power dissipation Tstg storage temperature Conditions VI < 0 V [1] Min Max Unit 0.5 +6.5 V 50 - 0.5 +6.5 V mA - 50 Active mode [1][2] 0.5 VCC + 0.5 V Power-down mode [1][2] 0.5 +6.5 V - 50 mA - 100 mA 100 - mA - 250 mW 65 +150 C VO > VCC or VO < 0 V VO = 0 to VCC Tamb = 40 C to +125 C [3] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. [3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. 74LVC1G04_Q100 Product data sheet mA All information provided in this document is subject to legal disclaimers. Rev. 2 — 7 December 2016 © Nexperia B.V. 2017. All rights reserved 3 of 13 74LVC1G04-Q100 Nexperia Single inverter 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Conditions Tamb ambient temperature t/V input transition rise and fall rate Min Typ Max Unit 1.65 - 5.5 V 0 - 5.5 V Active mode 0 - VCC VO VCC = 0 V; Power-down mode 0 - 5.5 VO 40 - +125 C VCC = 1.65 V to 2.7 V - - 20 ns/V VCC = 2.7 V to 5.5 V - - 10 ns/V Min Typ[1] Max 0.65  VCC - - V 10. Static characteristics Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Unit Tamb = 40 C to +85 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7  VCC - - V VCC = 1.65 V to 1.95 V - - VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3  VCC V VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V VOL LOW-level output voltage VCC  0.1 - - V IO = 4 mA; VCC = 1.65 V 1.2 - - V IO = 8 mA; VCC = 2.3 V 1.9 - - V IO = 12 mA; VCC = 2.7 V 2.2 - - V IO = 24 mA; VCC = 3.0 V 2.3 - - V IO = 32 mA; VCC = 4.5 V 3.8 - - V - - 0.1 V VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V 74LVC1G04_Q100 Product data sheet 0.35  VCC V IO = 4 mA; VCC = 1.65 V - - 0.45 V IO = 8 mA; VCC = 2.3 V - - 0.3 V IO = 12 mA; VCC = 2.7 V - - 0.4 V IO = 24 mA; VCC = 3.0 V - - 0.55 V IO = 32 mA; VCC = 4.5 V - - 0.55 V All information provided in this document is subject to legal disclaimers. Rev. 2 — 7 December 2016 © Nexperia B.V. 2017. All rights reserved 4 of 13 74LVC1G04-Q100 Nexperia Single inverter Table 7. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Min Typ[1] Max VCC = 0 V to 5.5 V; VI = 5.5 V or GND - 0.1 1 A power-off leakage current VCC = 0 V; VI or VO = 5.5 V - 0.1 2 A ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A - 0.1 4 A ICC additional supply current per pin; VCC = 2.3 V to 5.5 V; VI = VCC  0.6 V; IO = 0 A - 5 500 A CI input capacitance VCC = 3.3 V; VI = GND to VCC - 5 - pF 0.65  VCC - - V 1.7 - - V Symbol Parameter Conditions II input leakage current IOFF Unit Tamb = 40 C to +125 C HIGH-level input voltage VIH VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V LOW-level input voltage VIL VOH HIGH-level output voltage VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7  VCC - - V VCC = 1.65 V to 1.95 V - - VCC = 2.3 V to 2.7 V - - VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3  VCC V VCC  0.1 - - V IO = 4 mA; VCC = 1.65 V 0.95 - - V IO = 8 mA; VCC = 2.3 V 1.7 - - V IO = 12 mA; VCC = 2.7 V 1.9 - - V IO = 24 mA; VCC = 3.0 V 2.0 - - V LOW-level output voltage IO = 32 mA; VCC = 4.5 V 3.4 - - V IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.80 V 0.7 V VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V VOL 0.35  VCC V VI = VIH or VIL II input leakage current VCC = 0 V to 5.5 V; VI = 5.5 V or GND - - 1 A IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - - 2 A ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A - - 4 A ICC additional supply current per pin; VCC = 2.3 V to 5.5 V; VI = VCC  0.6 V; IO = 0 A - - 500 A [1] All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 74LVC1G04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 7 December 2016 © Nexperia B.V. 2017. All rights reserved 5 of 13 74LVC1G04-Q100 Nexperia Single inverter 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6. Symbol Parameter 40 C to +85 C Conditions power dissipation capacitance CPD Unit Min Max Min Max VCC = 1.65 V to 1.95 V 1.0 3.0 7.5 1.0 9.5 ns VCC = 2.3 V to 2.7 V 0.5 2.0 5.0 0.5 6.5 ns VCC = 2.7 V 0.5 2.3 5.2 0.5 7.0 ns VCC = 3.0 V to 3.6 V 0.5 2.0 4.2 0.5 5.5 ns VCC = 4.5 V to 5.5 V 0.5 1.6 3.7 0.5 5.0 ns - 14 - - - pF [2] propagation delay A to Y; see Figure 5 tpd 40 C to +125 C Typ[1] [3] VI = GND to VCC; VCC = 3.3 V [1] Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 12. AC waveforms 9, 90 $LQSXW *1' W 3+/ W 3/+ 92+ 90