74LVC1G86-Q100
2-input EXCLUSIVE-OR gate
Rev. 3 — 7 March 2017
1
Product data sheet
General description
The 74LVC1G86-Q100 provides the 2-input EXCLUSIVE-OR function.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of
these devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial Power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2
Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
– Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
• Complies with JEDEC standard:
– JESD8-7 (1.65 V to 1.95 V)
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– MIL-STD-883, method 3015 exceeds 2000 V
– HBM JESD22-A114F exceeds 2 000 V
– MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• Latch-up performance exceeds 250 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
• Multiple package options
74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
3
Ordering information
Table 1. Ordering information
Type number
Package
Temperature
range
Name
74LVC1G86GW-Q100
-40 °C to +125 °C
TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74LVC1G86GV-Q100
-40 °C to +125 °C
SC-74A
SOT753
4
Description
Version
plastic surface-mounted package; 5 leads
Marking
Table 2. Marking codes
Type number
Marking
74LVC1G86GW-Q100
VH
74LVC1G86GV-Q100
V86
[1]
5
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Functional diagram
B
1
2
B
A
Y
1
4
=1
2
6
A
mna039
mna038
Figure 1. Logic symbol
Y
4
Figure 2. IEC logic symbol
mna040
Figure 3. Logic diagram
Pinning information
6.1 Pinning
74LVC1G86-Q100
B
1
A
2
GND
3
5
VCC
4
Y
aaa-009532
Figure 4. Pin configuration SOT353-1 and SOT753
74LVC1G86_Q100
Product data sheet
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2 / 13
74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
6.2 Pin description
Table 3. Pin description
Symbol
Pin
Description
B
1
data input
A
2
data input
GND
3
ground (0 V)
Y
4
data output
VCC
5
supply voltage
7
Functional description
Table 4. Function table
[1]
Output
Input
A
B
Y
L
L
L
L
H
H
H
L
H
H
H
L
[1]
H = HIGH voltage level;
L = LOW voltage level
8
Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO
output voltage
IO
output current
ICC
supply current
IGND
ground current
Ptot
total power dissipation
Tstg
storage temperature
[1]
[2]
[3]
Conditions
VI < 0 V
[1]
VO > VCC or VO < 0 V
Min
Max
Unit
-0.5
+6.5
V
-50
-
-0.5
+6.5
V
mA
mA
-
±50
Active mode
[1] [2]
-0.5
VCC + 0.5
V
Power-down mode
[1] [2]
-0.5
+6.5
V
-
±50
mA
-
+100
mA
-100
-
mA
-
250
mW
-65
+150
°C
VO = 0 V to VCC
Tamb = -40 °C to +125 °C
[3]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
74LVC1G86_Q100
Product data sheet
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3 / 13
74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
9
Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Conditions
Min
Typ
Max
1.65
-
5.5
V
0
-
5.5
V
Active mode
0
-
VCC
V
VCC = 0 V; Power-down mode
0
-
5.5
V
-40
-
+125
°C
-
-
20
ns/V
-
-
10
ns/V
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
Unit
10 Static characteristics
Table 7. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
Min
VIH
VIL
VOH
VOL
HIGH-level input
voltage
LOW-level input
voltage
HIGH-level
output voltage
VCC = 1.65 V to 1.95 V
Product data sheet
-40 °C to +125 °C Unit
Max
Min
Max
0.65VCC
-
-
0.65VCC
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
1.7
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
2.0
-
V
VCC = 4.5 V to 5.5 V
0.7VCC
-
-
0.7VCC
-
V
VCC = 1.65 V to 1.95 V
-
-
0.35VCC
-
0.35VCC
V
VCC = 2.3 V to 2.7 V
-
-
0.7
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
-
0.8
V
VCC = 4.5 V to 5.5 V
-
-
0.3VCC
-
0.3VCC
V
VCC - 0.1
-
-
VCC - 0.1
-
V
IO = -4 mA; VCC = 1.65 V
1.2
-
-
0.95
-
V
IO = -8 mA; VCC = 2.3 V
1.9
-
-
1.7
-
V
IO = -12 mA; VCC = 2.7 V
2.2
-
-
1.9
-
V
IO = -24 mA; VCC = 3.0 V
2.3
-
-
2.0
-
V
IO = -32 mA; VCC = 4.5 V
3.8
-
-
3.4
-
V
-
-
0.10
-
0.10
V
IO = 4 mA; VCC = 1.65 V
-
-
0.45
-
0.70
V
IO = 8 mA; VCC = 2.3 V
-
-
0.30
-
0.45
V
IO = 12 mA; VCC = 2.7 V
-
-
0.40
-
0.60
V
VI = VIH or VIL
IO = -100 μA;
VCC = 1.65 V to 5.5 V
LOW-level output VI = VIH or VIL
voltage
IO = 100 μA;
VCC = 1.65 V to 5.5 V
74LVC1G86_Q100
Typ
[1]
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
Symbol Parameter
Conditions
-40 °C to +85 °C
Min
Typ
[1]
-40 °C to +125 °C Unit
Max
Min
Max
IO = 24 mA; VCC = 3.0 V
-
-
0.55
-
0.80
V
IO = 32 mA; VCC = 4.5 V
-
-
0.55
-
0.80
V
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
-
±0.1
±1
-
±1
μA
IOFF
power-off
leakage current
VCC = 0 V; VI or VO = 5.5 V
-
±0.1
±2
-
±2
μA
ICC
supply current
VI = 5.5 V or GND; IO = 0 A;
VCC = 1.65 V to 5.5 V
-
0.1
4
-
4
μA
ΔICC
additional supply per pin; VCC = 2.3 V to 5.5 V;
current
VI = VCC - 0.6 V; IO = 0 A
-
5
500
-
500
μA
CI
input
capacitance
-
5
-
-
-
pF
[1]
VCC = 3.3 V; VI = GND to VCC
All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
11 Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter
Conditions
-40 °C to +85 °C
Min
tpd
propagation delay
A, B to Y; see Figure 5
[1]
[2]
[3]
power dissipation
capacitance
[1]
Max
Min
Max
[2]
VCC = 1.65 V to 1.95 V
1.0
3.7
9.9
1.0
13.0
ns
VCC = 2.3 V to 2.7 V
0.5
2.5
5.5
0.5
7.0
ns
VCC = 2.7 V
0.5
2.8
5.8
0.5
7.5
ns
VCC = 3.0 V to 3.6 V
0.5
2.3
5.0
0.5
6.5
ns
0.5
1.9
4.0
0.5
5.5
ns
-
25
-
-
-
pF
VCC = 4.5 V to 5.5 V
CPD
Typ
-40 °C to +125 °C Unit
[3]
VI = GND to VCC
VCC = 3.3 V
All typical values are measured at nominal VCC.
tpd is the same as tPLH and tPHL
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
Σ(CL × VCC × fo) = sum of the outputs.
74LVC1G86_Q100
Product data sheet
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
11.1 Waveforms and test circuit
A, B input
VM
tPHL
Y output
tPLH
VM
mna041
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output.
Figure 5. The input A and B to output Y propagation delay times
Table 9. Measurement points
Supply voltage
Input
Output
VCC
VM
VM
1.65 V to 1.95 V
0.5VCC
0.5VCC
2.3 V to 2.7 V
0.5VCC
0.5VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5VCC
0.5VCC
74LVC1G86_Q100
Product data sheet
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
VEXT
VCC
G
VI
RL
VO
DUT
RT
CL
RL
mna616
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
VEXT = External voltage for measuring switching times.
Figure 6. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
Input
VCC
VI
tr = tf
CL
RL
tPLH, tPHL
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 kΩ
open
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500 Ω
open
74LVC1G86_Q100
Product data sheet
VEXT
Load
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
12 Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
D
E
SOT353-1
A
X
c
y
HE
v M A
Z
5
4
A2
A
(A3)
A1
θ
1
Lp
3
e
e1
L
w M
bp
detail X
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
e1
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.1
0
1.0
0.8
0.15
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
0.65
1.3
2.25
2.0
0.425
0.46
0.21
0.3
0.1
0.1
0.60
0.15
7°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT353-1
REFERENCES
IEC
JEDEC
JEITA
MO-203
SC-88A
EUROPEAN
PROJECTION
ISSUE DATE
00-09-01
03-02-19
Figure 7. Package outline SOT353-1 (TSSOP5)
74LVC1G86_Q100
Product data sheet
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
y
A
X
HE
5
v M A
4
Q
A
A1
c
1
2
3
Lp
detail X
bp
e
w M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
c
D
E
e
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.100
0.013
0.40
0.25
0.26
0.10
3.1
2.7
1.7
1.3
0.95
3.0
2.5
0.6
0.2
0.33
0.23
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT753
JEITA
SC-74A
EUROPEAN
PROJECTION
ISSUE DATE
02-04-16
06-03-16
Figure 8. Package outline SOT753 (SC-74A)
74LVC1G86_Q100
Product data sheet
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
13 Abbreviations
Table 11. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
14 Revision history
Table 12. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LVC1G86_Q100 v.3
20170307
Product data sheet
-
74LVC1G86_Q100 v.2
Modifications:
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74LVC1G86_Q100 v.2
20161212
Modifications:
• Table 7: The maximum limits for leakage current and supply current have changed.
74LVC1G86_Q100 v.1
20131115
74LVC1G86_Q100
Product data sheet
Product data sheet
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 7 March 2017
74LVC1G86_Q100 v.1
-
© Nexperia B.V. 2017. All rights reserved.
10 / 13
74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
15 Legal information
15.1 Data sheet status
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Notwithstanding any damages that
customer might incur for any reason whatsoever, Nexperia's aggregate and
cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
to determine whether the Nexperia product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
74LVC1G86_Q100
Product data sheet
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
74LVC1G86_Q100
Product data sheet
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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74LVC1G86-Q100
Nexperia
2-input EXCLUSIVE-OR gate
Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
11.1
12
13
14
15
General description ............................................ 1
Features and benefits .........................................1
Ordering information .......................................... 2
Marking .................................................................2
Functional diagram ............................................. 2
Pinning information ............................................ 2
Pinning ............................................................... 2
Pin description ................................................... 3
Functional description ........................................3
Limiting values .................................................... 3
Recommended operating conditions ................ 4
Static characteristics .......................................... 4
Dynamic characteristics .....................................5
Waveforms and test circuit ................................ 6
Package outline ...................................................8
Abbreviations .................................................... 10
Revision history ................................................ 10
Legal information .............................................. 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
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Date of release: 7 March 2017
Document identifier: 74LVC1G86_Q100
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