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74LVC1G99GM,125

74LVC1G99GM,125

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    XQFN8_1.6X1.6MM_EP

  • 描述:

    可配置多功能门 8-XQFN

  • 数据手册
  • 价格&库存
74LVC1G99GM,125 数据手册
74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 11 — 25 July 2019 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including, AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components are required to configure the device as all inputs can be connected directly to VCC or GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the output state is determined by the signals applied to the Schmitt trigger inputs (A, B, C and D). Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input signals, transforming them into sharply defined, jitter free output signals. By eliminating leakage current paths to VCC and GND, the inputs and disabled output are also over-voltage tolerant, making the device suitable for mixed-voltage applications. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V. 2. Features and benefits • • • • • • • • • • • • Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C. 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G99DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC1G99GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; SOT833-1 8 terminals; body 1 × 1.95 × 0.5 mm 74LVC1G99GF -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1 × 0.5 mm SOT1089 74LVC1G99GN -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 × 1.0 × 0.35 mm SOT1116 74LVC1G99GS -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 4. Marking Table 2. Marking codes Type number Marking code [1] 74LVC1G99DP V99 74LVC1G99GT V99 74LVC1G99GF YF 74LVC1G99GN YF 74LVC1G99GS YF [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram OE A B Y C D Fig. 1. 001aah322 Logic symbol 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 2 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 6. Pinning information 6.1. Pinning 74LVC1G99 OE 1 8 VCC A 2 7 Y B 3 6 D GND 4 5 C 74LVC1G99 OE 1 8 VCC A 2 7 Y B 3 6 D GND 4 5 C 001aah324 Transparent top view 001aah323 Fig. 2. Fig. 3. Pin configuration SOT505-2 (TSSOP8) Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 (XSON8) 6.2. Pin description Table 3. Pin description Symbol Pin Description OE 1 output enable input OE (active LOW) A 2 data input B 3 data input GND 4 ground (0 V) C 5 data input D 6 data input Y 7 data output VCC 8 supply voltage 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 3 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Output Input OE D C B A Y L L L L L L L L L L H H L L L H L L L L L H H H L L H L L L L L H L H L L L H H L H L L H H H H L H L L L H L H L L H L L H L H L H L H L H H L L H H L L H L H H L H H L H H H L L L H H H H L H X X X X Z 7.1. Logic configurations Table 5. Function selection table Primary function Complementary function 3-state buffer 3-state inverter 3-state 2-input multiplexer 3-state 2-input multiplexer with inverting output 3-state 2-input AND 3-state 2-input NOR with two inverting inputs 3-state 2-input AND with one inverting input 3-state 2-input NOR with one inverting input 3-state 2-input AND with two inverting inputs 3-state 2-input NOR 3-state 2-input NAND 3-state 2-input OR with two inverting inputs 3-state 2-input NAND with one inverting input 3-state 2-input OR with one inverting input 3-state 2-input NAND with two inverting inputs 3-state 2-input OR 3-state 2-input XOR 3-state 2-input XNOR 74LVC1G99 Product data sheet 3-state 2-input XOR with one inverting input All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 4 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 7.2. 3-state buffer functions available Table 6. Function table H = HIGH voltage level; L = LOW voltage level; See Fig. 4. Function 3-state buffer Input OE A B C D L input H or L L L L H or L input H L L L H input L L H L input H L H H or L L input L H or L L H input L L L H or L input OE input Y 001aah326 Fig. 4. 3-state buffer function 7.3. 3-state inverter functions available Table 7. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. See Fig. 5. Function 3-state inverter Input OE A B C D L input H or L L H L X input H H L L H input H L H L input L L H H or L L input L H or L H H input L H H H or L input OE input Y 001aah327 Fig. 5. 3-state inverter function 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 5 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 7.4. 3-state multiplexer functions available Table 8. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 6. Function 3-state 2-input multiplexer Input OE A B C D L input 1 input 2 input 1 or input 2 L L input 2 input 1 input 2 or input 1 L L input 1 input 2 input 1 or input 2 H L input 2 input 1 input 2 or input 1 H OE OE input 1 input 1 Y input 2 A/B Fig. 6. Y input 2 A/B 001aah328 3-state 2-input multiplexer function 7.5. 3-state AND/NOR functions available Table 9. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 7. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state AND 3-state NOR L L input 1 input 2 L 2 3-state AND 3-state NOR L L input 2 input 1 L OE OE input 1 input 1 Y input 2 Fig. 7. Y input 2 001aah329 3-state AND/NOR function Table 10. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 8. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state AND 3-state NOR L input 2 L input 1 L 2 3-state AND 3-state NOR L H input 1 input 2 H OE OE input 1 input 1 Y input 2 Fig. 8. Y input 2 001aah330 3-state AND/NOR function 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 6 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state Table 11. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 9. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state AND 3-state NOR L input 1 L input 2 L 2 3-state AND 3-state NOR L H input 2 input 1 H OE OE input 1 input 1 Y input 2 Fig. 9. Y input 2 001aah331 3-state AND/NOR function Table 12. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 10. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state AND 3-state NOR L input 1 H input 2 H 2 3-state AND 3-state NOR L input 2 H input 1 H OE OE input 1 input 1 Y input 2 Y input 2 001aah332 Fig. 10. 3-state AND/NOR function 7.6. 3-state NAND/OR functions available Table 13. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 11. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state NAND 3-state OR L L input 1 input 2 H 2 3-state NAND 3-state OR L L input 2 input 1 H OE OE input 1 input 1 Y input 2 Y input 2 001aah333 Fig. 11. 3-state NAND/OR function 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 7 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state Table 14. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 12. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state NAND 3-state OR L input 2 L input 1 H 2 3-state NAND 3-state OR L H input 1 input 2 L OE OE input 1 input 1 Y input 2 Y input 2 001aah334 Fig. 12. 3-state NAND/OR function Table 15. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 13. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state NAND 3-state OR L input 1 L input 2 H 2 3-state NAND 3-state OR L H input 2 input 1 L OE OE input 1 input 1 Y input 2 Y input 2 001aah335 Fig. 13. 3-state AND/NOR function Table 16. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 14. Number of inputs Function Input AND/NAND OR/NOR OE A B C D 2 3-state NAND 3-state OR L input 1 H input 2 L 2 3-state NAND 3-state OR L input 2 H input 1 L OE OE input 1 input 1 Y input 2 Y input 2 001aah336 Fig. 14. 3-state AND/NOR function 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 8 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 7.7. 3-state XOR/XNOR functions available Table 17. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 15. Function 3-state XOR Input OE A B C D L input 1 H or L L input 2 L input 2 H or L L input 1 L H or L input 1 H input 2 L H or L input 2 H input 1 L L H input 1 input 2 L L H input 2 input 1 OE input 1 Y input 2 001aah337 Fig. 15. 3-state XOR function Table 18. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 16. Function 3-state XOR Input OE A B C D L H L input 1 input 2 OE input 1 Y input 2 001aah338 Fig. 16. 3-state XOR function Table 19. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 17. Function 3-state XOR Input OE A B C D L H L input 1 input 2 OE input 1 Y input 2 001aah339 Fig. 17. 3-state XOR function 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 9 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state Table 20. Function table H = HIGH voltage level; L = LOW voltage level. See Fig. 18. Function Input 3-state XNOR OE A B C D L H L input 1 input 2 L H L input 2 input 1 OE input 1 Y input 2 001aah340 Fig. 18. 3-state XNOR function 8. Limiting values Table 21. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +6.5 V -50 - -0.5 +6.5 V - ±50 mA VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO > VCC or VO < 0 V VO output voltage Active mode [1] -0.5 Power-down mode; VCC = 0 V [1] -0.5 +6.5 V - ±50 mA VI < 0 V [1] VCC + 0.5 V IO output current ICC supply current - 100 mA IGND ground current -100 - mA Ptot total power dissipation - 250 mW Tstg storage temperature -65 +150 °C [1] [2] VO = 0 V to VCC mA Tamb = -40 °C to +125 °C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT505-2 (TSSOP8) packages: Ptot derates linearly with 4.6 mW/K above 96 °C. For SOT833-1 (XSON8) packages: Ptot derates linearly with 3.1 mW/K above 68 °C. For SOT1089 (XSON8) packages: Ptot derates linearly with 4.0 mW/K above 88 °C. For SOT1116 (XSON8) packages: Ptot derates linearly with 4.2 mW/K above 90 °C. For SOT1203 (XSON8) packages: Ptot derates linearly with 3.6 mW/K above 81 °C. 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 10 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 9. Recommended operating conditions Table 22. Operating conditions Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate Active mode Power-down mode; VCC = 0 V Min Max Unit 1.65 5.5 V 0 5.5 V 0 VCC V 0 5.5 V -40 +125 °C VCC = 1.65 V to 2.7 V - 20 ns/V VCC = 2.7 V to 4.5 V - 10 ns/V VCC = 4.5 V to 5.5 V - 5 ns/V 10. Static characteristics Table 23. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH VOL Conditions -40 °C to +85 °C Unit Min Typ [1] Max Min Max VCC - 0.1 - - VCC - 0.1 - V IO = -4 mA; VCC = 1.65 V 1.2 - - 0.95 - V IO = -8 mA; VCC = 2.3 V 1.9 - - 1.7 - V IO = -12 mA; VCC = 2.7 V 2.2 - - 1.9 - V IO = -24 mA; VCC = 3.0 V 2.3 - - 2.0 - V IO = -32 mA; VCC = 4.5 V 3.8 - - 3.4 - V IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.1 - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.3 - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.55 - 0.80 V HIGH-level output VI = VT+ or VTvoltage IO = -100 μA; VCC = 1.65 V to 5.5 V LOW-level output voltage -40 °C to +125 °C VI = VT+ or VT- II input leakage current VCC = 0 V to 5.5 V; VI = 5.5 V or GND - ±0.1 ±1 - ±1 μA IOZ OFF-state output current VCC = 3.6 V; VI = VIH or VIL; VO = 5.5 V or GND - ±0.1 ±2 - ±2 μA IOFF power-off leakage VCC = 0 V; VI or VO = 5.5 V current - ±0.1 ±2 - ±2 μA 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 11 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Min Typ [1] Max Min Max Unit ICC supply current VCC = 1.65 V to 5.5 V; VI = 5.5 V or GND; IO = 0 A - 0.1 4 - 4 μA ΔICC additional supply current per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A - 5 500 - 500 μA CI input capacitance VCC = 3.3 V; VI = GND to VCC - 2.5 - - - pF [1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 10.1. Transfer characteristics Table 24. Transfer characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 26 Symbol Parameter Conditions VT+ see Fig. 19, Fig. 20, Fig. 21, Fig. 22 and Fig. 23 positive-going threshold voltage VT- negative-going threshold voltage VH [1] hysteresis voltage -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max VCC = 1.8 V 0.70 1.02 1.20 0.67 1.20 V VCC = 2.3 V 1.11 1.42 1.60 1.08 1.60 V VCC = 3.0 V 1.50 1.79 2.00 1.47 2.00 V VCC = 4.5 V 2.16 2.52 2.74 2.13 2.74 V VCC = 5.5 V 2.61 2.99 3.33 2.58 3.33 V VCC = 1.8 V 0.30 0.53 0.72 0.30 0.75 V VCC = 2.3 V 0.58 0.77 1.00 0.58 1.03 V VCC = 3.0 V 0.80 1.04 1.30 0.80 1.33 V VCC = 4.5 V 1.21 1.55 1.90 1.21 1.93 V VCC = 5.5 V 1.45 1.86 2.29 1.45 2.32 V VCC = 1.8 V 0.30 0.48 0.62 0.23 0.62 V VCC = 2.3 V 0.40 0.64 0.80 0.34 0.80 V VCC = 3.0 V 0.50 0.75 1.00 0.44 1.00 V VCC = 4.5 V 0.71 0.97 1.20 0.65 1.20 V VCC = 5.5 V 0.71 1.13 1.40 0.65 1.40 V see Fig. 19, Fig. 20, Fig. 21, Fig. 22 and Fig. 23 (VT+ - VT-); see Fig. 19, Fig. 20, Fig. 21, Fig. 22 and Fig. 23 All typical values are measured at Tamb = 25 °C 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 12 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 10.2. Waveforms transfer characteristics VO VT+ VI VI VH VT- VT+ VH VT- VO mna207 mna208 Fig. 19. Transfer characteristic Fig. 20. Definition of VT+, VT- and VH VO VT+ VI VT- VO VI VH VT+ VH VT- mnb155 mnb154 Fig. 21. Transfer characteristic Fig. 22. Definition of VT+, VT- and VH 001aab594 16 I CC (mA) 12 8 4 0 0 1 2 VI (V) 3 Fig. 23. Typical 74LVC1G99 transfer characteristic; VCC = 3.0 V 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 13 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 11. Dynamic characteristics Table 25. Dynamic characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 26. Symbol Parameter tpd Conditions -40 °C to +85 °C Typ [1] Max Min Max VCC = 1.65 V to 1.95 V 2.8 7.5 30.8 2.8 38.5 ns VCC = 2.3 V to 2.7 V 2.0 5.0 11.7 2.0 14.6 ns VCC = 2.7 V 2.0 5.4 9.0 2.0 11.3 ns VCC = 3.0 V to 3.6 V 1.8 4.5 8.4 1.8 10.5 ns VCC = 4.5 V to 5.5 V 1.8 3.8 5.5 1.8 6.9 ns VCC = 1.65 V to 1.95 V 2.8 7.5 28.9 2.8 36.2 ns VCC = 2.3 V to 2.7 V 2.0 5.0 11.3 2.0 14.2 ns VCC = 2.7 V 2.0 5.4 9.0 2.0 11.3 ns VCC = 3.0 V to 3.6 V 1.8 4.5 8.2 1.8 10.3 ns 1.8 3.8 5.4 1.8 6.8 ns VCC = 1.65 V to 1.95 V 3.2 7.8 29.8 3.2 37.3 ns VCC = 2.3 V to 2.7 V 2.3 5.2 12.3 2.3 15.4 ns VCC = 2.7 V 2.3 5.3 9.6 2.3 12.0 ns VCC = 3.0 V to 3.6 V 2.3 4.6 8.6 2.3 10.8 ns VCC = 4.5 V to 5.5 V 1.8 3.8 5.7 1.8 7.2 ns VCC = 1.65 V to 1.95 V 2.8 7.0 25.7 2.8 32.2 ns VCC = 2.3 V to 2.7 V 2.0 4.6 10.7 2.0 13.4 ns VCC = 2.7 V 2.0 4.8 9.2 2.0 11.5 ns VCC = 3.0 V to 3.6 V 1.8 4.1 7.6 1.8 9.5 ns VCC = 4.5 V to 5.5 V 1.6 3.4 5.2 1.6 6.5 ns [2] B to Y; see Fig. 24 [2] VCC = 4.5 V to 5.5 V C to Y; see Fig. 24 [2] D to Y; see Fig. 24 Product data sheet Unit Min propagation delay A to Y; see Fig. 24 74LVC1G99 -40 °C to +125 °C [2] All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 14 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state Symbol Parameter ten enable time tdis disable time Conditions -40 °C to +85 °C Typ [1] Max Min Max VCC = 1.65 V to 1.95 V 2.0 5.7 25.2 2.0 32.0 ns VCC = 2.3 V to 2.7 V 1.4 3.8 11.3 1.4 14.0 ns VCC = 2.7 V 1.4 4.2 8.6 1.4 11.0 ns VCC = 3.0 V to 3.6 V 1.4 3.5 7.0 1.4 9.0 ns VCC = 4.5 V to 5.5 V 1.4 2.7 4.7 1.4 6.0 ns VCC = 1.65 V to 1.95 V 3.0 5.7 15.0 3.0 19.0 ns VCC = 2.3 V to 2.7 V 2.0 3.6 5.8 2.0 7.3 ns VCC = 2.7 V 2.0 4.5 6.6 2.0 8.2 ns VCC = 3.0 V to 3.6 V 2.1 4.5 5.9 2.1 7.4 ns 1.0 3.4 4.5 1.0 5.6 ns VCC = 1.65 V to 1.95 V - 14 - - - pF VCC = 2.3 V to 2.7 V - 16 - - - pF VCC = 2.7 V - 18 - - - pF VCC = 3.0 V to 3.6 V - 25 - - - pF VCC = 4.5 V to 5.5 V - 30 - - - pF OE to Y; see Fig. 25 [3] OE to Y; see Fig. 25 [4] VCC = 4.5 V to 5.5 V [1] [2] [3] [4] [5] Unit Min power dissipation per buffer (output enabled); fi = 10 MHz; CL = 50 pF; capacitance VI = GND to VCC CPD -40 °C to +125 °C [5] All typical values are measured at nominal VCC and Tamb = 25 °C. tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 15 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 11.1. Waveforms and test circuit VI VM A, B, C, D input GND VM tPHL VOH tPLH VM Y output VOL VM tPLH VOH tPHL VM Y output VM VOL 001aah341 Measurement points are given in Table 26. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 24. The data input (A, B, C, D) to output (Y) propagation delays VI OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCC VM VX VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH tPZH VY VM GND outputs enabled outputs disabled outputs enabled mna644 Measurement points are given in Table 26. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 25. 3-state enable and disable times Table 26. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 1.95 V 0.5VCC 0.5VCC VOL + 0.15 V VOH - 0.15 V 2.3 V to 2.7 V 0.5VCC 0.5VCC VOL + 0.15 V VOH - 0.15 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 4.5 V to 5.5 V 0.5VCC 0.5VCC VOL + 0.3 V VOH - 0.3 V 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 16 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state VEXT VCC G VI RL VO DUT RT CL RL mna616 Test data is given in Table 27. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 26. Test circuit for measuring switching times Table 27. Test data Supply voltage Input VI Load VEXT tr = tf CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ open GND 2VCC 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open GND 2VCC 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6V 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6V 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open GND 2VCC 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 17 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Fig. 27. Package outline SOT505-2 (TSSOP8) 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 18 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4× (2) L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 2.0 1.9 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT833-1 --- MO-252 --- EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-07 Fig. 28. Package outline SOT833-1 (XSON8) 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 19 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 x 0.5 mm SOT1089 E terminal 1 index area D A A1 detail X (4×)(2) e L (8×)(2) b 4 5 e1 1 terminal 1 index area 8 L1 X 0 0.5 scale Dimensions Unit mm max nom min 1 mm A(1) 0.5 A1 b D E e e1 L L1 0.04 0.20 1.40 1.05 0.35 0.40 0.15 1.35 1.00 0.55 0.35 0.30 0.35 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version SOT1089 sot1089_po References IEC JEDEC JEITA European projection Issue date 10-04-09 10-04-12 MO-252 Fig. 29. Package outline SOT1089 (XSON8) 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 20 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1.0 x 0.35 mm 1 2 SOT1116 b 4 3 (4×)(2) L L1 e 8 7 e1 6 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e max 0.35 0.04 0.20 1.25 1.05 nom 0.15 1.20 1.00 0.55 min 0.12 1.15 0.95 e1 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1116_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-07 SOT1116 Fig. 30. Package outline SOT1116 (XSON8) 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 21 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1.0 x 0.35 mm SOT1203 b 1 2 3 (4×)(2) 4 L L1 e 8 7 6 e1 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.40 1.05 0.35 0.40 nom 0.15 1.35 1.00 0.55 0.35 0.30 0.35 min 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1203_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-06 SOT1203 Fig. 31. Package outline SOT1203 (XSON8) 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 22 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 13. Abbreviations Table 28. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 29. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC1G99 v.11 20190725 Product data sheet - Modifications: • • 74LVC1G99 v.10.1 20181022 Modifications: • 74LVC1G99 v.10 20180927 Modifications: • • • 74LVC1G99 v.10.1 Type number 74LVC1G99GM (SOT902-2) removed. Table 21: Derating values for Ptot total power dissipation updated. Product data sheet - 74LVC1G99 v.10 Table 12: input D logic level changed to HIGH. Product data sheet - 74LVC1G99 v.9 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type number 74LVC1G99GD (SOT996-2) removed. 74LVC1G99 v.9 20161212 Modifications: • 74LVC1G99 v.8 20130405 Modifications: • 74LVC1G99 v.7 20120622 Modifications: • 74LVC1G99 v.6 20111201 Modifications: • 74LVC1G99 v.5 20101021 74LVC1G99 v.4 20100416 74LVC1G99 v.3 Product data sheet - 74LVC1G99 v.8 Table 23: The maximum limits for leakage current and supply current have changed. Product data sheet - 74LVC1G99 v.7 For type number 74LVC1G99GD XSON8U has changed to XSON8. Product data sheet - 74LVC1G99 v.6 For type number 74LVC1G99GM the SOT code has changed to SOT902-2. - 74LVC1G99 v.5 Product data sheet - 74LVC1G99 v.4 Product data sheet - 74LVC1G99 v.3 20091203 Product data sheet - 74LVC1G99 v.2 74LVC1G99 v.2 20080208 Product data sheet - 74LVC1G99 v.1 74LVC1G99 v.1 20080103 Product data sheet - - 74LVC1G99 Product data sheet Product data sheet Legal pages updated. All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 23 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LVC1G99 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 24 / 25 74LVC1G99 Nexperia Ultra-configurable multiple function gate; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 4 7.1. Logic configurations.....................................................4 7.2. 3-state buffer functions available................................. 5 7.3. 3-state inverter functions available.............................. 5 7.4. 3-state multiplexer functions available......................... 6 7.5. 3-state AND/NOR functions available..........................6 7.6. 3-state NAND/OR functions available..........................7 7.7. 3-state XOR/XNOR functions available....................... 9 8. Limiting values........................................................... 10 9. Recommended operating conditions........................11 10. Static characteristics................................................11 10.1. Transfer characteristics............................................12 10.2. Waveforms transfer characteristics..........................13 11. Dynamic characteristics...........................................14 11.1. Waveforms and test circuit.......................................16 12. Package outline........................................................ 18 13. Abbreviations............................................................ 23 14. Revision history........................................................23 15. Legal information......................................................24 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 25 July 2019 74LVC1G99 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 25 July 2019 © Nexperia B.V. 2019. All rights reserved 25 / 25 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74LVC1G99GS,115 74LVC1G99GN,115 74LVC1G99DP,125 74LVC1G99GM,125 74LVC1G99GT,115 74LVC1G99GD,125 74LVC1G99GF,115
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