74LVC2G04-Q100
Dual inverter
Rev. 3 — 25 January 2019
Product data sheet
1. General description
The 74LVC2G04-Q100 provides the dual inverting buffer.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these
devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging backflow current through the device when it is
powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
74LVC2G04-Q100
Nexperia
Dual inverter
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LVC2G04GW-Q100 -40 °C to +125 °C
SC-88
plastic surface-mounted package; 6 leads
SOT363
74LVC2G04GV-Q100 -40 °C to +125 °C
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
74LVC2G04GS-Q100 -40 °C to +125 °C
XSON6
extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
4. Marking
Table 2. Marking
Type number
Marking code[1]
74LVC2G04GW-Q100
V4
74LVC2G04GV-Q100
V04
74LVC2G04GS-Q100
V4
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
1A
1Y
6
3
2A
2Y
4
1
3
6
1
4
Y
A
mnb080
mnb079
Fig. 1.
1
Logic symbol
Fig. 2.
mna110
IEC logic symbol
Fig. 3.
Logic diagram (one gate)
6. Pinning information
6.1. Pinning
74LVC2G04
74LVC2G04
1A
1
6
1Y
GND
2
5
VCC
2A
3
4
1A
1
6
1Y
GND
2
5
VCC
2A
3
4
2Y
2Y
001aab650
Transparent top view
001aab649
Fig. 4.
Pin configuration SOT363 and SOT457
74LVC2G04_Q100
Product data sheet
Fig. 5.
Pin configuration and SOT1202
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74LVC2G04-Q100
Nexperia
Dual inverter
6.2. Pin description
Table 3. Pin description
Symbol
Pin
Description
1A
1
data input
GND
2
ground (0 V)
2A
3
data input
2Y
4
data output
VCC
5
supply voltage
1Y
6
data output
7. Functional description
Table 4. Function table [1]
Input
Output
nA
nY
L
H
H
L
[1]
H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO > VCC or VO < 0 V
VO
output voltage
Active mode
[1] [2]
-0.5
Power-down mode
[1] [2]
-0.5
VI < 0 V
[1]
Max
Unit
-0.5
+6.5
V
-50
-
-0.5
+6.5
mA
V
-
±50
mA
VCC + 0.5 V
+6.5
V
IO
output current
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Ptot
total power dissipation
-
250
mW
Tstg
storage temperature
-65
+150
°C
[1]
[2]
[3]
VO = 0 V to VCC
Min
Tamb = -40 °C to +125 °C
[3]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
74LVC2G04_Q100
Product data sheet
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Nexperia
Dual inverter
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VCC
supply voltage
1.65
-
5.5
V
VI
input voltage
0
-
5.5
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
Active mode
Power-down mode; VCC = 0 V
0
-
5.5
V
-40
-
+125
°C
VCC = 1.65 V to 2.7 V
-
-
20
ns/V
VCC = 2.7 V to 5.5 V
-
-
10
ns/V
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol
VIH
VIL
VOH
VOL
Parameter
HIGH-level input
voltage
LOW-level input
voltage
HIGH-level
output voltage
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Typ[1]
Max
Min
Max
0.65VCC
-
-
0.65VCC
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
1.7
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
2.0
-
V
VCC = 4.5 V to 5.5 V
0.7VCC
-
-
0.7VCC
-
V
VCC = 1.65 V to 1.95 V
-
-
0.35VCC
-
VCC = 2.3 V to 2.7 V
-
-
0.7
-
VCC = 2.7 V to 3.6 V
-
-
0.8
VCC = 4.5 V to 5.5 V
-
-
0.3VCC
VCC - 0.1
-
IO = -4 mA; VCC = 1.65 V
1.2
IO = -8 mA; VCC = 2.3 V
1.9
IO = -12 mA; VCC = 2.7 V
VCC = 1.65 V to 1.95 V
0.35VCC V
0.7
V
-
0.8
V
-
0.3VCC
V
-
VCC - 0.1
-
V
-
-
0.95
-
V
-
-
1.7
-
V
2.2
-
-
1.9
-
V
IO = -24 mA; VCC = 3.0 V
2.3
-
-
2.0
-
V
IO = -32 mA; VCC = 4.5 V
3.8
-
-
3.4
-
V
-
-
0.10
-
0.10
V
IO = 4 mA; VCC = 1.65 V
-
-
0.45
-
0.70
V
IO = 8 mA; VCC = 2.3 V
-
-
0.30
-
0.45
V
IO = 12 mA; VCC = 2.7 V
-
-
0.40
-
0.60
V
IO = 24 mA; VCC = 3.0 V
-
-
0.55
-
0.80
V
IO = 32 mA; VCC = 4.5 V
-
-
0.55
-
0.80
V
VI = VIH or VIL
IO = -100 μA;
VCC = 1.65 V to 5.5 V
LOW-level output VI = VIH or VIL
voltage
IO = 100 μA;
VCC = 1.65 V to 5.5 V
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
-
±0.1
±1
-
±1
μA
IOFF
power-off
leakage current
VCC = 0 V; VI or VO = 5.5 V
-
±0.1
±2
-
±2
μA
74LVC2G04_Q100
Product data sheet
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74LVC2G04-Q100
Nexperia
Dual inverter
Symbol
Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Typ[1]
Max
Min
Max
-
0.1
4
-
4
μA
ICC
supply current
ΔICC
additional supply per pin; VCC = 2.3 V to 5.5 V;
current
VI = VCC - 0.6 V; IO = 0 A
-
5
500
-
500
μA
CI
input capacitance VCC = 3.3 V; VI = GND to VCC
-
2.5
-
-
-
pF
[1]
VI = 5.5 V or GND; IO = 0 A;
VCC = 1.65 V to 5.5 V
All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7.
Symbol
Parameter
Conditions
tpd
propagation delay
nA to nY; see Fig. 6
CPD
[1]
[2]
[3]
power dissipation
capacitance
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Typ [1]
Max
Min
Max
VCC = 1.65 V to 1.95 V
1.0
3.5
8.0
1.0
9.5
ns
VCC = 2.3 V to 2.7 V
1.0
2.2
4.4
1.0
5.4
ns
VCC = 2.7 V
1.0
2.7
5.2
1.0
7.0
ns
VCC = 3.0 V to 3.6 V
0.5
2.7
4.1
0.5
5.5
ns
VCC = 4.5 V to 5.5 V
1.0
1.9
3.2
1.0
3.8
ns
-
13.5
-
-
-
pF
[2]
VI = GND to VCC; VCC = 3.3 V [3]
Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
tpd is the same as tPLH and tPHL.
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD x VCC x fi x N + ∑(CL x VCC x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
∑(CL x VCC x fo) = sum of outputs.
11.1. Waveforms and test circuit
VI
VM
nA input
VM
GND
t PHL
t PLH
VOH
VM
nY output
VOL
VM
mna344
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6.
The input nA to output nY propagation delays
74LVC2G04_Q100
Product data sheet
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Nexperia
Dual inverter
Table 9. Measurement points
Supply voltage
Input
Output
VCC
VM
VM
1.65 V to 1.95 V
0.5VCC
0.5VCC
2.3 V to 2.7 V
0.5VCC
0.5VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5VCC
0.5VCC
VEXT
VCC
G
VI
RL
VO
DUT
RT
CL
RL
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 7.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
Input
VCC
VI
tr = tf
CL
RL
tPLH, tPHL
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 kΩ
open
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500 Ω
open
74LVC2G04_Q100
Product data sheet
VEXT
Load
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Nexperia
Dual inverter
12. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
B
E
y
A
X
HE
6
5
v M A
4
Q
pin 1
index
A
1
2
e1
A1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT363
Fig. 8.
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
SC-88
Package outline SOT363 (SC-88)
74LVC2G04_Q100
Product data sheet
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74LVC2G04-Q100
Nexperia
Dual inverter
Plastic, surface-mounted package (SC-74; TSOP6); 6 leads
D
SOT457
B
E
y
A
X
HE
6
5
v M A
4
Q
A
pin 1
index
A1
c
1
2
Lp
3
bp
e
detail X
w M B
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
max
nom
min
A
A1
1.1
0.1
0.9
bp
c
D
E
0.40 0.26
3.1
1.7
0.013 0.25 0.10
2.7
1.3
e
0.95
HE
Lp
Q
3.0
0.6
0.33
2.5
0.2
0.23
v
w
y
0.2
0.2
0.1
sot457_po
Outline
version
References
IEC
JEDEC
SOT457
Fig. 9.
JEITA
European
projection
Issue date
06-03-16
18-11-27
SC-74
Package outline SOT457 (SC-74)
74LVC2G04_Q100
Product data sheet
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74LVC2G04-Q100
Nexperia
Dual inverter
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
1
SOT1202
b
3
2
(4×)(2)
L
L1
e
6
5
4
e1
e1
(6×)(2)
A1
A
D
E
terminal 1
index area
0
0.5
Dimensions
Unit
mm
1 mm
scale
A(1)
A1
b
D
E
e
e1
L
L1
max 0.35 0.04 0.20 1.05 1.05
0.35 0.40
nom
0.15 1.00 1.00 0.55 0.35 0.30 0.35
min
0.12 0.95 0.95
0.27 0.32
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
Outline
version
sot1202_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
10-04-02
10-04-06
SOT1202
Fig. 10. Package outline SOT1202 (XSON6)
74LVC2G04_Q100
Product data sheet
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74LVC2G04-Q100
Nexperia
Dual inverter
13. Abbreviations
Table 11. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 12. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LVC2G04_Q100 v.3
20190125
Product data sheet
-
74LVC2G04_Q100 v.2
Modifications:
•
•
•
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Pin 6 description updated. Section 6.2
Added type number 74LVC2G04GS-Q100 (SOT1202/XSON6).
Package outline drawing SOT457 (SC-74) updated.
74LVC2G04_Q100 v.2
20161213
Modifications:
•
74LVC2G04_Q100 v.1
20140520
74LVC2G04_Q100
Product data sheet
Product data sheet
-
74LVC2G04_Q100 v.1
Table 7: The maximum limits for leakage current and supply current have changed.
Product data sheet
-
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Rev. 3 — 25 January 2019
-
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10 / 12
74LVC2G04-Q100
Nexperia
Dual inverter
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15. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
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or warranty that such applications will be suitable for the specified use
without further testing or modification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
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given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
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74LVC2G04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 January 2019
©
Nexperia B.V. 2019. All rights reserved
11 / 12
74LVC2G04-Q100
Nexperia
Dual inverter
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking.......................................................................... 2
5. Functional diagram.......................................................2
6. Pinning information......................................................2
6.1. Pinning.........................................................................2
6.2. Pin description............................................................. 3
7. Functional description................................................. 3
8. Limiting values............................................................. 3
9. Recommended operating conditions..........................4
10. Static characteristics..................................................4
11. Dynamic characteristics.............................................5
11.1. Waveforms and test circuit........................................ 5
12. Package outline.......................................................... 7
13. Abbreviations............................................................ 10
14. Revision history........................................................10
15. Legal information......................................................11
©
Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 25 January 2019
74LVC2G04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 January 2019
©
Nexperia B.V. 2019. All rights reserved
12 / 12
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