74LVC3G06GS,115

74LVC3G06 Triple inverter with open-drain output Rev. 14 — 31 July 2019 Product data sheet 1. General description The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. 2. Features and benefits • • • • • • • • • • • • Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V -24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 74LVC3G06 Nexperia Triple inverter with open-drain output 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC3G06DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G06DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC3G06GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC3G06GF -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1 × 0.5 mm SOT1089 74LVC3G06GN -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 × 1.0 × 0.35 mm SOT1116 74LVC3G06GS -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 4. Marking Table 2. Marking codes Type number Marking code [1] 74LVC3G06DP V06 74LVC3G06DC V06 74LVC3G06GT V06 74LVC3G06GF V6 74LVC3G06GN V6 74LVC3G06GS V6 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 1A 1Y 2A 2Y 1 Y 3A 3Y 1 A 001aah899 Fig. 1. Logic symbol 74LVC3G06 Product data sheet GND mna586 001aah900 Fig. 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 Fig. 3. Logic diagram (one inverter) © Nexperia B.V. 2019. All rights reserved 2 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 6. Pinning information 6.1. Pinning 74LVC3G06 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 74LVC3G06 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 001aab842 Transparent top view 001aab841 Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) Fig. 5. Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 (XSON8) 6.2. Pin description Table 3. Pin description Symbol Pin Description 1A, 2A, 3A 1, 3, 6 data input 1Y, 2Y, 3Y 7, 5, 2 data output GND 4 ground (0 V) VCC 8 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. Input nA Output nY L Z H L 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 3 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +6.5 V -50 - -0.5 +6.5 -50 - VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO < 0 V VO output voltage Active mode [1] -0.5 +6.5 V Power-down mode; VCC = 0 V [1] -0.5 +6.5 V - 50 mA VI < 0 V [1] V mA IO output current ICC supply current - 100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW Min Max Unit 1.65 5.5 V 0 5.5 V 0 5.5 V [1] [2] VO = 0 V to 6.5 V mA Tamb = -40 °C to +125 °C [2] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT505-2 (TSSOP8) packages: Ptot derates linearly with 4.6 mW/K above 96 °C. For SOT765-1 (VSSOP8) packages: Ptot derates linearly with 4.9 mW/K above 99 °C. For SOT833-1 (XSON8) packages: Ptot derates linearly with 3.1 mW/K above 68 °C. For SOT1089 (XSON8) packages: Ptot derates linearly with 4.0 mW/K above 88 °C. For SOT1116 (XSON8) packages: Ptot derates linearly with 4.2 mW/K above 90 °C. For SOT1203 (XSON8) packages: Ptot derates linearly with 3.6 mW/K above 81 °C. 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate Conditions Active mode Power-down mode; VCC = 0 V 74LVC3G06 Product data sheet 0 5.5 V -40 +125 °C VCC = 1.65 V to 2.7 V - 20 ns/V VCC = 2.7 V to 5.5 V - 10 ns/V All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 4 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ [1] Max Unit 0.65VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7VCC - - V VCC = 1.65 V to 1.95 V - - 0.35VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3VCC V IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.10 V IO = 4 mA; VCC = 1.65 V - - 0.45 V IO = 8 mA; VCC = 2.3 V - - 0.30 V IO = 12 mA; VCC = 2.7 V - - 0.40 V IO = 24 mA; VCC = 3.0 V - - 0.55 V IO = 32 mA; VCC = 4.5 V - - 0.55 V - ±0.1 ±1 μA Tamb = -40 °C to +85 °C VIH VIL VOL HIGH-level input voltage VCC = 1.65 V to 1.95 V LOW-level input voltage LOW-level output voltage VI = VIH or VIL II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V [2] IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - ±0.1 ±2 μA IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - ±0.1 ±2 μA ICC supply current VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V - 0.1 4 μA ΔICC additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - 5 500 μA CI input capacitance - 2.5 - pF 0.65VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V [2] Tamb = -40 °C to +125 °C VIH VIL HIGH-level input voltage VCC = 1.65 V to 1.95 V LOW-level input voltage 74LVC3G06 Product data sheet 0.7VCC - - V VCC = 1.65 V to 1.95 V - - 0.35VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3VCC V All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 5 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output Symbol Parameter Conditions VOL VI = VIH or VIL LOW-level output voltage Min Typ [1] Max Unit IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.10 V IO = 4 mA; VCC = 1.65 V - - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.80 V II input leakage current - - ±1 μA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - ±2 μA IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - - ±2 μA ICC supply current VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V - - 4 μA ΔICC additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - - 500 μA [1] [2] VI = 5.5 V or GND; VCC = 0 V to 5.5 V All typical values are measured at Tamb = 25 °C. These typical values are measured at VCC = 3.3 V. 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7. Symbol Parameter tpd propagation delay CPD [1] [2] [3] power dissipation capacitance Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max VCC = 1.65 V to 1.95 V 1.0 2.6 6.5 1.0 8.2 ns VCC = 2.3 V to 2.7 V 0.5 1.6 3.9 0.5 4.9 ns VCC = 2.7 V 1.0 2.2 4.2 1.0 5.3 ns VCC = 3.0 V to 3.6 V 0.5 2.0 3.4 0.5 4.3 ns VCC = 4.5 V to 5.5 V 0.5 1.4 2.9 0.5 3.7 ns - 5.9 - - - pF nA to nY; see Fig. 6 [2] VI = GND to VCC; VCC = 3.3 V [3] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. tpd is the same as tPLZ and tPZL. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of outputs. 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 6 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 11.1. Waveforms and test circuit VI VM nA input GND t PZL t PLZ VCC nY output VM VX VOL mnb033 Measurement points are given in Table 9. VOL is the typical output voltage level that occurs with the output load. Fig. 6. The input (nA) to output (nY) propagation delays Table 9. Measurement points Supply voltage Input Output VCC VM VM VX 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V 2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V 3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC VOL + 0.3 V VEXT VCC G VI RL VO DUT RT CL RL mna616 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 10. Test data Supply voltage Input VEXT Load VCC VI tr, tf CL RL tPZL, tPLZ 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ 2 × VCC 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω 2 × VCC 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω 6V 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω 6V 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω 2 × VCC 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 7 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 Fig. 8. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Package outline SOT505-2 (TSSOP8) 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 8 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 Fig. 9. References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Package outline SOT765-1 (VSSOP8) 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 9 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4× (2) L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 2.0 1.9 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT833-1 --- MO-252 --- EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-07 Fig. 10. Package outline SOT833-1 (XSON8) 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 10 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 x 0.5 mm SOT1089 E terminal 1 index area D A A1 detail X (4×)(2) e L (8×)(2) b 4 5 e1 1 terminal 1 index area 8 L1 X 0 0.5 scale Dimensions Unit mm max nom min 1 mm A(1) 0.5 A1 b D E e e1 L L1 0.04 0.20 1.40 1.05 0.35 0.40 0.15 1.35 1.00 0.55 0.35 0.30 0.35 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version SOT1089 sot1089_po References IEC JEDEC JEITA European projection Issue date 10-04-09 10-04-12 MO-252 Fig. 11. Package outline SOT1089 (XSON8) 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 11 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1.0 x 0.35 mm 1 2 SOT1116 b 4 3 (4×)(2) L L1 e 8 7 e1 6 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e max 0.35 0.04 0.20 1.25 1.05 nom 0.15 1.20 1.00 0.55 min 0.12 1.15 0.95 e1 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1116_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-07 SOT1116 Fig. 12. Package outline SOT1116 (XSON8) 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 12 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1.0 x 0.35 mm SOT1203 b 1 2 3 (4×)(2) 4 L L1 e 8 7 6 e1 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.40 1.05 0.35 0.40 nom 0.15 1.35 1.00 0.55 0.35 0.30 0.35 min 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1203_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-06 SOT1203 Fig. 13. Package outline SOT1203 (XSON8) 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 13 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 13. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC3G06 v.14 20190731 Product data sheet - Modifications: • • 74LVC3G06 v.13 20190206 Modifications: • • • 74LVC3G06 v.13 Type number 74LVC3G06GM (SOT902-2) removed. Table 5: Derating values for Ptot total power dissipation updated. Product data sheet - 74LVC3G06 v.12 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type number 74LVC3G06GD (SOT996-2) removed. 74LVC3G06 v.12 20161215 Modifications: • 74LVC3G06 v.11 20130328 Modifications: • 74LVC3G06 v.10 20120627 Modifications: • 74LVC3G06 v.9 20111123 Modifications: • 74LVC3G06 v.8 20100809 74LVC3G06 v.7 Product data sheet - 74LVC3G06 v.11 Table 7: The maximum limits for leakage current and supply current have changed. Product data sheet - 74LVC3G06 v.10 For type number 74LVC3G06GD XSON8U has changed to XSON8. Product data sheet - 74LVC3G06 v.9 For type number 74LVC3G06GM the SOT code has changed to SOT902-2. - 74LVC3G06 v.8 Product data sheet - 74LVC3G06 v.7 20090312 Product data sheet - 74LVC3G06 v.6 74LVC3G06 v.6 20080403 Product data sheet - 74LVC3G06 v.5 74LVC3G06 v.5 20070521 Product data sheet - 74LVC3G06 v.4 74LVC3G06 v.4 20060302 Product data sheet - 74LVC3G06 v.3 74LVC3G06 v.3 20050201 Product data sheet - 74LVC3G06 v.2 74LVC3G06 v.2 20041021 Product data sheet - 74LVC3G06 v.1 74LVC3G06 v.1 20040607 Product data sheet - - 74LVC3G06 Product data sheet Product data sheet Legal pages updated. All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 14 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output 15. Legal information injury, death or severe property or environmental damage. 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Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 15 / 16 74LVC3G06 Nexperia Triple inverter with open-drain output Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................6 11.1. Waveforms and test circuit........................................ 7 12. Package outline.......................................................... 8 13. Abbreviations............................................................ 14 14. Revision history........................................................14 15. Legal information......................................................15 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 31 July 2019 74LVC3G06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 31 July 2019 © Nexperia B.V. 2019. All rights reserved 16 / 16 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74LVC3G06GS,115 74LVC3G06DC,125 74LVC3G06DP,125 74LVC3G06GM,125 74LVC3G06GT,115 74LVC3G06GD,125 74LVC3G06GF,115 74LVC3G06GN,115