74HC4050PW-Q100J

74HC4050-Q100 Hex non-inverting HIGH-to-LOW level shifter Rev. 1 — 30 January 2013 Product data sheet 1. General description The 74HC4050-Q100 is a hex buffer with over-voltage tolerant inputs. Inputs are overvoltage tolerant to 15 V which enables the device to be used in HIGH-to-LOW level shifting applications. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Low-power dissipation  Complies with JEDEC standard no. 7A  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  Multiple package options 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4050D-Q100 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HC4050PW-Q100 40 C to +125 C 74HC4050-Q100 Nexperia Hex non-inverting HIGH-to-LOW level shifter 4. Functional diagram  3 5 7 9 11 14 1A 1Y 2A 2Y 3A 3Y 4A 4Y 5A 5Y 6A 6Y  99   2  4 6  99 99   10  99  12  15 99  < $ DDD 001aae605 Fig 1. 99 Logic symbol Fig 2. DDD IEC logic symbol Fig 3. Logic diagram (one level shifter) 5. Pinning information 5.1 Pinning +&4 9&&   QF <   < $   $ <   QF $   < <   $ $   < *1'   +&4 $ 9&&   QF <   < $   $ <   QF $   < <   $ $   < *1'  DDD Fig 4. Pin configuration SO16 74HC4050_Q100 Product data sheet  $ DDD Fig 5. Pin configuration TSSOP16 All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 January 2013 © Nexperia B.V. 2017. All rights reserved 2 of 13 74HC4050-Q100 Nexperia Hex non-inverting HIGH-to-LOW level shifter 5.2 Pin description Table 2. Pin description Symbol Pin Description VCC 1 supply voltage 1Y to 6Y 2, 4, 6, 10, 12, 15 output 1A to 6A 3, 5, 7, 9, 11, 14 input GND 8 ground (0 V) n.c. 13, 16 not connected 6. Functional description Table 3. Function table [1] Input Output nA nY L L H H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VIK input clamping voltage IIK input clamping current VI < 0.5 V IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V IO output current VO = 0.5 V to (VCC + 0.5 V) ICC supply current - +50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C - 500 mW [1] total power dissipation Ptot [1] Conditions Min Max Unit 0.5 +7 V 0.5 +16 V 20 - mA - 20 mA - 25 mA For SO16 packages: Ptot derates linearly with 8 mW/K above 70 C. For TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. 74HC4050_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 January 2013 © Nexperia B.V. 2017. All rights reserved 3 of 13 74HC4050-Q100 Nexperia Hex non-inverting HIGH-to-LOW level shifter 100 Ω input to logic circuit polysilicon resistor D1 GND 001aan375 Fig 6. Input protection for the 74HC4050-Q100 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Min Typ Max Unit VCC supply voltage Conditions 2.0 5.0 6.0 V VI input voltage 0 - 15 V VO output voltage 0 - VCC V Tamb ambient temperature t/V input transition rise and fall rate 40 +25 +125 C VCC = 2.0 V; VI = 2.0 V - - 625 ns/V VCC = 4.5 V; VI = 4.5 V - 1.67 139 ns/V VCC = 6.0 V; VI = 6.0 V - - 83 ns/V VCC = 6.0 V; VI = 10.0 V - - 81 ns/V VCC = 6.0 V; VI = 15.0 V - - 83 ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage 74HC4050_Q100 Product data sheet Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.3 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.1 - 4.2 - 4.2 - V VCC = 2.0 V - 0.7 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 1.8 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.3 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 - - 5.34 - 5.2 - V VI = VIH or VIL All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 January 2013 © Nexperia B.V. 2017. All rights reserved 4 of 13 74HC4050-Q100 Nexperia Hex non-inverting HIGH-to-LOW level shifter Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C Conditions Min VOL II LOW-level output voltage input leakage current ICC supply current CI input capacitance Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Typ Max Min Max Min Max VI = VIH or VIL IO = 20 A; VCC = 2.0 V - - 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.26 - 0.33 - 0.4 V VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A VI = 15 V; VCC = 2.0 V to 6.0 V - - 0.5 - 5.0 - 5.0 A VI = 15 V or GND; IO = 0 A; VCC = 6.0 V - - 2.0 - 20 - 40 A - 3.5 - - - - - pF 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter tpd tt propagation delay transition time 74HC4050_Q100 Product data sheet Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 25 85 - 105 - 130 ns VCC = 4.5 V - 9 17 - 21 - 26 ns VCC = 5 V; CL = 15 pF - 7 - - - - - ns VCC = 6.0 V - 7 14 - 18 - 22 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns nA to nY; see Figure 7 Yn; see Figure 7 [1] [2] All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 January 2013 © Nexperia B.V. 2017. All rights reserved 5 of 13 74HC4050-Q100 Nexperia Hex non-inverting HIGH-to-LOW level shifter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter CPD power dissipation capacitance Tamb = 25 C Conditions Tamb = 40 C to +125 C Min Typ Max Min Max Min Max - 14 - - - - - [3] CL = 50 pF; f = 1 MHz; VI = GND to VCC Tamb = 40 C to +85 C [1] tpd is the same as tPLH and tPHL. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). Unit pF PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 11. Waveforms 9, Q$LQSXW 90 90 *1' W3+/ W3/+ 92+ Q